X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fdev%2Fuart8250.cc;h=e840d2a56a52cbb0e633abb49b5fcf870ec9cd69;hb=0a2ee7761617355dd981ce255aa082102d7316b4;hp=eefda76e5f1e5578811b564312aca91591b6722d;hpb=3205768ea57b4e2f75561eebb39671045a6d6746;p=gem5.git diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc index eefda76e5..e840d2a56 100644 --- a/src/dev/uart8250.cc +++ b/src/dev/uart8250.cc @@ -36,8 +36,9 @@ #include #include "base/inifile.hh" -#include "base/str.hh" // for to_number #include "base/trace.hh" +#include "config/the_isa.hh" +#include "debug/Uart.hh" #include "dev/platform.hh" #include "dev/terminal.hh" #include "dev/uart8250.hh" @@ -48,7 +49,7 @@ using namespace std; using namespace TheISA; Uart8250::IntrEvent::IntrEvent(Uart8250 *u, int bit) - : Event(&mainEventQueue), uart(u) + : uart(u) { DPRINTF(Uart, "UART Interrupt Event Initilizing\n"); intrBit = bit; @@ -67,7 +68,7 @@ Uart8250::IntrEvent::process() DPRINTF(Uart, "UART InterEvent, interrupting\n"); uart->platform->postConsoleInt(); uart->status |= intrBit; - uart->lastTxInt = curTick; + uart->lastTxInt = curTick(); } else DPRINTF(Uart, "UART InterEvent, not interrupting\n"); @@ -89,21 +90,20 @@ Uart8250::IntrEvent::process() void Uart8250::IntrEvent::scheduleIntr() { - static const Tick interval = (Tick)((Clock::Float::s / 2e9) * 450); + static const Tick interval = 225 * SimClock::Int::ns; DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit, - curTick + interval); + curTick() + interval); if (!scheduled()) - schedule(curTick + interval); + uart->schedule(this, curTick() + interval); else - reschedule(curTick + interval); + uart->reschedule(this, curTick() + interval); } Uart8250::Uart8250(const Params *p) - : Uart(p), IER(0), DLAB(0), LCR(0), MCR(0), lastTxInt(0), + : Uart(p, 8), IER(0), DLAB(0), LCR(0), MCR(0), lastTxInt(0), txIntrEvent(this, TX_INT), rxIntrEvent(this, RX_INT) { - pioSize = 8; } Tick @@ -113,7 +113,6 @@ Uart8250::read(PacketPtr pkt) assert(pkt->getSize() == 1); Addr daddr = pkt->getAddr() - pioAddr; - pkt->allocate(); DPRINTF(Uart, " read register %#x\n", daddr); @@ -160,6 +159,7 @@ Uart8250::read(PacketPtr pkt) pkt->set(LCR); break; case 0x4: // Modem Control Register (MCR) + pkt->set(MCR); break; case 0x5: // Line Status Register (LSR) uint8_t lsr; @@ -216,14 +216,13 @@ Uart8250::write(PacketPtr pkt) if (UART_IER_THRI & IER) { DPRINTF(Uart, "IER: IER_THRI set, scheduling TX intrrupt\n"); - if (curTick - lastTxInt > - (Tick)((Clock::Float::s / 2e9) * 450)) { + if (curTick() - lastTxInt > 225 * SimClock::Int::ns) { DPRINTF(Uart, "-- Interrupting Immediately... %d,%d\n", - curTick, lastTxInt); + curTick(), lastTxInt); txIntrEvent.process(); } else { DPRINTF(Uart, "-- Delaying interrupt... %d,%d\n", - curTick, lastTxInt); + curTick(), lastTxInt); txIntrEvent.scheduleIntr(); } } @@ -231,7 +230,7 @@ Uart8250::write(PacketPtr pkt) { DPRINTF(Uart, "IER: IER_THRI cleared, descheduling TX intrrupt\n"); if (txIntrEvent.scheduled()) - txIntrEvent.deschedule(); + deschedule(txIntrEvent); if (status & TX_INT) platform->clearConsoleInt(); status &= ~TX_INT; @@ -243,7 +242,7 @@ Uart8250::write(PacketPtr pkt) } else { DPRINTF(Uart, "IER: IER_RDI cleared, descheduling RX intrrupt\n"); if (rxIntrEvent.scheduled()) - rxIntrEvent.deschedule(); + deschedule(rxIntrEvent); if (status & RX_INT) platform->clearConsoleInt(); status &= ~RX_INT; @@ -284,16 +283,14 @@ Uart8250::dataAvailable() } -void -Uart8250::addressRanges(AddrRangeList &range_list) +AddrRangeList +Uart8250::getAddrRanges() const { - assert(pioSize != 0); - range_list.clear(); - range_list.push_back(RangeSize(pioAddr, pioSize)); + AddrRangeList ranges; + ranges.push_back(RangeSize(pioAddr, pioSize)); + return ranges; } - - void Uart8250::serialize(ostream &os) { @@ -329,9 +326,9 @@ Uart8250::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(rxintrwhen); UNSERIALIZE_SCALAR(txintrwhen); if (rxintrwhen != 0) - rxIntrEvent.schedule(rxintrwhen); + schedule(rxIntrEvent, rxintrwhen); if (txintrwhen != 0) - txIntrEvent.schedule(txintrwhen); + schedule(txIntrEvent, txintrwhen); } Uart8250 *