X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Ffreedreno%2Fregisters%2Fa4xx.xml;h=b4c42538b7f560f3299d14160b8a7ff434d85743;hb=d35b54c7058c9880327901908edddbb478d969e5;hp=284e491c886a5443696217c7b3cbb480f807d9b7;hpb=e369b8931c675a6e86715c682723b085e45e0ee5;p=mesa.git

diff --git a/src/freedreno/registers/a4xx.xml b/src/freedreno/registers/a4xx.xml
index 284e491c886..b4c42538b7f 100644
--- a/src/freedreno/registers/a4xx.xml
+++ b/src/freedreno/registers/a4xx.xml
@@ -268,18 +268,6 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<value name="TFMT4_NONE"                  value="0xff"/>
 </enum>
 
-<enum name="a4xx_tex_fetchsize">
-	<doc>
-		Size pixel to fetch, in bytes.  Doesn't seem to be required, setting
-		it to 0x0 seems to work ok, but may be less optimal.
-	</doc>
-	<value name="TFETCH4_1_BYTE"  value="0"/>
-	<value name="TFETCH4_2_BYTE"  value="1"/>
-	<value name="TFETCH4_4_BYTE"  value="2"/>
-	<value name="TFETCH4_8_BYTE"  value="3"/>
-	<value name="TFETCH4_16_BYTE" value="4"/>
-</enum>
-
 <enum name="a4xx_depth_format">
 	<value name="DEPTH4_NONE" value="0"/>
 	<value name="DEPTH4_16" value="1"/>
@@ -923,7 +911,13 @@ perhaps they should be taken with a grain of salt
 		<bitfield name="SAMPLEID" pos="6" type="boolean"/>
 		<bitfield name="MSAA_SAMPLES" low="7" high="9" type="uint"/>
 		<bitfield name="SAMPLEID_HR" pos="11" type="boolean"/>
-		<bitfield name="VARYING" pos="12" type="boolean"/>
+		<bitfield name="IJ_PERSP_PIXEL" pos="12" type="boolean"/>
+		<!-- the 2 below are just educated guesses -->
+		<bitfield name="IJ_PERSP_CENTROID" pos="13" type="boolean"/>
+		<bitfield name="IJ_PERSP_SAMPLE" pos="14" type="boolean"/>
+		<!-- needs to be enabled to get nopersp values,
+		     perhaps other cases too? -->
+		<bitfield name="SIZE" pos="15" type="boolean"/>
 	</reg32>
 	<array offset="0x20a4" name="RB_MRT" stride="5" length="8">
 		<reg32 offset="0x0" name="CONTROL">
@@ -1407,30 +1401,30 @@ perhaps they should be taken with a grain of salt
 		<reg32 offset="0x0" name="REG"/>
 	</array>
 	<bitset name="A4XX_INT0">
-		<bitfield name="RBBM_GPU_IDLE" pos="0"/>
-		<bitfield name="RBBM_AHB_ERROR" pos="1"/>
-		<bitfield name="RBBM_REG_TIMEOUT" pos="2"/>
-		<bitfield name="RBBM_ME_MS_TIMEOUT" pos="3"/>
-		<bitfield name="RBBM_PFP_MS_TIMEOUT" pos="4"/>
-		<bitfield name="RBBM_ATB_BUS_OVERFLOW" pos="5"/>
-		<bitfield name="VFD_ERROR" pos="6"/>
-		<bitfield name="CP_SW_INT" pos="7"/>
-		<bitfield name="CP_T0_PACKET_IN_IB" pos="8"/>
-		<bitfield name="CP_OPCODE_ERROR" pos="9"/>
-		<bitfield name="CP_RESERVED_BIT_ERROR" pos="10"/>
-		<bitfield name="CP_HW_FAULT" pos="11"/>
-		<bitfield name="CP_DMA" pos="12"/>
-		<bitfield name="CP_IB2_INT" pos="13"/>
-		<bitfield name="CP_IB1_INT" pos="14"/>
-		<bitfield name="CP_RB_INT" pos="15"/>
-		<bitfield name="CP_REG_PROTECT_FAULT" pos="16"/>
-		<bitfield name="CP_RB_DONE_TS" pos="17"/>
-		<bitfield name="CP_VS_DONE_TS" pos="18"/>
-		<bitfield name="CP_PS_DONE_TS" pos="19"/>
-		<bitfield name="CACHE_FLUSH_TS" pos="20"/>
-		<bitfield name="CP_AHB_ERROR_HALT" pos="21"/>
-		<bitfield name="MISC_HANG_DETECT" pos="24"/>
-		<bitfield name="UCHE_OOB_ACCESS" pos="25"/>
+		<bitfield name="RBBM_GPU_IDLE" pos="0" type="boolean"/>
+		<bitfield name="RBBM_AHB_ERROR" pos="1" type="boolean"/>
+		<bitfield name="RBBM_REG_TIMEOUT" pos="2" type="boolean"/>
+		<bitfield name="RBBM_ME_MS_TIMEOUT" pos="3" type="boolean"/>
+		<bitfield name="RBBM_PFP_MS_TIMEOUT" pos="4" type="boolean"/>
+		<bitfield name="RBBM_ATB_BUS_OVERFLOW" pos="5" type="boolean"/>
+		<bitfield name="VFD_ERROR" pos="6" type="boolean"/>
+		<bitfield name="CP_SW_INT" pos="7" type="boolean"/>
+		<bitfield name="CP_T0_PACKET_IN_IB" pos="8" type="boolean"/>
+		<bitfield name="CP_OPCODE_ERROR" pos="9" type="boolean"/>
+		<bitfield name="CP_RESERVED_BIT_ERROR" pos="10" type="boolean"/>
+		<bitfield name="CP_HW_FAULT" pos="11" type="boolean"/>
+		<bitfield name="CP_DMA" pos="12" type="boolean"/>
+		<bitfield name="CP_IB2_INT" pos="13" type="boolean"/>
+		<bitfield name="CP_IB1_INT" pos="14" type="boolean"/>
+		<bitfield name="CP_RB_INT" pos="15" type="boolean"/>
+		<bitfield name="CP_REG_PROTECT_FAULT" pos="16" type="boolean"/>
+		<bitfield name="CP_RB_DONE_TS" pos="17" type="boolean"/>
+		<bitfield name="CP_VS_DONE_TS" pos="18" type="boolean"/>
+		<bitfield name="CP_PS_DONE_TS" pos="19" type="boolean"/>
+		<bitfield name="CACHE_FLUSH_TS" pos="20" type="boolean"/>
+		<bitfield name="CP_AHB_ERROR_HALT" pos="21" type="boolean"/>
+		<bitfield name="MISC_HANG_DETECT" pos="24" type="boolean"/>
+		<bitfield name="UCHE_OOB_ACCESS" pos="25" type="boolean"/>
 	</bitset>
 
 	<reg32 offset="0x0099" name="RBBM_SP_REGFILE_SLEEP_CNTL_0"/>
@@ -1944,10 +1938,9 @@ perhaps they should be taken with a grain of salt
 		<bitfield name="ZFAR_CLIP_DISABLE" pos="17" type="boolean"/>
 		<bitfield name="ZERO_GB_SCALE_Z" pos="22" type="boolean"/>
 	</reg32>
-	<reg32 offset="0x2003" name="GRAS_CLEAR_CNTL">
-		<!-- probably not the right name, but.. -->
-		<!-- bit0 set for everything *but* fastclear -->
-		<bitfield name="NOT_FASTCLEAR" pos="0" type="boolean"/>
+	<reg32 offset="0x2003" name="GRAS_CNTL">
+		<bitfield name="IJ_PERSP" pos="0" type="boolean"/>
+		<bitfield name="IJ_LINEAR" pos="1" type="boolean"/>
 	</reg32>
 	<reg32 offset="0x2004" name="GRAS_CL_GB_CLIP_ADJ">
 		<bitfield name="HORZ" low="0" high="9" type="uint"/>
@@ -2058,17 +2051,23 @@ perhaps they should be taken with a grain of salt
 		<bitfield name="SAMPLEMASK_REGID" low="18" high="25" type="a3xx_regid"/>
 	</reg32>
 	<reg32 offset="0x23c3" name="HLSQ_CONTROL_3_REG">
-		<!-- register loaded with position (bary.f, gl_FragCoord, etc) -->
-		<bitfield name="REGID" low="0" high="7" type="a3xx_regid"/>
+		<!-- register loaded with position (bary.f) -->
+		<bitfield name="IJ_PERSP_PIXEL" low="0" high="7" type="a3xx_regid"/>
+		<bitfield name="IJ_LINEAR_PIXEL" low="8" high="15" type="a3xx_regid"/>
+		<bitfield name="IJ_PERSP_CENTROID" low="16" high="23" type="a3xx_regid"/>
+		<bitfield name="IJ_LINEAR_CENTROID" low="24" high="31" type="a3xx_regid"/>
 	</reg32>
 	<!-- 0x23c4 3 regids, lowest one goes to 0 when *not* per-sample shading -->
-	<reg32 offset="0x23c4" name="HLSQ_CONTROL_4_REG"/>
+	<reg32 offset="0x23c4" name="HLSQ_CONTROL_4_REG">
+		<bitfield name="IJ_PERSP_SAMPLE" low="0" high="7" type="a3xx_regid"/>
+		<bitfield name="IJ_LINEAR_SAMPLE" low="8" high="15" type="a3xx_regid"/>
+	</reg32>
 
 	<bitset name="a4xx_xs_control_reg" inline="yes">
 		<bitfield name="CONSTLENGTH" low="0" high="7" type="uint"/>
 		<bitfield name="CONSTOBJECTOFFSET" low="8" high="14" type="uint"/>
-		<bitfield name="SSBO_ENABLE" pos="15"/>
-		<bitfield name="ENABLED" pos="16"/>
+		<bitfield name="SSBO_ENABLE" pos="15" type="boolean"/>
+		<bitfield name="ENABLED" pos="16" type="boolean"/>
 		<bitfield name="SHADEROBJOFFSET" low="17" high="23" type="uint"/>
 		<bitfield name="INSTRLENGTH" low="24" high="31" type="uint"/>
 	</bitset>
@@ -2335,7 +2334,8 @@ perhaps they should be taken with a grain of salt
 		<bitfield name="WIDTH" low="15" high="29" type="uint"/>
 	</reg32>
 	<reg32 offset="2" name="2">
-		<bitfield name="FETCHSIZE" low="0" high="3" type="a4xx_tex_fetchsize"/>
+		<!-- minimum pitch (for mipmap levels): log2(pitchalign / 32) -->
+		<bitfield name="PITCHALIGN" low="0" high="3" type="uint"/>
 		<doc>Pitch in bytes (so actually stride)</doc>
 		<bitfield name="PITCH" low="9" high="29" type="uint"/>
 		<bitfield name="SWAP" low="30" high="31" type="a3xx_color_swap"/>