X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fauxiliary%2Ftgsi%2Ftgsi_info.c;h=0beef44454dd121ef606de6b7dcc3efce62c7bf7;hb=c27d8cc0c9e605073f2d4b734a74f931d3a67195;hp=f8a3cb665f9efa508dd040bf51082ad34cb2b8a8;hpb=614982d320985c04e247293b54b66d7df5c19004;p=mesa.git

diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index f8a3cb665f9..0beef44454d 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -76,7 +76,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
    { 1, 1, 0, 0, 0, 0, REPL, "COS", TGSI_OPCODE_COS },
    { 1, 1, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX },
    { 1, 1, 0, 0, 0, 0, COMP, "DDY", TGSI_OPCODE_DDY },
-   { 0, 0, 0, 0, 0, 0, NONE, "KILP", TGSI_OPCODE_KILP },
+   { 0, 0, 0, 0, 0, 0, NONE, "KILL", TGSI_OPCODE_KILL },
    { 1, 1, 0, 0, 0, 0, COMP, "PK2H", TGSI_OPCODE_PK2H },
    { 1, 1, 0, 0, 0, 0, COMP, "PK2US", TGSI_OPCODE_PK2US },
    { 1, 1, 0, 0, 0, 0, COMP, "PK4B", TGSI_OPCODE_PK4B },
@@ -112,7 +112,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
    { 1, 2, 1, 0, 0, 0, OTHR, "TXL", TGSI_OPCODE_TXL },
    { 0, 0, 0, 0, 0, 0, NONE, "BRK", TGSI_OPCODE_BRK },
    { 0, 1, 0, 1, 0, 1, NONE, "IF", TGSI_OPCODE_IF },
-   { 1, 1, 0, 0, 0, 1, NONE, "", 75 },      /* removed */
+   { 0, 1, 0, 1, 0, 1, NONE, "UIF", TGSI_OPCODE_UIF },
    { 0, 1, 0, 0, 0, 1, NONE, "", 76 },      /* removed */
    { 0, 0, 0, 1, 1, 1, NONE, "ELSE", TGSI_OPCODE_ELSE },
    { 0, 0, 0, 0, 1, 0, NONE, "ENDIF", TGSI_OPCODE_ENDIF },
@@ -145,15 +145,15 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
    { 0, 0, 0, 0, 0, 0, NONE, "", 105 },     /* removed */
    { 0, 0, 0, 0, 0, 0, NONE, "", 106 },     /* removed */
    { 0, 0, 0, 0, 0, 0, NONE, "NOP", TGSI_OPCODE_NOP },
-   { 0, 0, 0, 0, 0, 0, NONE, "", 108 },     /* removed */
-   { 0, 0, 0, 0, 0, 0, NONE, "", 109 },     /* removed */
-   { 0, 0, 0, 0, 0, 0, NONE, "", 110 },     /* removed */
-   { 0, 0, 0, 0, 0, 0, NONE, "", 111 },     /* removed */
+   { 1, 2, 0, 0, 0, 0, COMP, "FSEQ", TGSI_OPCODE_FSEQ },
+   { 1, 2, 0, 0, 0, 0, COMP, "FSGE", TGSI_OPCODE_FSGE },
+   { 1, 2, 0, 0, 0, 0, COMP, "FSLT", TGSI_OPCODE_FSLT },
+   { 1, 2, 0, 0, 0, 0, COMP, "FSNE", TGSI_OPCODE_FSNE },
    { 1, 1, 0, 0, 0, 0, REPL, "NRM4", TGSI_OPCODE_NRM4 },
    { 0, 1, 0, 0, 0, 0, NONE, "CALLNZ", TGSI_OPCODE_CALLNZ },
-   { 0, 1, 0, 0, 0, 0, NONE, "IFC", TGSI_OPCODE_IFC },
+   { 0, 1, 0, 0, 0, 0, NONE, "", 114 },     /* removed */
    { 0, 1, 0, 0, 0, 0, NONE, "BREAKC", TGSI_OPCODE_BREAKC },
-   { 0, 1, 0, 0, 0, 0, NONE, "KIL", TGSI_OPCODE_KIL },
+   { 0, 1, 0, 0, 0, 0, NONE, "KILL_IF", TGSI_OPCODE_KILL_IF },
    { 0, 0, 0, 0, 0, 0, NONE, "END", TGSI_OPCODE_END },
    { 0, 0, 0, 0, 0, 0, NONE, "", 118 },     /* removed */
    { 1, 1, 0, 0, 0, 0, COMP, "F2I", TGSI_OPCODE_F2I },
@@ -185,12 +185,12 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
 
    { 1, 3, 0, 0, 0, 0, OTHR, "SAMPLE",      TGSI_OPCODE_SAMPLE },
    { 1, 2, 0, 0, 0, 0, OTHR, "SAMPLE_I",    TGSI_OPCODE_SAMPLE_I },
-   { 1, 2, 0, 0, 0, 0, OTHR, "SAMPLE_I_MS", TGSI_OPCODE_SAMPLE_I_MS },
+   { 1, 3, 0, 0, 0, 0, OTHR, "SAMPLE_I_MS", TGSI_OPCODE_SAMPLE_I_MS },
    { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_B",    TGSI_OPCODE_SAMPLE_B },
    { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_C",    TGSI_OPCODE_SAMPLE_C },
    { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_C_LZ", TGSI_OPCODE_SAMPLE_C_LZ },
    { 1, 5, 0, 0, 0, 0, OTHR, "SAMPLE_D",    TGSI_OPCODE_SAMPLE_D },
-   { 1, 3, 0, 0, 0, 0, OTHR, "SAMPLE_L",    TGSI_OPCODE_SAMPLE_L },
+   { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_L",    TGSI_OPCODE_SAMPLE_L },
    { 1, 3, 0, 0, 0, 0, OTHR, "GATHER4",     TGSI_OPCODE_GATHER4 },
    { 1, 2, 0, 0, 0, 0, OTHR, "SVIEWINFO",   TGSI_OPCODE_SVIEWINFO },
    { 1, 2, 0, 0, 0, 0, OTHR, "SAMPLE_POS",  TGSI_OPCODE_SAMPLE_POS },
@@ -219,6 +219,8 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
    { 1, 3, 1, 0, 0, 0, OTHR, "TEX2", TGSI_OPCODE_TEX2 },
    { 1, 3, 1, 0, 0, 0, OTHR, "TXB2", TGSI_OPCODE_TXB2 },
    { 1, 3, 1, 0, 0, 0, OTHR, "TXL2", TGSI_OPCODE_TXL2 },
+   { 1, 2, 0, 0, 0, 0, COMP, "IMUL_HI", TGSI_OPCODE_IMUL_HI },
+   { 1, 2, 0, 0, 0, 0, COMP, "UMUL_HI", TGSI_OPCODE_UMUL_HI },
 };
 
 const struct tgsi_opcode_info *
@@ -264,42 +266,49 @@ tgsi_get_processor_name( uint processor )
    }
 }
 
-/*
- * infer the source type of a TGSI opcode.
- * MOV is special so return VOID
+/**
+ * Infer the type (of the dst) of the opcode.
+ *
+ * MOV and UCMP is special so return VOID
  */
-enum tgsi_opcode_type
-tgsi_opcode_infer_src_type( uint opcode )
+static INLINE enum tgsi_opcode_type
+tgsi_opcode_infer_type( uint opcode )
 {
    switch (opcode) {
    case TGSI_OPCODE_MOV:
+   case TGSI_OPCODE_UCMP:
       return TGSI_TYPE_UNTYPED;
+   case TGSI_OPCODE_NOT:
+   case TGSI_OPCODE_SHL:
    case TGSI_OPCODE_AND:
    case TGSI_OPCODE_OR:
    case TGSI_OPCODE_XOR:
-   case TGSI_OPCODE_SAD:
-   case TGSI_OPCODE_U2F:
-   case TGSI_OPCODE_UADD:
+   case TGSI_OPCODE_SAD: /* XXX some src args may be signed for SAD ? */
+   case TGSI_OPCODE_TXQ:
+   case TGSI_OPCODE_TXQ_LZ:
+   case TGSI_OPCODE_F2U:
    case TGSI_OPCODE_UDIV:
-   case TGSI_OPCODE_UMOD:
    case TGSI_OPCODE_UMAD:
-   case TGSI_OPCODE_UMUL:
    case TGSI_OPCODE_UMAX:
    case TGSI_OPCODE_UMIN:
+   case TGSI_OPCODE_UMOD:
+   case TGSI_OPCODE_UMUL:
    case TGSI_OPCODE_USEQ:
    case TGSI_OPCODE_USGE:
+   case TGSI_OPCODE_USHR:
    case TGSI_OPCODE_USLT:
    case TGSI_OPCODE_USNE:
-   case TGSI_OPCODE_USHR:
-   case TGSI_OPCODE_SHL:
-   case TGSI_OPCODE_TXQ:
    case TGSI_OPCODE_SVIEWINFO:
-   case TGSI_OPCODE_TXF:
-   case TGSI_OPCODE_SAMPLE_I:
-   case TGSI_OPCODE_SAMPLE_I_MS:
+   case TGSI_OPCODE_UMUL_HI:
       return TGSI_TYPE_UNSIGNED;
+   case TGSI_OPCODE_ARL:
+   case TGSI_OPCODE_ARR:
    case TGSI_OPCODE_MOD:
-   case TGSI_OPCODE_I2F:
+   case TGSI_OPCODE_F2I:
+   case TGSI_OPCODE_FSEQ:
+   case TGSI_OPCODE_FSGE:
+   case TGSI_OPCODE_FSLT:
+   case TGSI_OPCODE_FSNE:
    case TGSI_OPCODE_IDIV:
    case TGSI_OPCODE_IMAX:
    case TGSI_OPCODE_IMIN:
@@ -307,9 +316,11 @@ tgsi_opcode_infer_src_type( uint opcode )
    case TGSI_OPCODE_ISGE:
    case TGSI_OPCODE_ISHR:
    case TGSI_OPCODE_ISLT:
+   case TGSI_OPCODE_UADD:
+   case TGSI_OPCODE_UARL:
    case TGSI_OPCODE_IABS:
    case TGSI_OPCODE_ISSG:
-   case TGSI_OPCODE_UARL:
+   case TGSI_OPCODE_IMUL_HI:
       return TGSI_TYPE_SIGNED;
    default:
       return TGSI_TYPE_FLOAT;
@@ -317,53 +328,47 @@ tgsi_opcode_infer_src_type( uint opcode )
 }
 
 /*
- * infer the destination type of a TGSI opcode.
- * MOV is special so return VOID
+ * infer the source type of a TGSI opcode.
  */
 enum tgsi_opcode_type
-tgsi_opcode_infer_dst_type( uint opcode )
+tgsi_opcode_infer_src_type( uint opcode )
 {
    switch (opcode) {
-   case TGSI_OPCODE_MOV:
-      return TGSI_TYPE_UNTYPED;
-   case TGSI_OPCODE_F2U:
-   case TGSI_OPCODE_AND:
-   case TGSI_OPCODE_OR:
-   case TGSI_OPCODE_XOR:
-   case TGSI_OPCODE_SAD:
+   case TGSI_OPCODE_UIF:
+   case TGSI_OPCODE_TXF:
+   case TGSI_OPCODE_BREAKC:
+   case TGSI_OPCODE_U2F:
    case TGSI_OPCODE_UADD:
-   case TGSI_OPCODE_UDIV:
-   case TGSI_OPCODE_UMOD:
-   case TGSI_OPCODE_UMAD:
-   case TGSI_OPCODE_UMUL:
-   case TGSI_OPCODE_UMAX:
-   case TGSI_OPCODE_UMIN:
-   case TGSI_OPCODE_USEQ:
-   case TGSI_OPCODE_USGE:
-   case TGSI_OPCODE_USLT:
-   case TGSI_OPCODE_USNE:
-   case TGSI_OPCODE_USHR:
-   case TGSI_OPCODE_SHL:
-   case TGSI_OPCODE_TXQ:
-   case TGSI_OPCODE_TXQ_LZ:
-   case TGSI_OPCODE_SVIEWINFO:
+   case TGSI_OPCODE_SWITCH:
+   case TGSI_OPCODE_CASE:
+   case TGSI_OPCODE_SAMPLE_I:
+   case TGSI_OPCODE_SAMPLE_I_MS:
+   case TGSI_OPCODE_UMUL_HI:
       return TGSI_TYPE_UNSIGNED;
-   case TGSI_OPCODE_F2I:
-   case TGSI_OPCODE_IDIV:
-   case TGSI_OPCODE_IMAX:
-   case TGSI_OPCODE_IMIN:
-   case TGSI_OPCODE_INEG:
-   case TGSI_OPCODE_ISGE:
-   case TGSI_OPCODE_ISHR:
-   case TGSI_OPCODE_ISLT:
-   case TGSI_OPCODE_MOD:
-   case TGSI_OPCODE_UARL:
+   case TGSI_OPCODE_IMUL_HI:
+   case TGSI_OPCODE_I2F:
+      return TGSI_TYPE_SIGNED;
    case TGSI_OPCODE_ARL:
    case TGSI_OPCODE_ARR:
-   case TGSI_OPCODE_IABS:
-   case TGSI_OPCODE_ISSG:
-      return TGSI_TYPE_SIGNED;
-   default:
+   case TGSI_OPCODE_TXQ_LZ:
+   case TGSI_OPCODE_F2I:
+   case TGSI_OPCODE_F2U:
+   case TGSI_OPCODE_FSEQ:
+   case TGSI_OPCODE_FSGE:
+   case TGSI_OPCODE_FSLT:
+   case TGSI_OPCODE_FSNE:
+   case TGSI_OPCODE_UCMP:
       return TGSI_TYPE_FLOAT;
+   default:
+      return tgsi_opcode_infer_type(opcode);
    }
 }
+
+/*
+ * infer the destination type of a TGSI opcode.
+ */
+enum tgsi_opcode_type
+tgsi_opcode_infer_dst_type( uint opcode )
+{
+   return tgsi_opcode_infer_type(opcode);
+}