X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fauxiliary%2Ftgsi%2Ftgsi_info.h;h=2c97bb62deea1edc8aed777cde2f7a43cc8fc4f1;hb=d95c2d86cc095d73759b4db1b2689013af66f622;hp=74713c3b98a3b054e9210eebdad8efdee89b57a5;hpb=8398535331dae39ff5f52e94a69abdbf7507a343;p=mesa.git

diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.h b/src/gallium/auxiliary/tgsi/tgsi_info.h
index 74713c3b98a..2c97bb62dee 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.h
@@ -1,6 +1,6 @@
 /**************************************************************************
  * 
- * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2008 VMware, Inc.
  * All Rights Reserved.
  * 
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,7 +18,7 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
@@ -28,22 +28,58 @@
 #ifndef TGSI_INFO_H
 #define TGSI_INFO_H
 
+#include "pipe/p_compiler.h"
 #include "pipe/p_shader_tokens.h"
+#include "util/u_format.h"
 
 #if defined __cplusplus
 extern "C" {
 #endif
 
+/* This enum describes how an opcode calculates its result. */
+enum tgsi_output_mode {
+   /** The opcode produces no result. */
+   TGSI_OUTPUT_NONE            = 0,
+
+   /** When this opcode writes to a channel of the destination register,
+    *  it takes as arguments values from the same channel of the source
+    *  register(s).
+    *
+    *  Example: TGSI_OPCODE_ADD
+    */
+   TGSI_OUTPUT_COMPONENTWISE   = 1,
+
+   /** This opcode writes the same value to all enabled channels of the
+    * destination register.
+    *
+    *  Example: TGSI_OPCODE_RSQ
+    */
+   TGSI_OUTPUT_REPLICATE       = 2,
+
+   /** The operation performed by this opcode is dependent on which channel
+    *  of the destination register is being written.
+    *
+    *  Example: TGSI_OPCODE_LOG
+    */
+   TGSI_OUTPUT_CHAN_DEPENDENT  = 3,
+
+   /**
+    * Example: TGSI_OPCODE_TEX
+    */
+   TGSI_OUTPUT_OTHER           = 4
+};
+
 struct tgsi_opcode_info
 {
    unsigned num_dst:3;
    unsigned num_src:3;
    unsigned is_tex:1;
+   unsigned is_store:1;
    unsigned is_branch:1;
-   int pre_dedent:2;
-   int post_indent:2;
-   const char *mnemonic;
-   uint opcode;
+   unsigned pre_dedent:1;
+   unsigned post_indent:1;
+   enum tgsi_output_mode output_mode:4;
+   unsigned opcode:8;
 };
 
 const struct tgsi_opcode_info *
@@ -52,6 +88,33 @@ tgsi_get_opcode_info( uint opcode );
 const char *
 tgsi_get_opcode_name( uint opcode );
 
+const char *
+tgsi_get_processor_name(enum pipe_shader_type processor);
+
+enum tgsi_opcode_type {
+   TGSI_TYPE_UNTYPED, /* for MOV */
+   TGSI_TYPE_VOID,
+   TGSI_TYPE_UNSIGNED,
+   TGSI_TYPE_SIGNED,
+   TGSI_TYPE_FLOAT,
+   TGSI_TYPE_DOUBLE,
+   TGSI_TYPE_UNSIGNED64,
+   TGSI_TYPE_SIGNED64,
+};
+
+static inline bool tgsi_type_is_64bit(enum tgsi_opcode_type type)
+{
+   if (type == TGSI_TYPE_DOUBLE || type == TGSI_TYPE_UNSIGNED64 ||
+       type == TGSI_TYPE_SIGNED64)
+      return true;
+   return false;
+}
+
+enum tgsi_opcode_type
+tgsi_opcode_infer_src_type( uint opcode, uint src_idx );
+
+enum tgsi_opcode_type
+tgsi_opcode_infer_dst_type( uint opcode, uint dst_idx );
 
 #if defined __cplusplus
 }