X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdocs%2Fsource%2Fscreen.rst;h=141b45aa8058b5cfe947ec061d9704406a3e0109;hb=59a692916ca251db995050f7fc0bb7b4e6e4780b;hp=bd553f4408622fe62c5762a39b6b3630b5cea707;hpb=d34d5fddf85b79f8eacd93c4f87bd7125e852f0a;p=mesa.git diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index bd553f44086..141b45aa805 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -138,6 +138,10 @@ The integer capabilities: * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required alignment for pipe_sampler_view::u.buf.first_element, in bytes. If a driver does not support first/last_element, it should return 0. +* ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only + supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views. + When this is the case it should be assumed that the swizzle parameters + in the sampler view have no effect. * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation. If true, the hardware cannot replace arbitrary shader inputs with sprite coordinates and hence the inputs that are desired to be replaceable must @@ -164,24 +168,183 @@ The integer capabilities: view it is intended to be used with, or herein undefined results may occur for permutational swizzles. * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with - a buffer sampler view, in bytes. + a buffer sampler view, in texels. * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors since they are linked) a driver can support. Returning 0 is equivalent to returning 1 because every driver has to support at least a single - viewport/scissor combination. -* ''PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either + viewport/scissor combination. +* ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE. * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have different sizes for fb color/zs attachments. This controls whether ARB_framebuffer_object is provided. -* ``PIPE_CAP_TGSI_VS_LAYER``: Whether TGSI_SEMANTIC_LAYER is supported - as a vertex shader output. +* ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and + ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader + outputs. Note that the viewport will only be used if multiple viewports are + exposed. * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices output by a single invocation of a geometry shader. * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of vertex components output by a single invocation of a geometry shader. This is the product of the number of attribute components per vertex and the number of output vertices. +* ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components + in format that texture gather can operate on. 1 == RED, ALPHA etc, + 4 == All formats. +* ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather + hardware implements the SM5 features, component selection, + shadow comparison, and run-time offsets. +* ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether + PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported + for buffers. +* ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is + supported. +* ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used + in conjunction with a texture gather opcode. +* ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used + in conjunction with a texture gather opcode. +* ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample + shading. The context->set_min_samples function will be expected to be + implemented. +* ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can + accept 4 offsets. +* ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether + TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping + and viewport transformation. +* ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams + supported by the geometry shader. If stream-out is supported, this should be + at least 1. If stream-out is not supported, this should be 0. +* ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments + { count, instance_count, start, index_bias } from a PIPE_BUFFER resource. + See pipe_draw_info. +* ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports + pipe_draw_info::indirect_stride and ::indirect_count +* ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports + taking the number of indirect draws from a separate parameter + buffer, see pipe_draw_info::indirect_params. +* ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports + the FINE versions of DDX/DDY. +* ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's + not available one should return 0xFFFFFFFF. +* ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware. + 0xFFFFFFFF if not available. +* ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated. +* ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes. +* ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card + memory and GART. +* ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted + condition for conditional rendering. +* ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride. +* ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be + different than the underlying resource's, as permitted by + ARB_texture_view. For example a 2d array texture may be reinterpreted as a + cube (array) texture and vice-versa. +* ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the + pipe_rasterizer_state::clip_halfz being set to true. This is required + for enabling ARB_clip_control. +* ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports + TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means + state trackers for APIs whose vertexIDs are offset by basevertex (such as GL) + will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE + and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these + semantics. Only relevant if geometry shaders are supported. + (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``). +* ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support + for ``pipe_rasterizer_state::offset_clamp``. +* ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting + a multisampled depth buffer into a single-sampled texture (or depth buffer). + Only the first sampled should be copied. +* ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create + a pipe_resource where an already-existing piece of (malloc'd) user memory + is used as its backing storage. In other words, whether the driver can map + existing user memory into the device address space for direct device access. + The create function is pipe_screen::resource_from_user_memory. The address + and size must be page-aligned. +* ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``: + Whether pipe_context::get_device_reset_status is implemented. +* ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``: + How many per-patch outputs and inputs are supported between tessellation + control and tessellation evaluation shaders, not counting in TESSINNER and + TESSOUTER. The minimum allowed value for OpenGL is 30. +* ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and + magnification filters are supported with single-precision floating-point + textures. +* ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and + magnification filters are supported with half-precision floating-point + textures. +* ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and + bounds_max states of pipe_depth_stencil_alpha_state behave according + to the GL_EXT_depth_bounds_test specification. +* ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported +* ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample + interpolation for all fragment shader inputs if + pipe_rasterizer_state::force_persample_interp is set. This is only used + by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading + (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it, + GL4 hardware will likely need to emulate it with a shader variant, or by + selecting the interpolation weights with a conditional assignment + in the shader. +* ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any + pipe_context. +* ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``: + Whether copying between compressed and plain formats is supported where + a compressed block is copied to/from a plain pixel of the same size. +* ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be + available in contexts. +* ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``, + ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are + supported in vertex shaders. +* ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H`` + TGSI opcodes are supported. +* ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If state trackers should use + a system value for the POSITION fragment shader input. +* ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If state trackers should use + a system value for the FACE fragment shader input. + Also, the FACE system value is integer, not float. +* ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required + alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum + value allowed is 256 (for GL conformance). 0 is only allowed if + shader buffers are not supported. +* ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource`` + for buffers is supported. +* ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap + is supported. +* ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported. +* ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether + pipe_context::create_surface supports reinterpreting a texture as a surface + of a format with different block width/height (but same block size in bits). + For example, a compressed texture image can be interpreted as a + non-compressed surface whose texels are the same number of bits as the + compressed blocks, and vice versa. The width and height of the surface is + adjusted appropriately. +* ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports + context::get_query_result_resource callback. +* ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number. +* ``PIPE_CAP_PCI_BUS``: Return the PCI bus number. +* ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number. +* ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number. +* ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``: + If non-zero, rendering to framebuffers with no surface attachments + is supported. The context->is_format_supported function will be expected + to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware + supports. N.B., The maximum number of layers supported for rasterizing a + primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS`` + even though it can be larger than the number of layers supported by either + rendering or textures. +* ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds + checking on resource accesses by shader if the context is created with + PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior + extension for information on the required behavior for out of bounds accesses + and accesses to unbound resources. +* ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance + extension and thus implements proper support for culling planes. +* ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is + supported for patch primitives. +* ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders. +* ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles + supported in ``set_window_rectangles``. +* ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support + for ``pipe_rasterizer_state::offset_units_unscaled``. .. _pipe_capf: @@ -219,12 +382,14 @@ support different features. * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections. * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth. * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers. -* ``PIPE_SHADER_CAP_MAX_CONSTS``: The maximum number of constants. +* ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers. + This is valid for all shaders except the fragment shader. +* ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes. * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will only permit binding one constant buffer per shader, and the shaders will not permit two-dimensional access to constants. - + If a value greater than 0 is returned, the driver can have multiple constant buffers bound to shader stages. The CONST register file can be accessed with two-dimensional indices, like in the example below. @@ -236,9 +401,8 @@ MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0 For backwards compatibility, one-dimensional access to CONST register file is still supported. In that case, the constbuf index is assumed to be 0. - + * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers. -* ``PIPE_SHADER_CAP_MAX_ADDRS``: The maximum number of address registers. * ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers. * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported. * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing @@ -259,6 +423,27 @@ to be 0. program. It should be one of the ``pipe_shader_ir`` enum values. * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS. +* ``PIPE_SHADER_CAP_DOUBLES``: Whether double precision floating-point + operations are supported. +* ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding + is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used. +* ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and + DLDEXP are supported. +* ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only) + are supported. +* ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't + ignore tgsi_declaration_range::Last for shader inputs and outputs. +* ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number + of iterations that loops are allowed to have to be unrolled. It is only + a hint to state trackers. Whether any loops will be unrolled is not + guaranteed. +* ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers + (also used to implement atomic counters). Having this be non-0 also + implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI + opcodes. +* ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the + program. It should be a mask of ``pipe_shader_ir`` bits. +* ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units. .. _pipe_compute_cap: @@ -271,30 +456,38 @@ pipe_screen::get_compute_param. * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form ``processor-arch-manufacturer-os`` that will be passed on to the compiler. - This CAP is only relevant for drivers that specify PIPE_SHADER_IR_LLVM for - their preferred IR. - Value type: null-terminated string. + This CAP is only relevant for drivers that specify PIPE_SHADER_IR_LLVM + or PIPE_SHADER_IR_NATIVE for their preferred IR. + Value type: null-terminated string. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions - for grid and block coordinates. Value type: ``uint64_t``. + for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block - units. Value type: ``uint64_t []``. + units. Value type: ``uint64_t []``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread - units. Value type: ``uint64_t []``. + units. Value type: ``uint64_t []``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that - a single block can contain. Value type: ``uint64_t``. + a single block can contain. Value type: ``uint64_t``. Shader IR type dependent. This may be less than the product of the components of MAX_BLOCK_SIZE and is usually limited by the number of threads that can be resident simultaneously on a compute unit. * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL - resource. Value type: ``uint64_t``. + resource. Value type: ``uint64_t``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL - resource. Value type: ``uint64_t``. + resource. Value type: ``uint64_t``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE - resource. Value type: ``uint64_t``. + resource. Value type: ``uint64_t``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT - resource. Value type: ``uint64_t``. + resource. Value type: ``uint64_t``. Shader IR type dependent. * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object allocation in bytes. Value type: ``uint64_t``. +* ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU + clock in MHz. Value type: ``uint32_t`` +* ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units + Value type: ``uint32_t`` +* ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported + non-zero means yes, zero means no. Value type: ``uint32_t`` +* ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in + threads. Also known as wavefront size, warp size or SIMD width. .. _pipe_bind: @@ -335,10 +528,15 @@ resources might be created and handled quite differently. process. * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global address space of a compute program. -* ``PIPE_BIND_SHADER_RESOURCE``: A buffer or texture that can be - bound to the graphics pipeline as a shader resource. +* ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound + to a shader and can be used with load, store, and atomic instructions. +* ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be + bound to a shader and can be used with load, store, and atomic instructions. * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be bound to the compute program as a shader resource. +* ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the + GPU command processor. It can contain, for example, the arguments to + indirect draw calls. .. _pipe_usage: @@ -374,6 +572,12 @@ get_vendor Returns the screen vendor. +get_device_vendor +^^^^^^^^^^^^^^^^^ + +Returns the actual vendor of the device driving the screen +(as opposed to the driver vendor). + .. _get_param: get_param @@ -428,6 +632,8 @@ memory). This is used to implement OpenGL's proxy textures. Typically, a driver will simply check if the total size of the given resource is less than some limit. +For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6. + .. _resource_create: @@ -492,3 +698,13 @@ query at the specified **index** is returned in **info**. The function returns non-zero on success. The driver-specific query is described with the pipe_driver_query_info structure. + +get_driver_query_group_info +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Return a driver-specific query group. If the **info** parameter is NULL, +the number of available groups is returned. Otherwise, the driver +query group at the specified **index** is returned in **info**. +The function returns non-zero on success. +The driver-specific query group is described with the +pipe_driver_query_group_info structure.