X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fetnaviv%2Fetnaviv_screen.c;h=8c80c1e95565284b5b1f22c94c7df9bd13add169;hb=a5e7c12cedb8a91236dd3caf99133f86349702a9;hp=35dcac1409bce946df449062b70e57e214aeb239;hpb=6010d7b8e8bee1bcea2b329cf6d3b44c5fc3ca66;p=mesa.git diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c index 35dcac1409b..8c80c1e9556 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c @@ -38,6 +38,7 @@ #include "etnaviv_resource.h" #include "etnaviv_translate.h" +#include "util/hash_table.h" #include "util/os_time.h" #include "util/u_math.h" #include "util/u_memory.h" @@ -46,7 +47,7 @@ #include "state_tracker/drm_driver.h" -#include +#include "drm-uapi/drm_fourcc.h" #define ETNA_DRM_VERSION(major, minor) ((major) << 16 | (minor)) #define ETNA_DRM_VERSION_FENCE_FD ETNA_DRM_VERSION(1, 1) @@ -71,6 +72,7 @@ static const struct debug_named_value debug_options[] = { {"draw_stall", ETNA_DBG_DRAW_STALL, "Stall FE/PE after each rendered primitive"}, {"shaderdb", ETNA_DBG_SHADERDB, "Enable shaderdb output"}, {"no_singlebuffer",ETNA_DBG_NO_SINGLEBUF, "Disable single buffer feature"}, + {"nir", ETNA_DBG_NIR, "use new NIR compiler"}, DEBUG_NAMED_VALUE_END }; @@ -82,6 +84,9 @@ etna_screen_destroy(struct pipe_screen *pscreen) { struct etna_screen *screen = etna_screen(pscreen); + _mesa_set_destroy(screen->used_resources, NULL); + mtx_destroy(&screen->lock); + if (screen->perfmon) etna_perfmon_del(screen->perfmon); @@ -106,8 +111,8 @@ etna_screen_get_name(struct pipe_screen *pscreen) struct etna_screen *priv = etna_screen(pscreen); static char buffer[128]; - util_snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model, - priv->revision); + snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model, + priv->revision); return buffer; } @@ -136,7 +141,9 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - case PIPE_CAP_SM3: + case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD: + case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES: + case PIPE_CAP_VERTEX_SHADER_SATURATE: case PIPE_CAP_TEXTURE_BARRIER: case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: @@ -148,15 +155,17 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 1; case PIPE_CAP_NATIVE_FENCE_FD: return screen->drm_version >= ETNA_DRM_VERSION_FENCE_FD; + case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: + case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: /* note: not integer */ + return DBG_ENABLED(ETNA_DBG_NIR); + case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL: + return 0; /* Memory */ case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: return 4; /* XXX could easily be supported */ - case PIPE_CAP_GLSL_FEATURE_LEVEL: - case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY: - return 120; case PIPE_CAP_NPOT_TEXTURES: return true; /* VIV_FEATURE(priv->dev, chipMinorFeatures1, @@ -166,195 +175,48 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_PRIMITIVE_RESTART: return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); - case PIPE_CAP_ENDIANNESS: - return PIPE_ENDIAN_LITTLE; /* on most Viv hw this is configurable (feature - ENDIANNESS_CONFIG) */ - /* Unsupported features. */ - case PIPE_CAP_SEAMLESS_CUBE_MAP: - case PIPE_CAP_COMPUTE: /* XXX supported on gc2000 */ - case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: /* only one colorbuffer supported, so mixing makes no sense */ - case PIPE_CAP_CONDITIONAL_RENDER: /* no occlusion queries */ - case PIPE_CAP_TGSI_INSTANCEID: /* no idea, really */ - case PIPE_CAP_START_INSTANCE: /* instancing not supported AFAIK */ - case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: /* instancing not supported AFAIK */ - case PIPE_CAP_SHADER_STENCIL_EXPORT: /* Fragment shader cannot export stencil value */ - case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: /* no dual-source supported */ - case PIPE_CAP_TEXTURE_MULTISAMPLE: /* no texture multisample */ - case PIPE_CAP_TEXTURE_MIRROR_CLAMP: /* only mirrored repeat */ - case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE: /* only mirrored repeat */ - case PIPE_CAP_INDEP_BLEND_ENABLE: - case PIPE_CAP_INDEP_BLEND_FUNC: - case PIPE_CAP_DEPTH_CLIP_DISABLE: - case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE: - case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: - case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: /* Don't skip strict max uniform limit check */ - case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: - case PIPE_CAP_VERTEX_COLOR_CLAMPED: - case PIPE_CAP_USER_VERTEX_BUFFERS: - case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: - case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: /* TODO: test me out with piglit */ - case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: - case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: - case PIPE_CAP_TEXTURE_GATHER_SM5: - case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: - case PIPE_CAP_FAKE_SW_MSAA: - case PIPE_CAP_TEXTURE_QUERY_LOD: - case PIPE_CAP_SAMPLE_SHADING: - case PIPE_CAP_TEXTURE_GATHER_OFFSETS: - case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: - case PIPE_CAP_DRAW_INDIRECT: - case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: - case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: - case PIPE_CAP_SAMPLER_VIEW_TARGET: - case PIPE_CAP_CLIP_HALFZ: - case PIPE_CAP_VERTEXID_NOBASE: - case PIPE_CAP_POLYGON_OFFSET_CLAMP: - case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: - case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: - case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: - case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: - case PIPE_CAP_TEXTURE_FLOAT_LINEAR: - case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: - case PIPE_CAP_DEPTH_BOUNDS_TEST: - case PIPE_CAP_TGSI_TXQS: - case PIPE_CAP_FORCE_PERSAMPLE_INTERP: - case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: - case PIPE_CAP_CLEAR_TEXTURE: - case PIPE_CAP_DRAW_PARAMETERS: - case PIPE_CAP_TGSI_PACK_HALF_FLOAT: - case PIPE_CAP_MULTI_DRAW_INDIRECT: - case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: - case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: - case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: - case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: - case PIPE_CAP_INVALIDATE_BUFFER: - case PIPE_CAP_GENERATE_MIPMAP: - case PIPE_CAP_STRING_MARKER: - case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: - case PIPE_CAP_QUERY_BUFFER_OBJECT: - case PIPE_CAP_QUERY_MEMORY_INFO: - case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: - case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: - case PIPE_CAP_CULL_DISTANCE: - case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: - case PIPE_CAP_TGSI_VOTE: - case PIPE_CAP_MAX_WINDOW_RECTANGLES: - case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: - case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: - case PIPE_CAP_TGSI_ARRAY_COMPONENTS: - case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: - case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: - case PIPE_CAP_TGSI_FS_FBFETCH: - case PIPE_CAP_TGSI_MUL_ZERO_WINS: - case PIPE_CAP_DOUBLES: - case PIPE_CAP_INT64: - case PIPE_CAP_INT64_DIVMOD: - case PIPE_CAP_TGSI_TEX_TXF_LZ: - case PIPE_CAP_TGSI_CLOCK: - case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: - case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE: - case PIPE_CAP_TGSI_BALLOT: - case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT: - case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX: case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: - case PIPE_CAP_POST_DEPTH_COVERAGE: - case PIPE_CAP_BINDLESS_TEXTURE: - case PIPE_CAP_NIR_SAMPLERS_AS_DEREF: - case PIPE_CAP_QUERY_SO_OVERFLOW: - case PIPE_CAP_MEMOBJ: - case PIPE_CAP_LOAD_CONSTBUF: - case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS: - case PIPE_CAP_TILE_RASTER_ORDER: - case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES: - case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS: - case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET: - case PIPE_CAP_CONTEXT_PRIORITY_MASK: - case PIPE_CAP_FENCE_SIGNAL: - case PIPE_CAP_CONSTBUF0_FLAGS: - case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES: - case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES: - case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES: - case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES: - case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE: - case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS: - case PIPE_CAP_PACKED_UNIFORMS: - case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS: - case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: return 0; - case PIPE_CAP_MAX_GS_INVOCATIONS: - return 32; - - case PIPE_CAP_MAX_SHADER_BUFFER_SIZE: - return 1 << 27; - /* Stream output. */ - case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: - case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: return 0; - /* Geometry shader output, unsupported. */ - case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: - case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: - case PIPE_CAP_MAX_VERTEX_STREAMS: - return 0; - case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: return 128; case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET: return 255; /* Texturing. */ - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + case PIPE_CAP_MAX_TEXTURE_2D_SIZE: + case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: /* TODO: verify */ + return screen->specs.max_texture_size; case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: { int log2_max_tex_size = util_last_bit(screen->specs.max_texture_size); assert(log2_max_tex_size > 0); return log2_max_tex_size; } - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: /* 3D textures not supported - fake it */ - return 5; - case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: - return 0; - case PIPE_CAP_CUBE_MAP_ARRAY: - return 0; + case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: case PIPE_CAP_MIN_TEXEL_OFFSET: return -8; case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: case PIPE_CAP_MAX_TEXEL_OFFSET: return 7; - case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: - return 0; - case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: - return 65536; - - /* Render targets. */ - case PIPE_CAP_MAX_RENDER_TARGETS: - return 1; - - /* Viewports and scissors. */ - case PIPE_CAP_MAX_VIEWPORTS: - return 1; + case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: + return VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP); /* Timer queries. */ - case PIPE_CAP_QUERY_TIME_ELAPSED: - return 0; case PIPE_CAP_OCCLUSION_QUERY: return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); case PIPE_CAP_QUERY_TIMESTAMP: return 1; - case PIPE_CAP_QUERY_PIPELINE_STATISTICS: - return 0; /* Preferences */ case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: @@ -368,9 +230,6 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_PCI_DEVICE: case PIPE_CAP_PCI_FUNCTION: return 0; - case PIPE_CAP_VENDOR_ID: - case PIPE_CAP_DEVICE_ID: - return 0xFFFFFFFF; case PIPE_CAP_ACCELERATED: return 1; case PIPE_CAP_VIDEO_MEMORY: @@ -470,7 +329,7 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen, ? screen->specs.fragment_sampler_count : screen->specs.vertex_sampler_count; case PIPE_SHADER_CAP_PREFERRED_IR: - return PIPE_SHADER_IR_TGSI; + return DBG_ENABLED(ETNA_DBG_NIR) ? PIPE_SHADER_IR_NIR : PIPE_SHADER_IR_TGSI; case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: return 4096; case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: @@ -504,8 +363,25 @@ etna_screen_get_timestamp(struct pipe_screen *pscreen) } static bool -gpu_supports_texure_format(struct etna_screen *screen, uint32_t fmt, - enum pipe_format format) +gpu_supports_texture_target(struct etna_screen *screen, + enum pipe_texture_target target) +{ + if (target == PIPE_TEXTURE_CUBE_ARRAY) + return false; + + /* pre-halti has no array/3D */ + if (screen->specs.halti < 0 && + (target == PIPE_TEXTURE_1D_ARRAY || + target == PIPE_TEXTURE_2D_ARRAY || + target == PIPE_TEXTURE_3D)) + return false; + + return true; +} + +static bool +gpu_supports_texture_format(struct etna_screen *screen, uint32_t fmt, + enum pipe_format format) { bool supported = true; @@ -518,19 +394,9 @@ gpu_supports_texure_format(struct etna_screen *screen, uint32_t fmt, if (util_format_is_srgb(format)) supported = VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); - if (fmt & EXT_FORMAT) { + if (fmt & EXT_FORMAT) supported = VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); - /* ETC1 is checked above, as it has its own feature bit. ETC2 is - * supported with HALTI0, however that implementation is buggy in hardware. - * The blob driver does per-block patching to work around this. As this - * is currently not implemented by etnaviv, enable it for HALTI1 (GC3000) - * only. - */ - if (util_format_is_etc(format)) - supported = VIV_FEATURE(screen, chipMinorFeatures2, HALTI1); - } - if (fmt & ASTC_FORMAT) { supported = screen->specs.tex_astc; } @@ -544,7 +410,7 @@ gpu_supports_texure_format(struct etna_screen *screen, uint32_t fmt, return true; } -static boolean +static bool etna_screen_is_format_supported(struct pipe_screen *pscreen, enum pipe_format format, enum pipe_texture_target target, @@ -555,13 +421,8 @@ etna_screen_is_format_supported(struct pipe_screen *pscreen, struct etna_screen *screen = etna_screen(pscreen); unsigned allowed = 0; - if (target != PIPE_BUFFER && - target != PIPE_TEXTURE_1D && - target != PIPE_TEXTURE_2D && - target != PIPE_TEXTURE_3D && - target != PIPE_TEXTURE_CUBE && - target != PIPE_TEXTURE_RECT) - return FALSE; + if (!gpu_supports_texture_target(screen, target)) + return false; if (MAX2(1, sample_count) != MAX2(1, storage_sample_count)) return false; @@ -573,7 +434,7 @@ etna_screen_is_format_supported(struct pipe_screen *pscreen, * must have MSAA'able format. */ if (sample_count > 1) { if (translate_samples_to_xyscale(sample_count, NULL, NULL, NULL) && - translate_msaa_format(format) != ETNA_NO_MATCH) { + translate_ts_format(format) != ETNA_NO_MATCH) { allowed |= PIPE_BIND_RENDER_TARGET; } } else { @@ -590,7 +451,7 @@ etna_screen_is_format_supported(struct pipe_screen *pscreen, if (usage & PIPE_BIND_SAMPLER_VIEW) { uint32_t fmt = translate_texture_format(format); - if (!gpu_supports_texure_format(screen, fmt, format)) + if (!gpu_supports_texture_format(screen, fmt, format)) fmt = ETNA_NO_MATCH; if (sample_count < 2 && fmt != ETNA_NO_MATCH) @@ -665,7 +526,7 @@ etna_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen, *count = num_modifiers; } -static boolean +static bool etna_get_specs(struct etna_screen *screen) { uint64_t val; @@ -750,8 +611,10 @@ etna_get_specs(struct etna_screen *screen) screen->specs.bits_per_tile = VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 2 : 4; screen->specs.ts_clear_value = - VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555 - : 0x11111111; + VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE) ? 0xffffffff : + VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555 : + 0x11111111; + /* vertex and fragment samplers live in one address space */ screen->specs.vertex_sampler_offset = 8; @@ -771,6 +634,8 @@ etna_get_specs(struct etna_screen *screen) VIV_FEATURE(screen, chipMinorFeatures3, HAS_FAST_TRANSCENDENTALS); screen->specs.has_halti2_instructions = VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); + screen->specs.v4_compression = + VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION); if (screen->specs.halti >= 5) { /* GC7000 - this core must load shaders from memory. */ @@ -897,6 +762,13 @@ etna_screen_bo_from_handle(struct pipe_screen *pscreen, return bo; } +static const void * +etna_get_compiler_options(struct pipe_screen *pscreen, + enum pipe_shader_ir ir, unsigned shader) +{ + return &etna_screen(pscreen)->options; +} + struct pipe_screen * etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu, struct renderonly *ro) @@ -990,9 +862,35 @@ etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu, } screen->features[6] = val; + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_7, &val)) { + DBG("could not get ETNA_GPU_FEATURES_7"); + goto fail; + } + screen->features[7] = val; + if (!etna_get_specs(screen)) goto fail; + screen->options = (nir_shader_compiler_options) { + .lower_fpow = true, + .lower_sub = true, + .lower_ftrunc = true, + .fuse_ffma = true, + .lower_bitops = true, + .lower_all_io_to_temps = true, + .vertex_id_zero_based = true, + .lower_flrp32 = true, + .lower_fmod = true, + .lower_vector_cmp = true, + .lower_fdph = true, + .lower_fdiv = true, /* !screen->specs.has_new_transcendentals */ + .lower_fsign = !screen->specs.has_sign_floor_ceil, + .lower_ffloor = !screen->specs.has_sign_floor_ceil, + .lower_fceil = !screen->specs.has_sign_floor_ceil, + .lower_fsqrt = !screen->specs.has_sin_cos_sqrt, + .lower_sincos = !screen->specs.has_sin_cos_sqrt, + }; + /* apply debug options that disable individual features */ if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z)) screen->features[viv_chipFeatures] |= chipFeatures_NO_EARLY_Z; @@ -1009,6 +907,7 @@ etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu, pscreen->get_param = etna_screen_get_param; pscreen->get_paramf = etna_screen_get_paramf; pscreen->get_shader_param = etna_screen_get_shader_param; + pscreen->get_compiler_options = etna_get_compiler_options; pscreen->get_name = etna_screen_get_name; pscreen->get_vendor = etna_screen_get_vendor; @@ -1029,8 +928,16 @@ etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu, if (screen->drm_version >= ETNA_DRM_VERSION_PERFMON) etna_pm_query_setup(screen); + mtx_init(&screen->lock, mtx_recursive); + screen->used_resources = _mesa_set_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + if (!screen->used_resources) + goto fail2; + return pscreen; +fail2: + mtx_destroy(&screen->lock); fail: etna_screen_destroy(pscreen); return NULL;