X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Ffreedreno%2Fa5xx%2Ffd5_blend.c;h=98b6d4498e5cfcc1017d3bf08dd9814d212ba246;hb=def1b94c333d9b646f9ef241e437850928dd7e76;hp=25d9946fb137c73414e87708f497ceef6885ad13;hpb=812fd1aaa8451938dc411b4cdb58acf2d358372c;p=mesa.git

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
index 25d9946fb13..98b6d4498e5 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
@@ -59,12 +59,12 @@ fd5_blend_state_create(struct pipe_context *pctx,
 		const struct pipe_blend_state *cso)
 {
 	struct fd5_blend_stateobj *so;
-//	enum a3xx_rop_code rop = ROP_COPY;
+	enum a3xx_rop_code rop = ROP_COPY;
 	bool reads_dest = false;
 	unsigned i, mrt_blend = 0;
 
 	if (cso->logicop_enable) {
-//		rop = cso->logicop_func;  /* maps 1:1 */
+		rop = cso->logicop_func;  /* maps 1:1 */
 
 		switch (cso->logicop_func) {
 		case PIPE_LOGICOP_NOR:
@@ -117,9 +117,8 @@ fd5_blend_state_create(struct pipe_context *pctx,
 
 
 		so->rb_mrt[i].control =
-//				A5XX_RB_MRT_CONTROL_ROP_CODE(rop) |
-//				COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) |
-				0x60 | /* XXX set other than RECTLIST clear blits?? */
+				A5XX_RB_MRT_CONTROL_ROP_CODE(rop) |
+				COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) |
 				A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
 
 		if (rt->blend_enable) {