X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Ffreedreno%2Ffreedreno_draw.h;h=b293f73b82ed4f4f89f037df3d7f5d084d97db9b;hb=c485b47383337af02601ab41ad63cc8dbd2fd3ee;hp=25e102f5067c61d0b97a6275ea69d575b99a281f;hpb=2c6e3d822ba6f03fe208da3c6228d796895b3008;p=mesa.git

diff --git a/src/gallium/drivers/freedreno/freedreno_draw.h b/src/gallium/drivers/freedreno/freedreno_draw.h
index 25e102f5067..b293f73b82e 100644
--- a/src/gallium/drivers/freedreno/freedreno_draw.h
+++ b/src/gallium/drivers/freedreno/freedreno_draw.h
@@ -42,14 +42,14 @@ struct fd_ringbuffer;
 void fd_draw_init(struct pipe_context *pctx);
 
 static inline void
-fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
+fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
 		enum pc_di_primtype primtype,
 		enum pc_di_vis_cull_mode vismode,
 		enum pc_di_src_sel src_sel, uint32_t count,
 		uint8_t instances,
 		enum pc_di_index_size idx_type,
 		uint32_t idx_size, uint32_t idx_offset,
-		struct fd_bo *idx_bo)
+		struct pipe_resource *idx_buffer)
 {
 	/* for debug after a lock up, write a unique counter value
 	 * to scratch7 for each draw, to make it easier to match up
@@ -59,7 +59,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
 	 */
 	emit_marker(ring, 7);
 
-	if (is_a3xx_p0(ctx->screen)) {
+	if (is_a3xx_p0(batch->ctx->screen)) {
 		/* dummy-draw workaround: */
 		OUT_PKT3(ring, CP_DRAW_INDX, 3);
 		OUT_RING(ring, 0x00000000);
@@ -74,26 +74,26 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
 		OUT_RING(ring, 0);
 	}
 
-	OUT_PKT3(ring, CP_DRAW_INDX, idx_bo ? 5 : 3);
+	OUT_PKT3(ring, CP_DRAW_INDX, idx_buffer ? 5 : 3);
 	OUT_RING(ring, 0x00000000);        /* viz query info. */
 	if (vismode == USE_VISIBILITY) {
 		/* leave vis mode blank for now, it will be patched up when
 		 * we know if we are binning or not
 		 */
 		OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances),
-				&ctx->draw_patches);
+				&batch->draw_patches);
 	} else {
 		OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances));
 	}
 	OUT_RING(ring, count);             /* NumIndices */
-	if (idx_bo) {
-		OUT_RELOC(ring, idx_bo, idx_offset, 0, 0);
+	if (idx_buffer) {
+		OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
 		OUT_RING (ring, idx_size);
 	}
 
 	emit_marker(ring, 7);
 
-	fd_reset_wfi(ctx);
+	fd_reset_wfi(batch);
 }
 
 
@@ -112,35 +112,36 @@ size2indextype(unsigned index_size)
 
 /* this is same for a2xx/a3xx, so split into helper: */
 static inline void
-fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
+fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
+		enum pc_di_primtype primtype,
 		enum pc_di_vis_cull_mode vismode,
-		const struct pipe_draw_info *info)
+		const struct pipe_draw_info *info,
+		unsigned index_offset)
 {
-	struct pipe_index_buffer *idx = &ctx->indexbuf;
-	struct fd_bo *idx_bo = NULL;
+	struct pipe_resource *idx_buffer = NULL;
 	enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
 	enum pc_di_src_sel src_sel;
 	uint32_t idx_size, idx_offset;
 
-	if (info->indexed) {
-		assert(!idx->user_buffer);
+	if (info->index_size) {
+		assert(!info->has_user_indices);
 
-		idx_bo = fd_resource(idx->buffer)->bo;
-		idx_type = size2indextype(idx->index_size);
-		idx_size = idx->index_size * info->count;
-		idx_offset = idx->offset + (info->start * idx->index_size);
+		idx_buffer = info->index.resource;
+		idx_type = size2indextype(info->index_size);
+		idx_size = info->index_size * info->count;
+		idx_offset = index_offset + info->start * info->index_size;
 		src_sel = DI_SRC_SEL_DMA;
 	} else {
-		idx_bo = NULL;
+		idx_buffer = NULL;
 		idx_type = INDEX_SIZE_IGN;
 		idx_size = 0;
 		idx_offset = 0;
 		src_sel = DI_SRC_SEL_AUTO_INDEX;
 	}
 
-	fd_draw(ctx, ring, ctx->primtypes[info->mode], vismode, src_sel,
+	fd_draw(batch, ring, primtype, vismode, src_sel,
 			info->count, info->instance_count - 1,
-			idx_type, idx_size, idx_offset, idx_bo);
+			idx_type, idx_size, idx_offset, idx_buffer);
 }
 
 #endif /* FREEDRENO_DRAW_H_ */