X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Ffreedreno%2Ffreedreno_screen.c;h=a4699e4b69e53921c5df77e1635b59d5d114e3c8;hb=e92bc6b38e90339a394e95a562bcce35c3ee9696;hp=ddc7302c5c819ebb106b7aafbf2d51e3fb171d6b;hpb=4f17e026bb99c173444ff5ca7d0b782ed89ee604;p=mesa.git diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index ddc7302c5c8..a4699e4b69e 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -52,6 +52,7 @@ #include "a2xx/fd2_screen.h" #include "a3xx/fd3_screen.h" +#include "a4xx/fd4_screen.h" /* XXX this should go away */ #include "state_tracker/drm_driver.h" @@ -61,15 +62,14 @@ static const struct debug_named_value debug_options[] = { {"disasm", FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"}, {"dclear", FD_DBG_DCLEAR, "Mark all state dirty after clear"}, {"flush", FD_DBG_FLUSH, "Force flush after every draw"}, - {"dscis", FD_DBG_DSCIS, "Disable scissor optimization"}, + {"noscis", FD_DBG_NOSCIS, "Disable scissor optimization"}, {"direct", FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"}, - {"dbypass", FD_DBG_DBYPASS,"Disable GMEM bypass"}, + {"nobypass", FD_DBG_NOBYPASS, "Disable GMEM bypass"}, {"fraghalf", FD_DBG_FRAGHALF, "Use half-precision in fragment shader"}, {"nobin", FD_DBG_NOBIN, "Disable hw binning"}, - {"noopt", FD_DBG_NOOPT , "Disable optimization passes in compiler"}, {"optmsgs", FD_DBG_OPTMSGS,"Enable optimizater debug messages"}, {"optdump", FD_DBG_OPTDUMP,"Dump shader DAG to .dot files"}, - {"glsl130", FD_DBG_GLSL130,"Temporary flag to enable GLSL 130 on a3xx+"}, + {"glsl120", FD_DBG_GLSL120,"Temporary flag to force GLSL 120 (rather than 130) on a3xx+"}, {"nocp", FD_DBG_NOCP, "Disable copy-propagation"}, DEBUG_NAMED_VALUE_END }; @@ -78,7 +78,7 @@ DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0) int fd_mesa_debug = 0; bool fd_binning_enabled = true; -static bool glsl130 = false; +static bool glsl120 = false; static const char * fd_screen_get_name(struct pipe_screen *pscreen) @@ -102,29 +102,6 @@ fd_screen_get_timestamp(struct pipe_screen *pscreen) return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta; } -static void -fd_screen_fence_ref(struct pipe_screen *pscreen, - struct pipe_fence_handle **ptr, - struct pipe_fence_handle *pfence) -{ - fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr); -} - -static boolean -fd_screen_fence_signalled(struct pipe_screen *screen, - struct pipe_fence_handle *pfence) -{ - return fd_fence_signalled(fd_fence(pfence)); -} - -static boolean -fd_screen_fence_finish(struct pipe_screen *screen, - struct pipe_fence_handle *pfence, - uint64_t timeout) -{ - return fd_fence_wait(fd_fence(pfence)); -} - static void fd_screen_destroy(struct pipe_screen *pscreen) { @@ -159,7 +136,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_SHADOW_MAP: case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_TEXTURE_SWIZZLE: - case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: @@ -171,6 +147,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_USER_CONSTANT_BUFFERS: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: + case PIPE_CAP_VERTEXID_NOBASE: return 1; case PIPE_CAP_SHADER_STENCIL_EXPORT: @@ -185,20 +162,23 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: - case PIPE_CAP_TGSI_INSTANCEID: case PIPE_CAP_START_INSTANCE: case PIPE_CAP_COMPUTE: return 0; case PIPE_CAP_SM3: case PIPE_CAP_PRIMITIVE_RESTART: - return (screen->gpu_id >= 300) ? 1 : 0; + case PIPE_CAP_TGSI_INSTANCEID: + case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: + return is_a3xx(screen) || is_a4xx(screen); case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_GLSL_FEATURE_LEVEL: - return ((screen->gpu_id >= 300) && glsl130) ? 130 : 120; + if (glsl120) + return 120; + return (is_a3xx(screen) || is_a4xx(screen)) ? 130 : 120; /* Unsupported features. */ case PIPE_CAP_INDEP_BLEND_ENABLE: @@ -226,6 +206,10 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: case PIPE_CAP_SAMPLER_VIEW_TARGET: + case PIPE_CAP_CLIP_HALFZ: + case PIPE_CAP_POLYGON_OFFSET_CLAMP: + case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: + case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: return 0; case PIPE_CAP_MAX_VIEWPORTS: @@ -255,7 +239,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 11; case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: - return (screen->gpu_id >= 300) ? 256 : 0; + return (is_a3xx(screen) || is_a4xx(screen)) ? 256 : 0; /* Render targets. */ case PIPE_CAP_MAX_RENDER_TARGETS: @@ -266,7 +250,10 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_QUERY_TIMESTAMP: return 0; case PIPE_CAP_OCCLUSION_QUERY: - return (screen->gpu_id >= 300) ? 1 : 0; + /* TODO still missing on a4xx, but we lie to get gl2.. + * it's not a feature, it's a bug! + */ + return is_a3xx(screen) || is_a4xx(screen); case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: case PIPE_CAP_MIN_TEXEL_OFFSET: @@ -351,6 +338,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: return 8; /* XXX */ case PIPE_SHADER_CAP_MAX_INPUTS: + case PIPE_SHADER_CAP_MAX_OUTPUTS: return 16; case PIPE_SHADER_CAP_MAX_TEMPS: return 64; /* Max native temporaries. */ @@ -359,7 +347,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, * split between VS and FS. Use lower limit of 256 to * avoid getting into impossible situations: */ - return ((screen->gpu_id >= 300) ? 256 : 64) * sizeof(float[4]); + return ((is_a3xx(screen) || is_a4xx(screen)) ? 256 : 64) * sizeof(float[4]); case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: return 1; case PIPE_SHADER_CAP_MAX_PREDS: @@ -373,14 +361,15 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, return 1; case PIPE_SHADER_CAP_SUBROUTINES: case PIPE_SHADER_CAP_DOUBLES: + case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: + case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: return 0; case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: return 1; case PIPE_SHADER_CAP_INTEGERS: - /* we should be able to support this on a3xx, but not - * implemented yet: - */ - return ((screen->gpu_id >= 300) && glsl130) ? 1 : 0; + if (glsl120) + return 0; + return (is_a3xx(screen) || is_a4xx(screen)) ? 1 : 0; case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return 16; @@ -453,7 +442,7 @@ fd_screen_create(struct fd_device *dev) if (fd_mesa_debug & FD_DBG_NOBIN) fd_binning_enabled = false; - glsl130 = !!(fd_mesa_debug & FD_DBG_GLSL130); + glsl120 = !!(fd_mesa_debug & FD_DBG_GLSL120); if (!screen) return NULL; @@ -512,7 +501,7 @@ fd_screen_create(struct fd_device *dev) * before enabling: * * If you have a different adreno version, feel free to add it to one - * of the two cases below and see what happens. And if it works, please + * of the cases below and see what happens. And if it works, please * send a patch ;-) */ switch (screen->gpu_id) { @@ -523,6 +512,9 @@ fd_screen_create(struct fd_device *dev) case 330: fd3_screen_init(pscreen); break; + case 420: + fd4_screen_init(pscreen); + break; default: debug_printf("unsupported GPU: a%03d\n", screen->gpu_id); goto fail;