X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fi965%2Fbrw_screen.c;h=bdfead73cc87b7e39f722ea20d34886e82b7720e;hb=6d17f00600ffca7cb39e6f66277cec018ff2c151;hp=cef83ffea80e60d62e35d63d80a3ea490dcb8f41;hpb=f0f04cd12db156ec53b7ea46fae27199af121f90;p=mesa.git diff --git a/src/gallium/drivers/i965/brw_screen.c b/src/gallium/drivers/i965/brw_screen.c index cef83ffea80..bdfead73cc8 100644 --- a/src/gallium/drivers/i965/brw_screen.c +++ b/src/gallium/drivers/i965/brw_screen.c @@ -34,42 +34,44 @@ #include "brw_context.h" #include "brw_screen.h" #include "brw_winsys.h" +#include "brw_public.h" #include "brw_debug.h" +#include "brw_resource.h" #ifdef DEBUG static const struct debug_named_value debug_names[] = { - { "tex", DEBUG_TEXTURE}, - { "state", DEBUG_STATE}, - { "ioctl", DEBUG_IOCTL}, - { "blit", DEBUG_BLIT}, - { "curbe", DEBUG_CURBE}, - { "fall", DEBUG_FALLBACKS}, - { "verb", DEBUG_VERBOSE}, - { "bat", DEBUG_BATCH}, - { "pix", DEBUG_PIXEL}, - { "wins", DEBUG_WINSYS}, - { "min", DEBUG_MIN_URB}, - { "dis", DEBUG_DISASSEM}, - { "sync", DEBUG_SYNC}, - { "prim", DEBUG_PRIMS }, - { "vert", DEBUG_VERTS }, - { "dma", DEBUG_DMA }, - { "san", DEBUG_SANITY }, - { "sleep", DEBUG_SLEEP }, - { "stats", DEBUG_STATS }, - { "sing", DEBUG_SINGLE_THREAD }, - { "thre", DEBUG_SINGLE_THREAD }, - { "wm", DEBUG_WM }, - { "urb", DEBUG_URB }, - { "vs", DEBUG_VS }, - { NULL, 0 } + { "tex", DEBUG_TEXTURE, NULL }, + { "state", DEBUG_STATE, NULL }, + { "ioctl", DEBUG_IOCTL, NULL }, + { "blit", DEBUG_BLIT, NULL }, + { "curbe", DEBUG_CURBE, NULL }, + { "fall", DEBUG_FALLBACKS, NULL }, + { "verb", DEBUG_VERBOSE, NULL }, + { "bat", DEBUG_BATCH, NULL }, + { "pix", DEBUG_PIXEL, NULL }, + { "wins", DEBUG_WINSYS, NULL }, + { "min", DEBUG_MIN_URB, NULL }, + { "dis", DEBUG_DISASSEM, NULL }, + { "sync", DEBUG_SYNC, NULL }, + { "prim", DEBUG_PRIMS, NULL }, + { "vert", DEBUG_VERTS, NULL }, + { "dma", DEBUG_DMA, NULL }, + { "san", DEBUG_SANITY, NULL }, + { "sleep", DEBUG_SLEEP, NULL }, + { "stats", DEBUG_STATS, NULL }, + { "sing", DEBUG_SINGLE_THREAD, NULL }, + { "thre", DEBUG_SINGLE_THREAD, NULL }, + { "wm", DEBUG_WM, NULL }, + { "urb", DEBUG_URB, NULL }, + { "vs", DEBUG_VS, NULL }, + DEBUG_NAMED_VALUE_END }; static const struct debug_named_value dump_names[] = { - { "asm", DUMP_ASM}, - { "state", DUMP_STATE}, - { "batch", DUMP_BATCH}, - { NULL, 0 } + { "asm", DUMP_ASM, NULL }, + { "state", DUMP_STATE, NULL }, + { "batch", DUMP_BATCH, NULL }, + DEBUG_NAMED_VALUE_END }; int BRW_DEBUG = 0; @@ -148,7 +150,7 @@ brw_get_name(struct pipe_screen *screen) } static int -brw_get_param(struct pipe_screen *screen, int param) +brw_get_param(struct pipe_screen *screen, enum pipe_cap param) { switch (param) { case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: @@ -171,6 +173,8 @@ brw_get_param(struct pipe_screen *screen, int param) return 1; case PIPE_CAP_OCCLUSION_QUERY: return 0; + case PIPE_CAP_TIMER_QUERY: + return 0; case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: @@ -185,13 +189,16 @@ brw_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: return 0; + case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: + /* disable for now */ + return 0; default: return 0; } } static float -brw_get_paramf(struct pipe_screen *screen, int param) +brw_get_paramf(struct pipe_screen *screen, enum pipe_cap param) { switch (param) { case PIPE_CAP_MAX_LINE_WIDTH: @@ -217,9 +224,10 @@ brw_get_paramf(struct pipe_screen *screen, int param) static boolean brw_is_format_supported(struct pipe_screen *screen, - enum pipe_format format, + enum pipe_format format, enum pipe_texture_target target, - unsigned tex_usage, + unsigned sample_count, + unsigned tex_usage, unsigned geom_flags) { static const enum pipe_format tex_supported[] = { @@ -252,7 +260,7 @@ brw_is_format_supported(struct pipe_screen *screen, /* depth */ PIPE_FORMAT_Z32_FLOAT, PIPE_FORMAT_Z24X8_UNORM, - PIPE_FORMAT_Z24S8_UNORM, + PIPE_FORMAT_Z24_UNORM_S8_USCALED, PIPE_FORMAT_Z16_UNORM, /* signed */ PIPE_FORMAT_R8G8_SNORM, @@ -268,16 +276,19 @@ brw_is_format_supported(struct pipe_screen *screen, static const enum pipe_format depth_supported[] = { PIPE_FORMAT_Z32_FLOAT, PIPE_FORMAT_Z24X8_UNORM, - PIPE_FORMAT_Z24S8_UNORM, + PIPE_FORMAT_Z24_UNORM_S8_USCALED, PIPE_FORMAT_Z16_UNORM, PIPE_FORMAT_NONE /* list terminator */ }; const enum pipe_format *list; uint i; - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) + if (sample_count > 1) + return FALSE; + + if (tex_usage & PIPE_BIND_DEPTH_STENCIL) list = depth_supported; - else if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) + else if (tex_usage & PIPE_BIND_RENDER_TARGET) list = render_supported; else list = tex_supported; @@ -340,7 +351,7 @@ brw_destroy_screen(struct pipe_screen *screen) * Create a new brw_screen object */ struct pipe_screen * -brw_create_screen(struct brw_winsys_screen *sws, uint pci_id) +brw_screen_create(struct brw_winsys_screen *sws) { struct brw_screen *bscreen; struct brw_chipset chipset; @@ -355,9 +366,9 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id) memset(&chipset, 0, sizeof chipset); - chipset.pci_id = pci_id; + chipset.pci_id = sws->pci_id; - switch (pci_id) { + switch (chipset.pci_id) { case PCI_CHIP_I965_G: case PCI_CHIP_I965_Q: case PCI_CHIP_I965_G_1: @@ -383,7 +394,7 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id) default: debug_printf("%s: unknown pci id 0x%x, cannot create screen\n", - __FUNCTION__, pci_id); + __FUNCTION__, chipset.pci_id); return NULL; } @@ -406,9 +417,8 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id) bscreen->base.fence_signalled = brw_fence_signalled; bscreen->base.fence_finish = brw_fence_finish; - brw_screen_tex_init(bscreen); + brw_init_screen_resource_functions(bscreen); brw_screen_tex_surface_init(bscreen); - brw_screen_buffer_init(bscreen); bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE) != NULL;