X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Filo%2Filo_3d_pipeline_gen6.c;h=72e87d4efa74d0d6b7d32348cee60d76e037c8c4;hb=851202c319701c541d52f87ffa22505504c50d57;hp=e5c9db1be02e8669d9b47e22b18da21270c1c447;hpb=443dc15cf77edcaa7804c4277f0cce5d7c1d6b25;p=mesa.git

diff --git a/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c b/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
index e5c9db1be02..72e87d4efa7 100644
--- a/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
@@ -29,6 +29,8 @@
 #include "util/u_prim.h"
 #include "intel_reg.h"
 
+#include "shader/ilo_shader_internal.h"
+#include "ilo_3d.h"
 #include "ilo_context.h"
 #include "ilo_cp.h"
 #include "ilo_gpe_gen6.h"
@@ -210,13 +212,13 @@ gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
                                   struct gen6_pipeline_session *session)
 {
    /* STATE_BASE_ADDRESS */
-   if (session->state_bo_changed || session->instruction_bo_changed ||
+   if (session->state_bo_changed || session->kernel_bo_changed ||
        session->batch_bo_changed) {
       if (p->dev->gen == ILO_GEN(6))
          gen6_wa_pipe_control_post_sync(p, false);
 
       p->gen6_STATE_BASE_ADDRESS(p->dev,
-            NULL, p->cp->bo, p->cp->bo, NULL, ilo->shader_cache->bo,
+            NULL, p->cp->bo, p->cp->bo, NULL, ilo->hw3d->kernel.bo,
             0, 0, 0, 0, p->cp);
 
       /*
@@ -457,7 +459,8 @@ gen6_pipeline_vs(struct ilo_3d_pipeline *p,
                  const struct ilo_context *ilo,
                  struct gen6_pipeline_session *session)
 {
-   const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(VERTEX_SAMPLERS));
+   const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(VERTEX_SAMPLERS) ||
+                                 session->kernel_bo_changed);
    const bool emit_3dstate_constant_vs = session->pcb_state_vs_changed;
 
    /*
@@ -477,10 +480,9 @@ gen6_pipeline_vs(struct ilo_3d_pipeline *p,
 
    /* 3DSTATE_VS */
    if (emit_3dstate_vs) {
-      const struct ilo_shader *vs = (ilo->vs)? ilo->vs->shader : NULL;
       const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
 
-      p->gen6_3DSTATE_VS(p->dev, vs, num_samplers, p->cp);
+      p->gen6_3DSTATE_VS(p->dev, ilo->vs, num_samplers, p->cp);
    }
 
    if (emit_3dstate_constant_vs && p->dev->gen == ILO_GEN(6))
@@ -497,17 +499,11 @@ gen6_pipeline_gs(struct ilo_3d_pipeline *p,
       p->gen6_3DSTATE_CONSTANT_GS(p->dev, NULL, NULL, 0, p->cp);
 
    /* 3DSTATE_GS */
-   if (DIRTY(GS) || DIRTY(VS) || session->prim_changed) {
-      const struct ilo_shader *gs = (ilo->gs)? ilo->gs->shader : NULL;
-      const struct ilo_shader *vs = (ilo->vs)? ilo->vs->shader : NULL;
-      const int num_vertices = u_vertices_per_prim(session->reduced_prim);
-
-      if (gs)
-         assert(!gs->pcb.clip_state_size);
+   if (DIRTY(GS) || DIRTY(VS) ||
+       session->prim_changed || session->kernel_bo_changed) {
+      const int verts_per_prim = u_vertices_per_prim(session->reduced_prim);
 
-      p->gen6_3DSTATE_GS(p->dev, gs, vs,
-            (vs) ? vs->cache_offset + vs->gs_offsets[num_vertices - 1] : 0,
-            p->cp);
+      p->gen6_3DSTATE_GS(p->dev, ilo->gs, ilo->vs, verts_per_prim, p->cp);
    }
 }
 
@@ -666,7 +662,7 @@ gen6_pipeline_wm(struct ilo_3d_pipeline *p,
    /* 3DSTATE_WM */
    if (DIRTY(FS) || DIRTY(FRAGMENT_SAMPLERS) ||
        DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
-       DIRTY(RASTERIZER)) {
+       DIRTY(RASTERIZER) || session->kernel_bo_changed) {
       const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
       const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
       const bool dual_blend = ilo->blend->dual_blend;
@@ -1315,7 +1311,7 @@ gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
       /* these should be enough to make everything uploaded */
       session->batch_bo_changed = true;
       session->state_bo_changed = true;
-      session->instruction_bo_changed = true;
+      session->kernel_bo_changed = true;
       session->prim_changed = true;
    }
    else {
@@ -1333,7 +1329,7 @@ gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
 
       session->state_bo_changed =
          (p->invalidate_flags & ILO_3D_PIPELINE_INVALIDATE_STATE_BO);
-      session->instruction_bo_changed =
+      session->kernel_bo_changed =
          (p->invalidate_flags & ILO_3D_PIPELINE_INVALIDATE_KERNEL_BO);
       session->prim_changed = (p->state.reduced_prim != session->reduced_prim);
    }