X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Filo%2Filo_resource.c;h=8c888c529c49d6d128677cb58bc9af27db38b2da;hb=4bc9130fba2f815cb910536d3d3a253a8c3ed0b9;hp=9f4ee4012c16867116ab319c553575cf9dca162c;hpb=70ef171e91582f60a010a4f0ea9f7ff5ba971ab4;p=mesa.git

diff --git a/src/gallium/drivers/ilo/ilo_resource.c b/src/gallium/drivers/ilo/ilo_resource.c
index 9f4ee4012c1..8c888c529c4 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -25,8 +25,12 @@
  *    Chia-I Wu <olv@lunarg.com>
  */
 
-#include "ilo_layout.h"
+#include "core/ilo_state_vf.h"
+#include "core/ilo_state_sol.h"
+#include "core/ilo_state_surface.h"
+
 #include "ilo_screen.h"
+#include "ilo_format.h"
 #include "ilo_resource.h"
 
 /*
@@ -84,6 +88,134 @@ resource_get_cpu_init(const struct pipe_resource *templ)
                           PIPE_BIND_STREAM_OUTPUT)) ? false : true;
 }
 
+static enum gen_surface_type
+get_surface_type(enum pipe_texture_target target)
+{
+   switch (target) {
+   case PIPE_TEXTURE_1D:
+   case PIPE_TEXTURE_1D_ARRAY:
+      return GEN6_SURFTYPE_1D;
+   case PIPE_TEXTURE_2D:
+   case PIPE_TEXTURE_RECT:
+   case PIPE_TEXTURE_2D_ARRAY:
+      return GEN6_SURFTYPE_2D;
+   case PIPE_TEXTURE_3D:
+      return GEN6_SURFTYPE_3D;
+   case PIPE_TEXTURE_CUBE:
+   case PIPE_TEXTURE_CUBE_ARRAY:
+      return GEN6_SURFTYPE_CUBE;
+   default:
+      assert(!"unknown texture target");
+      return GEN6_SURFTYPE_NULL;
+   }
+}
+
+static enum pipe_format
+resource_get_image_format(const struct pipe_resource *templ,
+                          const struct ilo_dev *dev,
+                          bool *separate_stencil_ret)
+{
+   enum pipe_format format = templ->format;
+   bool separate_stencil;
+
+   /* silently promote ETC1 */
+   if (templ->format == PIPE_FORMAT_ETC1_RGB8)
+      format = PIPE_FORMAT_R8G8B8X8_UNORM;
+
+   /* separate stencil buffers */
+   separate_stencil = false;
+   if ((templ->bind & PIPE_BIND_DEPTH_STENCIL) &&
+       util_format_is_depth_and_stencil(templ->format)) {
+      switch (templ->format) {
+      case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
+         /* Gen6 requires HiZ to be available for all levels */
+         if (ilo_dev_gen(dev) >= ILO_GEN(7) || templ->last_level == 0) {
+            format = PIPE_FORMAT_Z32_FLOAT;
+            separate_stencil = true;
+         }
+         break;
+      case PIPE_FORMAT_Z24_UNORM_S8_UINT:
+         format = PIPE_FORMAT_Z24X8_UNORM;
+         separate_stencil = true;
+         break;
+      default:
+         break;
+      }
+   }
+
+   if (separate_stencil_ret)
+      *separate_stencil_ret = separate_stencil;
+
+   return format;
+}
+
+static inline enum gen_surface_format
+pipe_to_surface_format(const struct ilo_dev *dev, enum pipe_format format)
+{
+   switch (format) {
+   case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
+      return GEN6_FORMAT_R32_FLOAT_X8X24_TYPELESS;
+   case PIPE_FORMAT_Z32_FLOAT:
+      return GEN6_FORMAT_R32_FLOAT;
+   case PIPE_FORMAT_Z24_UNORM_S8_UINT:
+   case PIPE_FORMAT_Z24X8_UNORM:
+      return GEN6_FORMAT_R24_UNORM_X8_TYPELESS;
+   case PIPE_FORMAT_Z16_UNORM:
+      return GEN6_FORMAT_R16_UNORM;
+   case PIPE_FORMAT_S8_UINT:
+      return GEN6_FORMAT_R8_UINT;
+   default:
+      return ilo_format_translate_color(dev, format);
+   }
+}
+
+static void
+resource_get_image_info(const struct pipe_resource *templ,
+                        const struct ilo_dev *dev,
+                        enum pipe_format image_format,
+                        struct ilo_image_info *info)
+{
+   memset(info, 0, sizeof(*info));
+
+   info->type = get_surface_type(templ->target);
+
+   info->format = pipe_to_surface_format(dev, image_format);
+   info->interleaved_stencil = util_format_is_depth_and_stencil(image_format);
+   info->is_integer = util_format_is_pure_integer(image_format);
+   info->compressed = util_format_is_compressed(image_format);
+   info->block_width = util_format_get_blockwidth(image_format);
+   info->block_height = util_format_get_blockheight(image_format);
+   info->block_size = util_format_get_blocksize(image_format);
+
+   info->width = templ->width0;
+   info->height = templ->height0;
+   info->depth = templ->depth0;
+   info->array_size = templ->array_size;
+   info->level_count = templ->last_level + 1;
+   info->sample_count = (templ->nr_samples) ? templ->nr_samples : 1;
+
+   info->aux_disable = (templ->usage == PIPE_USAGE_STAGING);
+
+   if (templ->bind & PIPE_BIND_LINEAR)
+      info->valid_tilings = 1 << GEN6_TILING_NONE;
+
+   /*
+    * Tiled images must be mapped via GTT to get a linear view.  Prefer linear
+    * images when the image size is greater than one-fourth of the mappable
+    * aperture.
+    */
+   if (templ->bind & (PIPE_BIND_TRANSFER_WRITE | PIPE_BIND_TRANSFER_READ))
+      info->prefer_linear_threshold = dev->aperture_mappable / 4;
+
+   info->bind_surface_sampler = (templ->bind & PIPE_BIND_SAMPLER_VIEW);
+   info->bind_surface_dp_render = (templ->bind & PIPE_BIND_RENDER_TARGET);
+   info->bind_surface_dp_typed = (templ->bind &
+         (PIPE_BIND_SHADER_IMAGE | PIPE_BIND_COMPUTE_RESOURCE));
+   info->bind_zs = (templ->bind & PIPE_BIND_DEPTH_STENCIL);
+   info->bind_scanout = (templ->bind & PIPE_BIND_SCANOUT);
+   info->bind_cursor = (templ->bind & PIPE_BIND_CURSOR);
+}
+
 static enum gen_surface_tiling
 winsys_to_surface_tiling(enum intel_tiling_mode tiling)
 {
@@ -154,31 +286,6 @@ tex_alloc_slices(struct ilo_texture *tex)
    return true;
 }
 
-static bool
-tex_import_handle(struct ilo_texture *tex,
-                  const struct winsys_handle *handle)
-{
-   struct ilo_screen *is = ilo_screen(tex->base.screen);
-   const char *name = resource_get_bo_name(&tex->base);
-   enum intel_tiling_mode tiling;
-   unsigned long pitch;
-
-   tex->bo = intel_winsys_import_handle(is->winsys, name, handle,
-         tex->layout.bo_height, &tiling, &pitch);
-   if (!tex->bo)
-      return false;
-
-   if (!ilo_layout_update_for_imported_bo(&tex->layout,
-            winsys_to_surface_tiling(tiling), pitch)) {
-      ilo_err("imported handle has incompatible tiling/pitch\n");
-      intel_bo_unreference(tex->bo);
-      tex->bo = NULL;
-      return false;
-   }
-
-   return true;
-}
-
 static bool
 tex_create_bo(struct ilo_texture *tex)
 {
@@ -187,24 +294,27 @@ tex_create_bo(struct ilo_texture *tex)
    const bool cpu_init = resource_get_cpu_init(&tex->base);
    struct intel_bo *bo;
 
-   bo = intel_winsys_alloc_bo(is->winsys, name,
-         tex->layout.bo_stride * tex->layout.bo_height, cpu_init);
+   bo = intel_winsys_alloc_bo(is->dev.winsys, name,
+         tex->image.bo_stride * tex->image.bo_height, cpu_init);
 
    /* set the tiling for transfer and export */
-   if (bo && (tex->layout.tiling == GEN6_TILING_X ||
-              tex->layout.tiling == GEN6_TILING_Y)) {
+   if (bo && (tex->image.tiling == GEN6_TILING_X ||
+              tex->image.tiling == GEN6_TILING_Y)) {
       const enum intel_tiling_mode tiling =
-         surface_to_winsys_tiling(tex->layout.tiling);
+         surface_to_winsys_tiling(tex->image.tiling);
 
-      if (intel_bo_set_tiling(bo, tiling, tex->layout.bo_stride)) {
-         intel_bo_unreference(bo);
+      if (intel_bo_set_tiling(bo, tiling, tex->image.bo_stride)) {
+         intel_bo_unref(bo);
          bo = NULL;
       }
    }
+   if (!bo)
+      return false;
 
-   tex->bo = bo;
+   intel_bo_unref(tex->vma.bo);
+   ilo_vma_set_bo(&tex->vma, &is->dev, bo, 0);
 
-   return (tex->bo != NULL);
+   return true;
 }
 
 static bool
@@ -220,13 +330,16 @@ tex_create_separate_stencil(struct ilo_texture *tex)
     */
    templ.format = PIPE_FORMAT_S8_UINT;
 
+   /* no stencil texturing */
+   templ.bind &= ~PIPE_BIND_SAMPLER_VIEW;
+
    s8 = tex->base.screen->resource_create(tex->base.screen, &templ);
    if (!s8)
       return false;
 
    tex->separate_s8 = ilo_texture(s8);
 
-   assert(tex->separate_s8->layout.format == PIPE_FORMAT_S8_UINT);
+   assert(tex->separate_s8->image_format == PIPE_FORMAT_S8_UINT);
 
    return true;
 }
@@ -235,25 +348,29 @@ static bool
 tex_create_hiz(struct ilo_texture *tex)
 {
    const struct pipe_resource *templ = &tex->base;
+   const uint32_t size = tex->image.aux.bo_stride * tex->image.aux.bo_height;
    struct ilo_screen *is = ilo_screen(tex->base.screen);
-   unsigned lv;
+   struct intel_bo *bo;
 
-   tex->aux_bo = intel_winsys_alloc_bo(is->winsys, "hiz texture",
-         tex->layout.aux_stride * tex->layout.aux_height, false);
-   if (!tex->aux_bo)
+   bo = intel_winsys_alloc_bo(is->dev.winsys, "hiz texture", size, false);
+   if (!bo)
       return false;
 
-   for (lv = 0; lv <= templ->last_level; lv++) {
-      if (tex->layout.aux_enables & (1 << lv)) {
-         const unsigned num_slices = (templ->target == PIPE_TEXTURE_3D) ?
-            u_minify(templ->depth0, lv) : templ->array_size;
-         unsigned flags = ILO_TEXTURE_HIZ;
+   ilo_vma_init(&tex->aux_vma, &is->dev, size, 4096);
+   ilo_vma_set_bo(&tex->aux_vma, &is->dev, bo, 0);
+
+   if (tex->imported) {
+      unsigned lv;
 
-         /* this will trigger a HiZ resolve */
-         if (tex->imported)
-            flags |= ILO_TEXTURE_CPU_WRITE;
+      for (lv = 0; lv <= templ->last_level; lv++) {
+         if (tex->image.aux.enables & (1 << lv)) {
+            const unsigned num_slices = (templ->target == PIPE_TEXTURE_3D) ?
+               u_minify(templ->depth0, lv) : templ->array_size;
+            /* this will trigger HiZ resolves */
+            const unsigned flags = ILO_TEXTURE_CPU_WRITE;
 
-         ilo_texture_set_slice_flags(tex, lv, 0, num_slices, flags, flags);
+            ilo_texture_set_slice_flags(tex, lv, 0, num_slices, flags, flags);
+         }
       }
    }
 
@@ -263,62 +380,47 @@ tex_create_hiz(struct ilo_texture *tex)
 static bool
 tex_create_mcs(struct ilo_texture *tex)
 {
+   const uint32_t size = tex->image.aux.bo_stride * tex->image.aux.bo_height;
    struct ilo_screen *is = ilo_screen(tex->base.screen);
+   struct intel_bo *bo;
 
-   assert(tex->layout.aux_enables == (1 << (tex->base.last_level + 1)) - 1);
+   assert(tex->image.aux.enables == (1 << (tex->base.last_level + 1)) - 1);
 
-   tex->aux_bo = intel_winsys_alloc_bo(is->winsys, "mcs texture",
-         tex->layout.aux_stride * tex->layout.aux_height, false);
-   if (!tex->aux_bo)
+   bo = intel_winsys_alloc_bo(is->dev.winsys, "mcs texture", size, false);
+   if (!bo)
       return false;
 
+   ilo_vma_init(&tex->aux_vma, &is->dev, size, 4096);
+   ilo_vma_set_bo(&tex->aux_vma, &is->dev, bo, 0);
+
    return true;
 }
 
 static void
 tex_destroy(struct ilo_texture *tex)
 {
-   if (tex->aux_bo)
-      intel_bo_unreference(tex->aux_bo);
-
    if (tex->separate_s8)
       tex_destroy(tex->separate_s8);
 
-   if (tex->bo)
-      intel_bo_unreference(tex->bo);
+   intel_bo_unref(tex->vma.bo);
+   intel_bo_unref(tex->aux_vma.bo);
 
    tex_free_slices(tex);
    FREE(tex);
 }
 
 static bool
-tex_alloc_bos(struct ilo_texture *tex,
-              const struct winsys_handle *handle)
+tex_alloc_bos(struct ilo_texture *tex)
 {
-   struct ilo_screen *is = ilo_screen(tex->base.screen);
-
-   if (handle) {
-      if (!tex_import_handle(tex, handle))
-         return false;
-   } else {
-      if (!tex_create_bo(tex))
-         return false;
-   }
-
-   /* allocate separate stencil resource */
-   if (tex->layout.separate_stencil && !tex_create_separate_stencil(tex))
+   if (!tex->imported && !tex_create_bo(tex))
       return false;
 
-   switch (tex->layout.aux) {
-   case ILO_LAYOUT_AUX_HIZ:
-      if (!tex_create_hiz(tex)) {
-         /* Separate Stencil Buffer requires HiZ to be enabled */
-         if (ilo_dev_gen(&is->dev) == ILO_GEN(6) &&
-             tex->layout.separate_stencil)
-            return false;
-      }
+   switch (tex->image.aux.type) {
+   case ILO_IMAGE_AUX_HIZ:
+      if (!tex_create_hiz(tex))
+         return false;
       break;
-   case ILO_LAYOUT_AUX_MCS:
+   case ILO_IMAGE_AUX_MCS:
       if (!tex_create_mcs(tex))
          return false;
       break;
@@ -329,22 +431,108 @@ tex_alloc_bos(struct ilo_texture *tex,
    return true;
 }
 
+static struct intel_bo *
+tex_import_handle(struct ilo_texture *tex,
+                  const struct winsys_handle *handle,
+                  struct ilo_image_info *info)
+{
+   struct ilo_screen *is = ilo_screen(tex->base.screen);
+   const struct pipe_resource *templ = &tex->base;
+   const char *name = resource_get_bo_name(&tex->base);
+   enum intel_tiling_mode tiling;
+   unsigned long pitch;
+   struct intel_bo *bo;
+
+   bo = intel_winsys_import_handle(is->dev.winsys, name, handle,
+         tex->image.bo_height, &tiling, &pitch);
+   /* modify image info */
+   if (bo) {
+      const uint8_t valid_tilings = 1 << winsys_to_surface_tiling(tiling);
+
+      if (info->valid_tilings && !(info->valid_tilings & valid_tilings)) {
+         intel_bo_unref(bo);
+         return NULL;
+      }
+
+      info->valid_tilings = valid_tilings;
+      info->force_bo_stride = pitch;
+
+      /* assume imported RTs are also scanouts */
+      if (!info->bind_scanout)
+         info->bind_scanout = (templ->usage & PIPE_BIND_RENDER_TARGET);
+   }
+
+   return bo;
+}
+
 static bool
-tex_init_layout(struct ilo_texture *tex)
+tex_init_image(struct ilo_texture *tex,
+               const struct winsys_handle *handle,
+               bool *separate_stencil)
 {
    struct ilo_screen *is = ilo_screen(tex->base.screen);
    const struct pipe_resource *templ = &tex->base;
-   struct ilo_layout *layout = &tex->layout;
+   struct ilo_image *img = &tex->image;
+   struct intel_bo *imported_bo = NULL;;
+   struct ilo_image_info info;
+
+   tex->image_format = resource_get_image_format(templ,
+         &is->dev, separate_stencil);
+   resource_get_image_info(templ, &is->dev, tex->image_format, &info);
+
+   if (handle) {
+      imported_bo = tex_import_handle(tex, handle, &info);
+      if (!imported_bo)
+         return false;
+   }
+
+   if (!ilo_image_init(img, &is->dev, &info)) {
+      intel_bo_unref(imported_bo);
+      return false;
+   }
 
-   ilo_layout_init(layout, &is->dev, templ);
+   /*
+    * HiZ requires 8x4 alignment and some levels might need HiZ disabled.  It
+    * is generally fine except on Gen6, where HiZ and separate stencil must be
+    * enabled together.  For PIPE_FORMAT_Z24X8_UNORM with separate stencil, we
+    * can live with stencil values being interleaved for levels where HiZ is
+    * disabled.  But it is not the case for PIPE_FORMAT_Z32_FLOAT with
+    * separate stencil.  If HiZ was disabled for a level, we had to change the
+    * format to PIPE_FORMAT_Z32_FLOAT_S8X24_UINT for the level and that format
+    * had a different bpp.  In other words, HiZ has to be available for all
+    * levels.
+    */
+   if (ilo_dev_gen(&is->dev) == ILO_GEN(6) &&
+       templ->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT &&
+       tex->image_format == PIPE_FORMAT_Z32_FLOAT &&
+       img->aux.enables != (1 << templ->last_level)) {
+      tex->image_format = templ->format;
+      info.format = pipe_to_surface_format(&is->dev, tex->image_format);
+      info.interleaved_stencil = true;
+
+      memset(img, 0, sizeof(*img));
+      if (!ilo_image_init(img, &is->dev, &info)) {
+         intel_bo_unref(imported_bo);
+         return false;
+      }
+   }
 
-   if (layout->bo_height > ilo_max_resource_size / layout->bo_stride)
+   if (img->bo_height > ilo_max_resource_size / img->bo_stride ||
+       !ilo_vma_init(&tex->vma, &is->dev, img->bo_stride * img->bo_height,
+          4096)) {
+      intel_bo_unref(imported_bo);
       return false;
+   }
+
+   if (imported_bo) {
+      ilo_vma_set_bo(&tex->vma, &is->dev, imported_bo, 0);
+      tex->imported = true;
+   }
 
    if (templ->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) {
       /* require on-the-fly tiling/untiling or format conversion */
-      if (layout->tiling == GEN8_TILING_W || layout->separate_stencil ||
-          layout->format != templ->format)
+      if (img->tiling == GEN8_TILING_W || *separate_stencil ||
+          tex->image_format != templ->format)
          return false;
    }
 
@@ -360,6 +548,7 @@ tex_create(struct pipe_screen *screen,
            const struct winsys_handle *handle)
 {
    struct ilo_texture *tex;
+   bool separate_stencil;
 
    tex = CALLOC_STRUCT(ilo_texture);
    if (!tex)
@@ -369,14 +558,13 @@ tex_create(struct pipe_screen *screen,
    tex->base.screen = screen;
    pipe_reference_init(&tex->base.reference, 1);
 
-   tex->imported = (handle != NULL);
-
-   if (!tex_init_layout(tex)) {
+   if (!tex_init_image(tex, handle, &separate_stencil)) {
       FREE(tex);
       return NULL;
    }
 
-   if (!tex_alloc_bos(tex, handle)) {
+   if (!tex_alloc_bos(tex) ||
+       (separate_stencil && !tex_create_separate_stencil(tex))) {
       tex_destroy(tex);
       return NULL;
    }
@@ -392,33 +580,39 @@ tex_get_handle(struct ilo_texture *tex, struct winsys_handle *handle)
    int err;
 
    /* must match what tex_create_bo() sets */
-   if (tex->layout.tiling == GEN8_TILING_W)
+   if (tex->image.tiling == GEN8_TILING_W)
       tiling = INTEL_TILING_NONE;
    else
-      tiling = surface_to_winsys_tiling(tex->layout.tiling);
+      tiling = surface_to_winsys_tiling(tex->image.tiling);
 
-   err = intel_winsys_export_handle(is->winsys, tex->bo, tiling,
-         tex->layout.bo_stride, tex->layout.bo_height, handle);
+   err = intel_winsys_export_handle(is->dev.winsys, tex->vma.bo, tiling,
+         tex->image.bo_stride, tex->image.bo_height, handle);
 
    return !err;
 }
 
 static bool
-buf_create_bo(struct ilo_buffer *buf)
+buf_create_bo(struct ilo_buffer_resource *buf)
 {
    struct ilo_screen *is = ilo_screen(buf->base.screen);
    const char *name = resource_get_bo_name(&buf->base);
    const bool cpu_init = resource_get_cpu_init(&buf->base);
+   struct intel_bo *bo;
+
+   bo = intel_winsys_alloc_bo(is->dev.winsys, name, buf->bo_size, cpu_init);
+   if (!bo)
+      return false;
 
-   buf->bo = intel_winsys_alloc_bo(is->winsys, name, buf->bo_size, cpu_init);
+   intel_bo_unref(buf->vma.bo);
+   ilo_vma_set_bo(&buf->vma, &is->dev, bo, 0);
 
-   return (buf->bo != NULL);
+   return true;
 }
 
 static void
-buf_destroy(struct ilo_buffer *buf)
+buf_destroy(struct ilo_buffer_resource *buf)
 {
-   intel_bo_unreference(buf->bo);
+   intel_bo_unref(buf->vma.bo);
    FREE(buf);
 }
 
@@ -426,9 +620,11 @@ static struct pipe_resource *
 buf_create(struct pipe_screen *screen, const struct pipe_resource *templ)
 {
    const struct ilo_screen *is = ilo_screen(screen);
-   struct ilo_buffer *buf;
+   struct ilo_buffer_resource *buf;
+   uint32_t alignment;
+   unsigned size;
 
-   buf = CALLOC_STRUCT(ilo_buffer);
+   buf = CALLOC_STRUCT(ilo_buffer_resource);
    if (!buf)
       return NULL;
 
@@ -436,39 +632,35 @@ buf_create(struct pipe_screen *screen, const struct pipe_resource *templ)
    buf->base.screen = screen;
    pipe_reference_init(&buf->base.reference, 1);
 
-   buf->bo_size = templ->width0;
+   size = templ->width0;
 
    /*
-    * From the Sandy Bridge PRM, volume 1 part 1, page 118:
+    * As noted in ilo_format_translate(), we treat some 3-component formats as
+    * 4-component formats to work around hardware limitations.  Imagine the
+    * case where the vertex buffer holds a single PIPE_FORMAT_R16G16B16_FLOAT
+    * vertex, and buf->bo_size is 6.  The hardware would fail to fetch it at
+    * boundary check because the vertex buffer is expected to hold a
+    * PIPE_FORMAT_R16G16B16A16_FLOAT vertex and that takes at least 8 bytes.
     *
-    *     "For buffers, which have no inherent "height," padding requirements
-    *      are different. A buffer must be padded to the next multiple of 256
-    *      array elements, with an additional 16 bytes added beyond that to
-    *      account for the L1 cache line."
+    * For the workaround to work, we should add 2 to the bo size.  But that
+    * would waste a page when the bo size is already page aligned.  Let's
+    * round it to page size for now and revisit this when needed.
     */
-   if (templ->bind & PIPE_BIND_SAMPLER_VIEW)
-      buf->bo_size = align(buf->bo_size, 256) + 16;
-
    if ((templ->bind & PIPE_BIND_VERTEX_BUFFER) &&
-        ilo_dev_gen(&is->dev) < ILO_GEN(7.5)) {
-      /*
-       * As noted in ilo_translate_format(), we treat some 3-component formats
-       * as 4-component formats to work around hardware limitations.  Imagine
-       * the case where the vertex buffer holds a single
-       * PIPE_FORMAT_R16G16B16_FLOAT vertex, and buf->bo_size is 6.  The
-       * hardware would fail to fetch it at boundary check because the vertex
-       * buffer is expected to hold a PIPE_FORMAT_R16G16B16A16_FLOAT vertex
-       * and that takes at least 8 bytes.
-       *
-       * For the workaround to work, we should add 2 to the bo size.  But that
-       * would waste a page when the bo size is already page aligned.  Let's
-       * round it to page size for now and revisit this when needed.
-       */
-      buf->bo_size = align(buf->bo_size, 4096);
-   }
+       ilo_dev_gen(&is->dev) < ILO_GEN(7.5))
+      size = align(size, 4096);
+
+   if (templ->bind & PIPE_BIND_VERTEX_BUFFER)
+      size = ilo_state_vertex_buffer_size(&is->dev, size, &alignment);
+   if (templ->bind & PIPE_BIND_INDEX_BUFFER)
+      size = ilo_state_index_buffer_size(&is->dev, size, &alignment);
+   if (templ->bind & PIPE_BIND_STREAM_OUTPUT)
+      size = ilo_state_sol_buffer_size(&is->dev, size, &alignment);
 
-   if (buf->bo_size < templ->width0 ||
-       buf->bo_size > ilo_max_resource_size ||
+   buf->bo_size = size;
+   ilo_vma_init(&buf->vma, &is->dev, buf->bo_size, 4096);
+
+   if (buf->bo_size < templ->width0 || buf->bo_size > ilo_max_resource_size ||
        !buf_create_bo(buf)) {
       FREE(buf);
       return NULL;
@@ -481,15 +673,32 @@ static boolean
 ilo_can_create_resource(struct pipe_screen *screen,
                         const struct pipe_resource *templ)
 {
-   struct ilo_layout layout;
+   struct ilo_screen *is = ilo_screen(screen);
+   enum pipe_format image_format;
+   struct ilo_image_info info;
+   struct ilo_image img;
 
    if (templ->target == PIPE_BUFFER)
       return (templ->width0 <= ilo_max_resource_size);
 
-   memset(&layout, 0, sizeof(layout));
-   ilo_layout_init(&layout, &ilo_screen(screen)->dev, templ);
+   image_format = resource_get_image_format(templ, &is->dev, NULL);
+   resource_get_image_info(templ, &is->dev, image_format, &info);
+
+   memset(&img, 0, sizeof(img));
+   ilo_image_init(&img, &ilo_screen(screen)->dev, &info);
+
+   /* as in tex_init_image() */
+   if (ilo_dev_gen(&is->dev) == ILO_GEN(6) &&
+       templ->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT &&
+       image_format == PIPE_FORMAT_Z32_FLOAT &&
+       img.aux.enables != (1 << templ->last_level)) {
+      info.format = pipe_to_surface_format(&is->dev, templ->format);
+      info.interleaved_stencil = true;
+      memset(&img, 0, sizeof(img));
+      ilo_image_init(&img, &ilo_screen(screen)->dev, &info);
+   }
 
-   return (layout.bo_height <= ilo_max_resource_size / layout.bo_stride);
+   return (img.bo_height <= ilo_max_resource_size / img.bo_stride);
 }
 
 static struct pipe_resource *
@@ -505,7 +714,8 @@ ilo_resource_create(struct pipe_screen *screen,
 static struct pipe_resource *
 ilo_resource_from_handle(struct pipe_screen *screen,
                          const struct pipe_resource *templ,
-                         struct winsys_handle *handle)
+                         struct winsys_handle *handle,
+                         unsigned usage)
 {
    if (templ->target == PIPE_BUFFER)
       return NULL;
@@ -516,7 +726,8 @@ ilo_resource_from_handle(struct pipe_screen *screen,
 static boolean
 ilo_resource_get_handle(struct pipe_screen *screen,
                         struct pipe_resource *res,
-                        struct winsys_handle *handle)
+                        struct winsys_handle *handle,
+                        unsigned usage)
 {
    if (res->target == PIPE_BUFFER)
       return false;
@@ -530,7 +741,7 @@ ilo_resource_destroy(struct pipe_screen *screen,
                      struct pipe_resource *res)
 {
    if (res->target == PIPE_BUFFER)
-      buf_destroy(ilo_buffer(res));
+      buf_destroy((struct ilo_buffer_resource *) res);
    else
       tex_destroy(ilo_texture(res));
 }
@@ -549,35 +760,17 @@ ilo_init_resource_functions(struct ilo_screen *is)
 }
 
 bool
-ilo_buffer_rename_bo(struct ilo_buffer *buf)
+ilo_resource_rename_bo(struct pipe_resource *res)
 {
-   struct intel_bo *old_bo = buf->bo;
-
-   if (buf_create_bo(buf)) {
-      intel_bo_unreference(old_bo);
-      return true;
-   }
-   else {
-      buf->bo = old_bo;
-      return false;
-   }
-}
-
-bool
-ilo_texture_rename_bo(struct ilo_texture *tex)
-{
-   struct intel_bo *old_bo = tex->bo;
+   if (res->target == PIPE_BUFFER) {
+      return buf_create_bo((struct ilo_buffer_resource *) res);
+   } else {
+      struct ilo_texture *tex = ilo_texture(res);
 
-   /* an imported texture cannot be renamed */
-   if (tex->imported)
-      return false;
+      /* an imported texture cannot be renamed */
+      if (tex->imported)
+         return false;
 
-   if (tex_create_bo(tex)) {
-      intel_bo_unreference(old_bo);
-      return true;
-   }
-   else {
-      tex->bo = old_bo;
-      return false;
+      return tex_create_bo(tex);
    }
 }