X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Firis%2Firis_resource.h;h=304339eb470f673c0eaeb9d012b8b013ab8f43d1;hb=f58e0405b6ca15d9b82122d82311e8b82f4a0939;hp=eccb36e35ecd79f73edb814e80efacf709fdb22c;hpb=7339660e80331ed773fc6dbb8295384d4ef6954e;p=mesa.git

diff --git a/src/gallium/drivers/iris/iris_resource.h b/src/gallium/drivers/iris/iris_resource.h
index eccb36e35ec..304339eb470 100644
--- a/src/gallium/drivers/iris/iris_resource.h
+++ b/src/gallium/drivers/iris/iris_resource.h
@@ -25,6 +25,7 @@
 
 #include "pipe/p_state.h"
 #include "util/u_inlines.h"
+#include "util/u_range.h"
 #include "intel/isl/isl.h"
 
 struct iris_batch;
@@ -67,12 +68,25 @@ struct iris_resource {
    /** Backing storage for the resource */
    struct iris_bo *bo;
 
+   /** offset at which data starts in the BO */
+   uint64_t offset;
+
    /**
     * A bitfield of PIPE_BIND_* indicating how this resource was bound
     * in the past.  Only meaningful for PIPE_BUFFER; used for flushing.
     */
    unsigned bind_history;
 
+   /**
+    * For PIPE_BUFFER resources, a range which may contain valid data.
+    *
+    * This is a conservative estimate of what part of the buffer contains
+    * valid data that we have to preserve.  The rest of the buffer is
+    * considered invalid, and we can promote writes to that region to
+    * be unsynchronized writes, avoiding blit copies.
+    */
+   struct util_range valid_buffer_range;
+
    /**
     * Auxiliary buffer information (CCS, MCS, or HiZ).
     */
@@ -176,6 +190,16 @@ struct iris_sampler_view {
    struct iris_state_ref surface_state;
 };
 
+/**
+ * Image view representation.
+ */
+struct iris_image_view {
+   struct pipe_image_view base;
+
+   /** The resource (BO) holding our SURFACE_STATE. */
+   struct iris_state_ref surface_state;
+};
+
 /**
  * Gallium CSO for surfaces (framebuffer attachments).
  *
@@ -185,10 +209,13 @@ struct iris_sampler_view {
 struct iris_surface {
    struct pipe_surface base;
    struct isl_view view;
+   struct isl_view read_view;
    union isl_color_value clear_color;
 
    /** The resource (BO) holding our SURFACE_STATE. */
    struct iris_state_ref surface_state;
+   /** The resource (BO) holding our SURFACE_STATE for read. */
+   struct iris_state_ref surface_state_read;
 };
 
 /**
@@ -237,9 +264,15 @@ iris_resource_get_clear_color(const struct iris_resource *res,
 
 void iris_init_screen_resource_functions(struct pipe_screen *pscreen);
 
+void iris_dirty_for_history(struct iris_context *ice,
+                            struct iris_resource *res);
+uint32_t iris_flush_bits_for_history(struct iris_resource *res);
+
 void iris_flush_and_dirty_for_history(struct iris_context *ice,
                                       struct iris_batch *batch,
-                                      struct iris_resource *res);
+                                      struct iris_resource *res,
+                                      uint32_t extra_flags,
+                                      const char *reason);
 
 unsigned iris_get_num_logical_layers(const struct iris_resource *res,
                                      unsigned level);
@@ -362,6 +395,13 @@ iris_resource_access_raw(struct iris_context *ice,
    }
 }
 
+enum isl_dim_layout iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
+                                            enum isl_tiling tiling,
+                                            enum pipe_texture_target target);
+enum isl_surf_dim target_to_isl_surf_dim(enum pipe_texture_target target);
+uint32_t iris_resource_get_tile_offsets(const struct iris_resource *res,
+                                        uint32_t level, uint32_t z,
+                                        uint32_t *tile_x, uint32_t *tile_y);
 enum isl_aux_usage iris_resource_texture_aux_usage(struct iris_context *ice,
                                                    const struct iris_resource *res,
                                                    enum isl_format view_fmt,
@@ -377,11 +417,28 @@ void iris_resource_prepare_image(struct iris_context *ice,
                                  struct iris_batch *batch,
                                  struct iris_resource *res);
 
+static inline bool
+iris_resource_unfinished_aux_import(struct iris_resource *res)
+{
+   return res->base.next != NULL && res->mod_info &&
+      res->mod_info->aux_usage != ISL_AUX_USAGE_NONE;
+}
+
+void iris_resource_finish_aux_import(struct pipe_screen *pscreen,
+                                     struct iris_resource *res);
+
+bool iris_has_color_unresolved(const struct iris_resource *res,
+                               unsigned start_level, unsigned num_levels,
+                               unsigned start_layer, unsigned num_layers);
+
 void iris_resource_check_level_layer(const struct iris_resource *res,
                                      uint32_t level, uint32_t layer);
 
 bool iris_resource_level_has_hiz(const struct iris_resource *res,
                                  uint32_t level);
+bool iris_has_color_unresolved(const struct iris_resource *res,
+                               unsigned start_level, unsigned num_levels,
+                               unsigned start_layer, unsigned num_layers);
 
 enum isl_aux_usage iris_resource_render_aux_usage(struct iris_context *ice,
                                                   struct iris_resource *res,