X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fnouveau%2Fnv30%2Fnv30_screen.c;h=e2febc327108ba83089b47637d93cb3f6bf1f788;hb=150736b5c34fc07de296454b973ae72ede215ae2;hp=b43d85288c6f0e907538d967e37b9c99b1e22635;hpb=a020cb3a72019748fee1824fc542b3b8225226c9;p=mesa.git diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c index b43d85288c6..e2febc32710 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -91,7 +91,6 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: case PIPE_CAP_TGSI_TEXCOORD: case PIPE_CAP_USER_CONSTANT_BUFFERS: - case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: @@ -210,6 +209,9 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_MUL_ZERO_WINS: case PIPE_CAP_DOUBLES: case PIPE_CAP_INT64: + case PIPE_CAP_INT64_DIVMOD: + case PIPE_CAP_TGSI_TEX_TXF_LZ: + case PIPE_CAP_TGSI_CLOCK: return 0; case PIPE_CAP_VENDOR_ID: @@ -258,7 +260,8 @@ nv30_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) } static int -nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, +nv30_screen_get_shader_param(struct pipe_screen *pscreen, + enum pipe_shader_type shader, enum pipe_shader_cap param) { struct nv30_screen *screen = nv30_screen(pscreen); @@ -291,7 +294,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return 0; - case PIPE_SHADER_CAP_MAX_PREDS: case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: @@ -339,7 +341,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, return 32; case PIPE_SHADER_CAP_PREFERRED_IR: return PIPE_SHADER_IR_TGSI; - case PIPE_SHADER_CAP_MAX_PREDS: case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: