X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fnv50%2Fnv50_winsys.h;h=145ee70cb9fba4284b5fee02744d335132764b44;hb=c893b9406060d3735b2c9e307ae89f6d83a4be40;hp=afa2a00c7a251c2a6d86a8d2d98a6803046ba734;hpb=be68782d9aebf6f6575bb8cc9cfc66b7bad79644;p=mesa.git diff --git a/src/gallium/drivers/nv50/nv50_winsys.h b/src/gallium/drivers/nv50/nv50_winsys.h index afa2a00c7a2..145ee70cb9f 100644 --- a/src/gallium/drivers/nv50/nv50_winsys.h +++ b/src/gallium/drivers/nv50/nv50_winsys.h @@ -7,100 +7,119 @@ #include "pipe/p_defines.h" -#include "nouveau/nouveau_bo.h" -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_grobj.h" -#include "nouveau/nouveau_device.h" -#include "nouveau/nouveau_resource.h" -#include "nouveau/nouveau_pushbuf.h" -#include "nouveau/nouveau_reloc.h" -#include "nouveau/nouveau_notifier.h" - +#include "nouveau/nouveau_winsys.h" #include "nouveau/nouveau_buffer.h" + #ifndef NV04_PFIFO_MAX_PACKET_LEN #define NV04_PFIFO_MAX_PACKET_LEN 2047 #endif -#define NV50_SUBCH_3D 5 -#define NV50_SUBCH_2D 6 -#define NV50_SUBCH_MF 7 -#define NV50_MF_(n) NV50_M2MF_##n +static INLINE void +nv50_add_bufctx_resident_bo(struct nouveau_bufctx *bufctx, int bin, + unsigned flags, struct nouveau_bo *bo) +{ + nouveau_bufctx_refn(bufctx, bin, bo, flags)->priv = NULL; +} + +static INLINE void +nv50_add_bufctx_resident(struct nouveau_bufctx *bufctx, int bin, + struct nv04_resource *res, unsigned flags) +{ + struct nouveau_bufref *ref = + nouveau_bufctx_refn(bufctx, bin, res->bo, flags | res->domain); + ref->priv = res; + ref->priv_data = flags; +} + +#define BCTX_REFN_bo(ctx, bin, fl, bo) \ + nv50_add_bufctx_resident_bo(ctx, NV50_BIND_##bin, fl, bo); + +#define BCTX_REFN(bctx, bin, res, acc) \ + nv50_add_bufctx_resident(bctx, NV50_BIND_##bin, res, NOUVEAU_BO_##acc) + +static INLINE void +PUSH_REFN(struct nouveau_pushbuf *push, struct nouveau_bo *bo, uint32_t flags) +{ + struct nouveau_pushbuf_refn ref = { bo, flags }; + nouveau_pushbuf_refn(push, &ref, 1); +} + + +#define SUBC_3D(m) 3, (m) +#define NV50_3D(n) SUBC_3D(NV50_3D_##n) +#define NVA0_3D(n) SUBC_3D(NVA0_3D_##n) -#define RING_3D(n) ((NV50_SUBCH_3D << 13) | NV50_3D_##n) -#define RING_2D(n) ((NV50_SUBCH_2D << 13) | NV50_2D_##n) -#define RING_MF(n) ((NV50_SUBCH_MF << 13) | NV50_MF_(n)) +#define SUBC_2D(m) 4, (m) +#define NV50_2D(n) SUBC_2D(NV50_2D_##n) -#define RING_3D_(m) ((NV50_SUBCH_3D << 13) | (m)) -#define RING_2D_(m) ((NV50_SUBCH_2D << 13) | (m)) -#define RING_MF_(m) ((NV50_SUBCH_MF << 13) | (m)) +#define SUBC_M2MF(m) 5, (m) +#define NV50_M2MF(n) SUBC_M2MF(NV50_M2MF_##n) -#define RING_GR(gr, m) (((gr)->subc << 13) | (m)) +#define SUBC_COMPUTE(m) 6, (m) +#define NV50_COMPUTE(n) SUBC_COMPUTE(NV50_COMPUTE_##n) -int nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min); -static inline uint32_t -nouveau_bo_tile_layout(struct nouveau_bo *bo) +static INLINE uint32_t +NV50_FIFO_PKHDR(int subc, int mthd, unsigned size) { - return bo->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK; + return 0x00000000 | (size << 18) | (subc << 13) | mthd; } -static INLINE void -nouveau_bo_validate(struct nouveau_channel *chan, - struct nouveau_bo *bo, unsigned flags) +static INLINE uint32_t +NV50_FIFO_PKHDR_NI(int subc, int mthd, unsigned size) { - nouveau_reloc_emit(chan, NULL, 0, NULL, bo, 0, 0, flags, 0, 0); + return 0x40000000 | (size << 18) | (subc << 13) | mthd; } -/* incremental methods */ -static INLINE void -BEGIN_RING(struct nouveau_channel *chan, uint32_t mthd, unsigned size) +static INLINE uint32_t +NV50_FIFO_PKHDR_L(int subc, int mthd) { - WAIT_RING(chan, size + 1); - OUT_RING (chan, (size << 18) | mthd); + return 0x00030000 | (subc << 13) | mthd; } -/* non-incremental */ -static INLINE void -BEGIN_RING_NI(struct nouveau_channel *chan, uint32_t mthd, unsigned size) + +static INLINE uint32_t +nouveau_bo_memtype(const struct nouveau_bo *bo) { - WAIT_RING(chan, size + 1); - OUT_RING (chan, (0x2 << 29) | (size << 18) | mthd); + return bo->config.nv50.memtype; } -static INLINE int -OUT_RESRCh(struct nouveau_channel *chan, struct nv04_resource *res, - unsigned delta, unsigned flags) + +static INLINE void +PUSH_DATAh(struct nouveau_pushbuf *push, uint64_t data) { - return OUT_RELOCh(chan, res->bo, res->offset + delta, res->domain | flags); + *push->cur++ = (uint32_t)(data >> 32); } -static INLINE int -OUT_RESRCl(struct nouveau_channel *chan, struct nv04_resource *res, - unsigned delta, unsigned flags) +static INLINE void +BEGIN_NV04(struct nouveau_pushbuf *push, int subc, int mthd, unsigned size) { - if (flags & NOUVEAU_BO_WR) - res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; - return OUT_RELOCl(chan, res->bo, res->offset + delta, res->domain | flags); +#ifndef NV50_PUSH_EXPLICIT_SPACE_CHECKING + PUSH_SPACE(push, size + 1); +#endif + PUSH_DATA (push, NV50_FIFO_PKHDR(subc, mthd, size)); } static INLINE void -BIND_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, unsigned s) +BEGIN_NI04(struct nouveau_pushbuf *push, int subc, int mthd, unsigned size) { - struct nouveau_subchannel *subc = &gr->channel->subc[s]; - - assert(s < 8); - if (subc->gr) { - assert(subc->gr->bound != NOUVEAU_GROBJ_BOUND_EXPLICIT); - subc->gr->bound = NOUVEAU_GROBJ_UNBOUND; - } - subc->gr = gr; - subc->gr->subc = s; - subc->gr->bound = NOUVEAU_GROBJ_BOUND_EXPLICIT; - - BEGIN_RING(chan, RING_GR(gr, 0x0000), 1); - OUT_RING (chan, gr->handle); +#ifndef NV50_PUSH_EXPLICIT_SPACE_CHECKING + PUSH_SPACE(push, size + 1); +#endif + PUSH_DATA (push, NV50_FIFO_PKHDR_NI(subc, mthd, size)); } +/* long, non-incremental, nv50-only */ +static INLINE void +BEGIN_NL50(struct nouveau_pushbuf *push, int subc, int mthd, uint32_t size) +{ +#ifndef NV50_PUSH_EXPLICIT_SPACE_CHECKING + PUSH_SPACE(push, 2); #endif + PUSH_DATA (push, NV50_FIFO_PKHDR_L(subc, mthd)); + PUSH_DATA (push, size); +} + +#endif /* __NV50_WINSYS_H__ */