X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fnvfx%2Fnvfx_fragprog.c;h=dbd7c77346512d4ae00afa0d1308c1a1ce3f59ab;hb=358795bc0bacdba9a36bb010ef18ee1b2d086f2d;hp=ebd3eb88c1cddfa6c34744340f9204c35743f009;hpb=847ac88671ce4315eb03fcd1d746d20ee03379af;p=mesa.git diff --git a/src/gallium/drivers/nvfx/nvfx_fragprog.c b/src/gallium/drivers/nvfx/nvfx_fragprog.c index ebd3eb88c1c..dbd7c773465 100644 --- a/src/gallium/drivers/nvfx/nvfx_fragprog.c +++ b/src/gallium/drivers/nvfx/nvfx_fragprog.c @@ -1,3 +1,4 @@ +#include #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" @@ -8,34 +9,31 @@ #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_util.h" #include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_ureg.h" #include "nvfx_context.h" #include "nvfx_shader.h" #include "nvfx_resource.h" -#define MAX_CONSTS 128 -#define MAX_IMM 32 - struct nvfx_fpc { + struct nvfx_pipe_fragment_program* pfp; struct nvfx_fragment_program *fp; - unsigned r_temps; - unsigned r_temps_discard; + unsigned max_temps; + unsigned long long r_temps; + unsigned long long r_temps_discard; struct nvfx_reg r_result[PIPE_MAX_SHADER_OUTPUTS]; struct nvfx_reg *r_temp; + unsigned sprite_coord_temp; int num_regs; unsigned inst_offset; unsigned have_const; - struct { - int pipe; - float vals[4]; - } consts[MAX_CONSTS]; - int nr_consts; + struct util_dynarray imm_data; - struct nvfx_reg imm[MAX_IMM]; + struct nvfx_reg* r_imm; unsigned nr_imm; unsigned char generic_to_slot[256]; /* semantic idx for each input semantic */ @@ -48,16 +46,16 @@ struct nvfx_fpc { static INLINE struct nvfx_reg temp(struct nvfx_fpc *fpc) { - int idx = ffs(~fpc->r_temps) - 1; + int idx = __builtin_ctzll(~fpc->r_temps); - if (idx < 0) { + if (idx >= fpc->max_temps) { NOUVEAU_ERR("out of temps!!\n"); assert(0); return nvfx_reg(NVFXSR_TEMP, 0); } - fpc->r_temps |= (1 << idx); - fpc->r_temps_discard |= (1 << idx); + fpc->r_temps |= (1ULL << idx); + fpc->r_temps_discard |= (1ULL << idx); return nvfx_reg(NVFXSR_TEMP, idx); } @@ -65,22 +63,17 @@ static INLINE void release_temps(struct nvfx_fpc *fpc) { fpc->r_temps &= ~fpc->r_temps_discard; - fpc->r_temps_discard = 0; + fpc->r_temps_discard = 0ULL; } -static INLINE struct nvfx_reg -constant(struct nvfx_fpc *fpc, int pipe, float vals[4]) +static inline struct nvfx_reg +nvfx_fp_imm(struct nvfx_fpc *fpc, float a, float b, float c, float d) { - int idx; + float v[4] = {a, b, c, d}; + int idx = fpc->imm_data.size >> 4; - if (fpc->nr_consts == MAX_CONSTS) - assert(0); - idx = fpc->nr_consts++; - - fpc->consts[idx].pipe = pipe; - if (pipe == -1) - memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nvfx_reg(NVFXSR_CONST, idx); + memcpy(util_dynarray_grow(&fpc->imm_data, sizeof(float) * 4), v, 4 * sizeof(float)); + return nvfx_reg(NVFXSR_IMM, idx); } static void @@ -112,30 +105,40 @@ emit_src(struct nvfx_fpc *fpc, int pos, struct nvfx_src src) sr |= (src.reg.index << NVFX_FP_REG_SRC_SHIFT); break; case NVFXSR_RELOCATED: - sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); + sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); + sr |= (fpc->sprite_coord_temp << NVFX_FP_REG_SRC_SHIFT); //printf("adding relocation at %x for %x\n", fpc->inst_offset, src.index); - util_dynarray_append(&fpc->fp->slot_relocations[src.reg.index], unsigned, fpc->inst_offset); + util_dynarray_append(&fpc->fp->slot_relocations[src.reg.index], unsigned, fpc->inst_offset + pos + 1); + break; + case NVFXSR_IMM: + if (!fpc->have_const) { + grow_insns(fpc, 4); + hw = &fp->insn[fpc->inst_offset]; + fpc->have_const = 1; + } + + memcpy(&fp->insn[fpc->inst_offset + 4], + (float*)fpc->imm_data.data + src.reg.index * 4, + sizeof(uint32_t) * 4); + + sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); break; case NVFXSR_CONST: if (!fpc->have_const) { grow_insns(fpc, 4); + hw = &fp->insn[fpc->inst_offset]; fpc->have_const = 1; } - hw = &fp->insn[fpc->inst_offset]; - if (fpc->consts[src.reg.index].pipe >= 0) { + { struct nvfx_fragment_program_data *fpd; fp->consts = realloc(fp->consts, ++fp->nr_consts * sizeof(*fpd)); fpd = &fp->consts[fp->nr_consts - 1]; fpd->offset = fpc->inst_offset + 4; - fpd->index = fpc->consts[src.reg.index].pipe; + fpd->index = src.reg.index; memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4); - } else { - memcpy(&fp->insn[fpc->inst_offset + 4], - fpc->consts[src.reg.index].vals, - sizeof(uint32_t) * 4); } sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); @@ -202,7 +205,7 @@ nvfx_fp_emit(struct nvfx_fpc *fpc, struct nvfx_insn insn) memset(hw, 0, sizeof(uint32_t) * 4); if (insn.op == NVFX_FP_OP_OPCODE_KIL) - fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL; + fp->fp_control |= NV30_3D_FP_CONTROL_USES_KIL; hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); hw[0] |= (insn.mask << NVFX_FP_OP_OUTMASK_SHIFT); hw[2] |= (insn.scale << NVFX_FP_OP_DST_SCALE_SHIFT); @@ -244,12 +247,13 @@ nv40_fp_if(struct nvfx_fpc *fpc, struct nvfx_src src) { const struct nvfx_src none = nvfx_src(nvfx_reg(NVFXSR_NONE, 0)); struct nvfx_insn insn = arith(0, MOV, none.reg, NVFX_FP_MASK_X, src, none, none); + uint32_t *hw; insn.cc_update = 1; nvfx_fp_emit(fpc, insn); fpc->inst_offset = fpc->fp->insn_len; grow_insns(fpc, 4); - uint32_t *hw = &fpc->fp->insn[fpc->inst_offset]; + hw = &fpc->fp->insn[fpc->inst_offset]; /* I really wonder why fp16 precision is used. Presumably the hardware ignores it? */ hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | NV40_FP_OP_OUT_NONE | @@ -269,10 +273,11 @@ nv40_fp_if(struct nvfx_fpc *fpc, struct nvfx_src src) static void nv40_fp_cal(struct nvfx_fpc *fpc, unsigned target) { - struct nvfx_label_relocation reloc; + struct nvfx_relocation reloc; + uint32_t *hw; fpc->inst_offset = fpc->fp->insn_len; grow_insns(fpc, 4); - uint32_t *hw = &fpc->fp->insn[fpc->inst_offset]; + hw = &fpc->fp->insn[fpc->inst_offset]; /* I really wonder why fp16 precision is used. Presumably the hardware ignores it? */ hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); /* Use .xxxx swizzle so that we check only src[0].x*/ @@ -282,15 +287,16 @@ nv40_fp_cal(struct nvfx_fpc *fpc, unsigned target) hw[3] = 0; reloc.target = target; reloc.location = fpc->inst_offset + 2; - util_dynarray_append(&fpc->label_relocs, struct nvfx_label_relocation, reloc); + util_dynarray_append(&fpc->label_relocs, struct nvfx_relocation, reloc); } static void nv40_fp_ret(struct nvfx_fpc *fpc) { + uint32_t *hw; fpc->inst_offset = fpc->fp->insn_len; grow_insns(fpc, 4); - uint32_t *hw = &fpc->fp->insn[fpc->inst_offset]; + hw = &fpc->fp->insn[fpc->inst_offset]; /* I really wonder why fp16 precision is used. Presumably the hardware ignores it? */ hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); /* Use .xxxx swizzle so that we check only src[0].x*/ @@ -303,10 +309,11 @@ nv40_fp_ret(struct nvfx_fpc *fpc) static void nv40_fp_rep(struct nvfx_fpc *fpc, unsigned count, unsigned target) { - struct nvfx_label_relocation reloc; + struct nvfx_relocation reloc; + uint32_t *hw; fpc->inst_offset = fpc->fp->insn_len; grow_insns(fpc, 4); - uint32_t *hw = &fpc->fp->insn[fpc->inst_offset]; + hw = &fpc->fp->insn[fpc->inst_offset]; /* I really wonder why fp16 precision is used. Presumably the hardware ignores it? */ hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | NV40_FP_OP_OUT_NONE | @@ -321,7 +328,7 @@ nv40_fp_rep(struct nvfx_fpc *fpc, unsigned count, unsigned target) hw[3] = 0; /* | end_offset */ reloc.target = target; reloc.location = fpc->inst_offset + 3; - util_dynarray_append(&fpc->label_relocs, struct nvfx_label_relocation, reloc); + util_dynarray_append(&fpc->label_relocs, struct nvfx_relocation, reloc); //util_dynarray_append(&fpc->loop_stack, unsigned, target); } @@ -329,10 +336,11 @@ nv40_fp_rep(struct nvfx_fpc *fpc, unsigned count, unsigned target) static void nv40_fp_bra(struct nvfx_fpc *fpc, unsigned target) { - struct nvfx_label_relocation reloc; + struct nvfx_relocation reloc; + uint32_t *hw; fpc->inst_offset = fpc->fp->insn_len; grow_insns(fpc, 4); - uint32_t *hw = &fpc->fp->insn[fpc->inst_offset]; + hw = &fpc->fp->insn[fpc->inst_offset]; /* I really wonder why fp16 precision is used. Presumably the hardware ignores it? */ hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | NV40_FP_OP_OUT_NONE | @@ -344,18 +352,19 @@ nv40_fp_bra(struct nvfx_fpc *fpc, unsigned target) hw[3] = 0; /* | endif_offset */ reloc.target = target; reloc.location = fpc->inst_offset + 2; - util_dynarray_append(&fpc->label_relocs, struct nvfx_label_relocation, reloc); + util_dynarray_append(&fpc->label_relocs, struct nvfx_relocation, reloc); reloc.target = target; reloc.location = fpc->inst_offset + 3; - util_dynarray_append(&fpc->label_relocs, struct nvfx_label_relocation, reloc); + util_dynarray_append(&fpc->label_relocs, struct nvfx_relocation, reloc); } static void nv40_fp_brk(struct nvfx_fpc *fpc) { + uint32_t *hw; fpc->inst_offset = fpc->fp->insn_len; grow_insns(fpc, 4); - uint32_t *hw = &fpc->fp->insn[fpc->inst_offset]; + hw = &fpc->fp->insn[fpc->inst_offset]; /* I really wonder why fp16 precision is used. Presumably the hardware ignores it? */ hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | NV40_FP_OP_OUT_NONE; @@ -373,35 +382,35 @@ tgsi_src(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc) switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - if(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_POSITION) { - assert(fpc->fp->info.input_semantic_index[fsrc->Register.Index] == 0); + if(fpc->pfp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_POSITION) { + assert(fpc->pfp->info.input_semantic_index[fsrc->Register.Index] == 0); src.reg = nvfx_reg(NVFXSR_INPUT, NVFX_FP_OP_INPUT_SRC_POSITION); - } else if(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_COLOR) { - if(fpc->fp->info.input_semantic_index[fsrc->Register.Index] == 0) + } else if(fpc->pfp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_COLOR) { + if(fpc->pfp->info.input_semantic_index[fsrc->Register.Index] == 0) src.reg = nvfx_reg(NVFXSR_INPUT, NVFX_FP_OP_INPUT_SRC_COL0); - else if(fpc->fp->info.input_semantic_index[fsrc->Register.Index] == 1) + else if(fpc->pfp->info.input_semantic_index[fsrc->Register.Index] == 1) src.reg = nvfx_reg(NVFXSR_INPUT, NVFX_FP_OP_INPUT_SRC_COL1); else assert(0); - } else if(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FOG) { - assert(fpc->fp->info.input_semantic_index[fsrc->Register.Index] == 0); + } else if(fpc->pfp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FOG) { + assert(fpc->pfp->info.input_semantic_index[fsrc->Register.Index] == 0); src.reg = nvfx_reg(NVFXSR_INPUT, NVFX_FP_OP_INPUT_SRC_FOGC); - } else if(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FACE) { + } else if(fpc->pfp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FACE) { /* TODO: check this has the correct values */ /* XXX: what do we do for nv30 here (assuming it lacks facing)?! */ - assert(fpc->fp->info.input_semantic_index[fsrc->Register.Index] == 0); + assert(fpc->pfp->info.input_semantic_index[fsrc->Register.Index] == 0); src.reg = nvfx_reg(NVFXSR_INPUT, NV40_FP_OP_INPUT_SRC_FACING); } else { - assert(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_GENERIC); - src.reg = nvfx_reg(NVFXSR_RELOCATED, fpc->generic_to_slot[fpc->fp->info.input_semantic_index[fsrc->Register.Index]]); + assert(fpc->pfp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_GENERIC); + src.reg = nvfx_reg(NVFXSR_RELOCATED, fpc->generic_to_slot[fpc->pfp->info.input_semantic_index[fsrc->Register.Index]]); } break; case TGSI_FILE_CONSTANT: - src.reg = constant(fpc, fsrc->Register.Index, NULL); + src.reg = nvfx_reg(NVFXSR_CONST, fsrc->Register.Index); break; case TGSI_FILE_IMMEDIATE: assert(fsrc->Register.Index < fpc->nr_imm); - src.reg = fpc->imm[fsrc->Register.Index]; + src.reg = fpc->r_imm[fsrc->Register.Index]; break; case TGSI_FILE_TEMPORARY: src.reg = fpc->r_temp[fsrc->Register.Index]; @@ -412,6 +421,8 @@ tgsi_src(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc) break; default: NOUVEAU_ERR("bad src file\n"); + src.reg.index = 0; + src.reg.type = 0; break; } @@ -421,6 +432,9 @@ tgsi_src(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc) src.swz[1] = fsrc->Register.SwizzleY; src.swz[2] = fsrc->Register.SwizzleZ; src.swz[3] = fsrc->Register.SwizzleW; + src.indirect = 0; + src.indirect_reg = 0; + src.indirect_swz = 0; return src; } @@ -457,7 +471,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, { const struct nvfx_src none = nvfx_src(nvfx_reg(NVFXSR_NONE, 0)); struct nvfx_insn insn; - struct nvfx_src src[3], tmp, tmp2; + struct nvfx_src src[3], tmp; struct nvfx_reg dst; int mask, sat, unit = 0; int ai = -1, ci = -1, ii = -1; @@ -482,7 +496,21 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { + if(fpc->pfp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FOG && (0 + || fsrc->Register.SwizzleX == PIPE_SWIZZLE_ALPHA + || fsrc->Register.SwizzleY == PIPE_SWIZZLE_ALPHA + || fsrc->Register.SwizzleZ == PIPE_SWIZZLE_ALPHA + || fsrc->Register.SwizzleW == PIPE_SWIZZLE_ALPHA + )) { + /* hardware puts 0 in fogcoord.w, but GL/Gallium want 1 there */ + struct nvfx_src addend = nvfx_src(nvfx_fp_imm(fpc, 0, 0, 0, 1)); + addend.swz[0] = fsrc->Register.SwizzleX; + addend.swz[1] = fsrc->Register.SwizzleY; + addend.swz[2] = fsrc->Register.SwizzleZ; + addend.swz[3] = fsrc->Register.SwizzleW; + src[i] = nvfx_src(temp(fpc)); + nvfx_fp_emit(fpc, arith(0, ADD, src[i].reg, NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), addend, none)); + } else if (ai == -1 || ai == fsrc->Register.Index) { ai = fsrc->Register.Index; src[i] = tgsi_src(fpc, fsrc); } else { @@ -536,7 +564,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none)); break; case TGSI_OPCODE_CMP: - insn = arith(0, MOV, none.reg, 0xf, src[0], none, none); + insn = arith(0, MOV, none.reg, mask, src[0], none, none); insn.cc_update = 1; nvfx_fp_emit(fpc, insn); @@ -616,7 +644,27 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, case TGSI_OPCODE_LG2: nvfx_fp_emit(fpc, arith(sat, LG2, dst, mask, src[0], none, none)); break; -// case TGSI_OPCODE_LIT: + case TGSI_OPCODE_LIT: + if(!nvfx->is_nv4x) + nvfx_fp_emit(fpc, arith(sat, LIT_NV30, dst, mask, src[0], src[1], src[2])); + else { + /* we use FLT_MIN, so that log2 never gives -infinity, and thus multiplication by + * specular 0 always gives 0, so that ex2 gives 1, to satisfy the 0^0 = 1 requirement + * + * NOTE: if we start using half precision, we might need an fp16 FLT_MIN here instead + */ + struct nvfx_src maxs = nvfx_src(nvfx_fp_imm(fpc, 0, FLT_MIN, 0, 0)); + tmp = nvfx_src(temp(fpc)); + if (ci>= 0 || ii >= 0) { + nvfx_fp_emit(fpc, arith(0, MOV, tmp.reg, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, maxs, none, none)); + maxs = tmp; + } + nvfx_fp_emit(fpc, arith(0, MAX, tmp.reg, NVFX_FP_MASK_Y | NVFX_FP_MASK_W, swz(src[0], X, X, X, Y), swz(maxs, X, X, Y, Y), none)); + nvfx_fp_emit(fpc, arith(0, LG2, tmp.reg, NVFX_FP_MASK_W, swz(tmp, W, W, W, W), none, none)); + nvfx_fp_emit(fpc, arith(0, MUL, tmp.reg, NVFX_FP_MASK_W, swz(tmp, W, W, W, W), swz(src[0], W, W, W, W), none)); + nvfx_fp_emit(fpc, arith(sat, LITEX2_NV40, dst, mask, swz(tmp, Y, Y, W, W), none, none)); + } + break; case TGSI_OPCODE_LRP: if(!nvfx->is_nv4x) nvfx_fp_emit(fpc, arith(sat, LRP_NV30, dst, mask, src[0], src[1], src[2])); @@ -722,12 +770,24 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, nvfx_fp_emit(fpc, arith(sat, SNE, dst, mask, src[0], src[1], none)); break; case TGSI_OPCODE_SSG: - tmp = nvfx_src(temp(fpc)); - tmp2 = nvfx_src(temp(fpc)); - nvfx_fp_emit(fpc, arith(0, SGT, tmp.reg, mask, src[0], nvfx_src(nvfx_reg(NVFXSR_CONST, 0)), none)); - nvfx_fp_emit(fpc, arith(0, SLT, tmp.reg, mask, src[0], nvfx_src(nvfx_reg(NVFXSR_CONST, 0)), none)); - nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, tmp, neg(tmp2), none)); + { + struct nvfx_src minones = swz(nvfx_src(nvfx_fp_imm(fpc, -1, -1, -1, -1)), X, X, X, X); + + insn = arith(sat, MOV, dst, mask, src[0], none, none); + insn.cc_update = 1; + nvfx_fp_emit(fpc, insn); + + insn = arith(0, STR, dst, mask, none, none, none); + insn.cc_test = NVFX_COND_GT; + nvfx_fp_emit(fpc, insn); + + if(!sat) { + insn = arith(0, MOV, dst, mask, minones, none, none); + insn.cc_test = NVFX_COND_LT; + nvfx_fp_emit(fpc, insn); + } break; + } case TGSI_OPCODE_STR: nvfx_fp_emit(fpc, arith(sat, STR, dst, mask, src[0], src[1], none)); break; @@ -753,6 +813,12 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, case TGSI_OPCODE_TXB: nvfx_fp_emit(fpc, tex(sat, TXB, unit, dst, mask, src[0], none, none)); break; + case TGSI_OPCODE_TXL: + if(nvfx->is_nv4x) + nvfx_fp_emit(fpc, tex(sat, TXL_NV40, unit, dst, mask, src[0], none, none)); + else /* unsupported on nv30, use TEX and hope they like it */ + nvfx_fp_emit(fpc, tex(sat, TEX, unit, dst, mask, src[0], none, none)); + break; case TGSI_OPCODE_TXP: nvfx_fp_emit(fpc, tex(sat, TXP, unit, dst, mask, src[0], none, none)); break; @@ -765,27 +831,29 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, case TGSI_OPCODE_IF: // MOVRC0 R31 (TR0.xyzw), R: // IF (NE.xxxx) ELSE END - if(!nvfx->is_nv4x) + if(!nvfx->use_nv4x) goto nv3x_cflow; nv40_fp_if(fpc, src[0]); break; case TGSI_OPCODE_ELSE: { - if(!nvfx->is_nv4x) + uint32_t *hw; + if(!nvfx->use_nv4x) goto nv3x_cflow; assert(util_dynarray_contains(&fpc->if_stack, unsigned)); - uint32_t *hw = &fpc->fp->insn[util_dynarray_top(&fpc->if_stack, unsigned)]; + hw = &fpc->fp->insn[util_dynarray_top(&fpc->if_stack, unsigned)]; hw[2] = NV40_FP_OP_OPCODE_IS_BRANCH | fpc->fp->insn_len; break; } case TGSI_OPCODE_ENDIF: { - if(!nvfx->is_nv4x) + uint32_t *hw; + if(!nvfx->use_nv4x) goto nv3x_cflow; assert(util_dynarray_contains(&fpc->if_stack, unsigned)); - uint32_t *hw = &fpc->fp->insn[util_dynarray_pop(&fpc->if_stack, unsigned)]; + hw = &fpc->fp->insn[util_dynarray_pop(&fpc->if_stack, unsigned)]; if(!hw[2]) hw[2] = NV40_FP_OP_OPCODE_IS_BRANCH | fpc->fp->insn_len; hw[3] = fpc->fp->insn_len; @@ -805,19 +873,19 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, break; case TGSI_OPCODE_CAL: - if(!nvfx->is_nv4x) + if(!nvfx->use_nv4x) goto nv3x_cflow; nv40_fp_cal(fpc, finst->Label.Label); break; case TGSI_OPCODE_RET: - if(!nvfx->is_nv4x) + if(!nvfx->use_nv4x) goto nv3x_cflow; nv40_fp_ret(fpc); break; case TGSI_OPCODE_BGNLOOP: - if(!nvfx->is_nv4x) + if(!nvfx->use_nv4x) goto nv3x_cflow; /* TODO: we should support using two nested REPs to allow a > 255 iteration count */ nv40_fp_rep(fpc, 255, finst->Label.Label); @@ -827,7 +895,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, break; case TGSI_OPCODE_BRK: - if(!nvfx->is_nv4x) + if(!nvfx->use_nv4x) goto nv3x_cflow; nv40_fp_brk(fpc); break; @@ -882,7 +950,7 @@ nvfx_fragprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, case 2: hw = 3; break; case 3: hw = 4; break; } - if(hw > ((nvfx->is_nv4x) ? 4 : 2)) { + if(hw > ((nvfx->use_nv4x) ? 4 : 2)) { NOUVEAU_ERR("bad rcol index\n"); return FALSE; } @@ -893,7 +961,7 @@ nvfx_fragprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, } fpc->r_result[idx] = nvfx_reg(NVFXSR_OUTPUT, hw); - fpc->r_temps |= (1 << hw); + fpc->r_temps |= (1ULL << hw); return TRUE; } @@ -903,21 +971,19 @@ nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc) struct tgsi_parse_context p; int high_temp = -1, i; struct util_semantic_set set; - float const0v[4] = {0, 0, 0, 0}; - struct nvfx_reg const0; + unsigned num_texcoords = nvfx->use_nv4x ? 10 : 8; - fpc->fp->num_slots = util_semantic_set_from_program_file(&set, fpc->fp->pipe.tokens, TGSI_FILE_INPUT); - if(fpc->fp->num_slots > 8) + fpc->fp->num_slots = util_semantic_set_from_program_file(&set, fpc->pfp->pipe.tokens, TGSI_FILE_INPUT); + if(fpc->fp->num_slots > num_texcoords) return FALSE; - util_semantic_layout_from_set(fpc->fp->slot_to_generic, &set, 0, 8); - util_semantic_table_from_layout(fpc->generic_to_slot, fpc->fp->slot_to_generic, 0, 8); + util_semantic_layout_from_set(fpc->fp->slot_to_generic, &set, 0, num_texcoords); + util_semantic_table_from_layout(fpc->generic_to_slot, fpc->fp->slot_to_generic, 0, num_texcoords); memset(fpc->fp->slot_to_fp_input, 0xff, sizeof(fpc->fp->slot_to_fp_input)); - const0 = constant(fpc, -1, const0v); - assert(const0.index == 0); + fpc->r_imm = CALLOC(fpc->pfp->info.immediate_count, sizeof(struct nvfx_reg)); - tgsi_parse_init(&p, fpc->fp->pipe.tokens); + tgsi_parse_init(&p, fpc->pfp->pipe.tokens); while (!tgsi_parse_end_of_tokens(&p)) { const union tgsi_full_token *tok = &p.FullToken; @@ -946,19 +1012,14 @@ nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc) case TGSI_TOKEN_TYPE_IMMEDIATE: { struct tgsi_full_immediate *imm; - float vals[4]; imm = &p.FullToken.FullImmediate; assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(fpc->nr_imm < MAX_IMM); + assert(fpc->nr_imm < fpc->pfp->info.immediate_count); - vals[0] = imm->u[0].Float; - vals[1] = imm->u[1].Float; - vals[2] = imm->u[2].Float; - vals[3] = imm->u[3].Float; - fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); - } + fpc->r_imm[fpc->nr_imm++] = nvfx_fp_imm(fpc, imm->u[0].Float, imm->u[1].Float, imm->u[2].Float, imm->u[3].Float); break; + } default: break; } @@ -969,42 +1030,73 @@ nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc) fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_reg)); for (i = 0; i < high_temp; i++) fpc->r_temp[i] = temp(fpc); - fpc->r_temps_discard = 0; + fpc->r_temps_discard = 0ULL; } return TRUE; out_err: - if (fpc->r_temp) + if (fpc->r_temp) { FREE(fpc->r_temp); + fpc->r_temp = NULL; + } tgsi_parse_free(&p); return FALSE; } DEBUG_GET_ONCE_BOOL_OPTION(nvfx_dump_fp, "NVFX_DUMP_FP", FALSE) -static void +static struct nvfx_fragment_program* nvfx_fragprog_translate(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) + struct nvfx_pipe_fragment_program *pfp, + boolean emulate_sprite_flipping) { struct tgsi_parse_context parse; struct nvfx_fpc *fpc = NULL; struct util_dynarray insns; + struct nvfx_fragment_program* fp = NULL; + const int min_size = 4096; + + fp = CALLOC_STRUCT(nvfx_fragment_program); + if(!fp) + goto out_err; - fpc = CALLOC(1, sizeof(struct nvfx_fpc)); + fpc = CALLOC_STRUCT(nvfx_fpc); if (!fpc) - return; + goto out_err; + + fpc->max_temps = nvfx->use_nv4x ? 48 : 32; + fpc->pfp = pfp; fpc->fp = fp; fpc->num_regs = 2; - if (!nvfx_fragprog_prepare(nvfx, fpc)) { - FREE(fpc); - return; + for (unsigned i = 0; i < pfp->info.num_properties; ++i) { + if (pfp->info.properties[i].name == TGSI_PROPERTY_FS_COORD_ORIGIN) { + if(pfp->info.properties[i].data[0]) + fp->coord_conventions |= NV30_3D_COORD_CONVENTIONS_ORIGIN_INVERTED; + } else if (pfp->info.properties[i].name == TGSI_PROPERTY_FS_COORD_PIXEL_CENTER) { + if(pfp->info.properties[i].data[0]) + fp->coord_conventions |= NV30_3D_COORD_CONVENTIONS_CENTER_INTEGER; + } } - tgsi_parse_init(&parse, fp->pipe.tokens); + if (!nvfx_fragprog_prepare(nvfx, fpc)) + goto out_err; + tgsi_parse_init(&parse, pfp->pipe.tokens); util_dynarray_init(&insns); + + if(emulate_sprite_flipping) + { + struct nvfx_reg reg = temp(fpc); + struct nvfx_src sprite_input = nvfx_src(nvfx_reg(NVFXSR_RELOCATED, fp->num_slots)); + struct nvfx_src imm = nvfx_src(nvfx_fp_imm(fpc, 1, -1, 0, 0)); + + fpc->sprite_coord_temp = reg.index; + fpc->r_temps_discard = 0ULL; + nvfx_fp_emit(fpc, arith(0, MAD, reg, NVFX_FP_MASK_ALL, sprite_input, swz(imm, X, Y, X, X), swz(imm, Z, X, Z, Z))); + } + while (!tgsi_parse_end_of_tokens(&parse)) { tgsi_parse_token(&parse); @@ -1025,9 +1117,9 @@ nvfx_fragprog_translate(struct nvfx_context *nvfx, } util_dynarray_append(&insns, unsigned, fp->insn_len); - for(unsigned i = 0; i < fpc->label_relocs.size; i += sizeof(struct nvfx_label_relocation)) + for(unsigned i = 0; i < fpc->label_relocs.size; i += sizeof(struct nvfx_relocation)) { - struct nvfx_label_relocation* label_reloc = (struct nvfx_label_relocation*)((char*)fpc->label_relocs.data + i); + struct nvfx_relocation* label_reloc = (struct nvfx_relocation*)((char*)fpc->label_relocs.data + i); fp->insn[label_reloc->location] |= ((unsigned*)insns.data)[label_reloc->target]; } util_dynarray_fini(&insns); @@ -1035,7 +1127,7 @@ nvfx_fragprog_translate(struct nvfx_context *nvfx, if(!nvfx->is_nv4x) fp->fp_control |= (fpc->num_regs-1)/2; else - fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT; + fp->fp_control |= fpc->num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT; /* Terminate final instruction */ if(fp->insn) @@ -1052,7 +1144,7 @@ nvfx_fragprog_translate(struct nvfx_context *nvfx, if(debug_get_option_nvfx_dump_fp()) { debug_printf("\n"); - tgsi_dump(fp->pipe.tokens, 0); + tgsi_dump(pfp->pipe.tokens, 0); debug_printf("\n%s fragment program:\n", nvfx->is_nv4x ? "nv4x" : "nv3x"); for (unsigned i = 0; i < fp->insn_len; i += 4) @@ -1060,139 +1152,237 @@ nvfx_fragprog_translate(struct nvfx_context *nvfx, debug_printf("\n"); } - fp->translated = TRUE; -out_err: + fp->prog_size = (fp->insn_len * 4 + 63) & ~63; + + if(fp->prog_size >= min_size) + fp->progs_per_bo = 1; + else + fp->progs_per_bo = min_size / fp->prog_size; + fp->bo_prog_idx = fp->progs_per_bo - 1; + +out: tgsi_parse_free(&parse); - if (fpc->r_temp) - FREE(fpc->r_temp); - util_dynarray_fini(&fpc->if_stack); - util_dynarray_fini(&fpc->label_relocs); - //util_dynarray_fini(&fpc->loop_stack); - FREE(fpc); + if(fpc) + { + if (fpc->r_temp) + FREE(fpc->r_temp); + util_dynarray_fini(&fpc->if_stack); + util_dynarray_fini(&fpc->label_relocs); + util_dynarray_fini(&fpc->imm_data); + //util_dynarray_fini(&fpc->loop_stack); + FREE(fpc); + } + return fp; + +out_err: + _debug_printf("Error: failed to compile this fragment program:\n"); + tgsi_dump(pfp->pipe.tokens, 0); + + if(fp) + { + FREE(fp); + fp = NULL; + } + goto out; } static inline void nvfx_fp_memcpy(void* dst, const void* src, size_t len) { -#ifndef WORDS_BIGENDIAN +#ifndef PIPE_ARCH_BIG_ENDIAN memcpy(dst, src, len); #else size_t i; for(i = 0; i < len; i += 4) { - uint32_t v = (uint32_t*)((char*)src + i); + uint32_t v = *(uint32_t*)((char*)src + i); *(uint32_t*)((char*)dst + i) = (v >> 16) | (v << 16); } #endif } +/* The hardware only supports immediate constants inside the fragment program, + * and at least on nv30 doesn't support an indirect linkage table. + * + * Hence, we need to patch the fragment program itself both to update constants + * and update linkage. + * + * Using a single fragment program would entail unacceptable stalls if the GPU is + * already rendering with that fragment program. + * Thus, we instead use a "rotating queue" of buffer objects, each of which is + * packed with multiple versions of the same program. + * + * Whenever we need to patch something, we move to the next program and + * patch it. If all buffer objects are in use by the GPU, we allocate another one, + * expanding the queue. + * + * As an additional optimization, we record when all the programs have the + * current input slot configuration, and at that point we stop patching inputs. + * This happens, for instance, if a given fragment program is always used with + * the same vertex program (i.e. always with GLSL), or if the layouts match + * enough (non-GLSL). + * + * Note that instead of using multiple programs, we could push commands + * on the FIFO to patch a single program: it's not fully clear which option is + * faster, but my guess is that the current way is faster. + * + * We also track the previous slot assignments for each version and don't + * patch if they are the same (this could perhaps be removed). + */ + void nvfx_fragprog_validate(struct nvfx_context *nvfx) { struct nouveau_channel* chan = nvfx->screen->base.channel; - struct nvfx_fragment_program *fp = nvfx->fragprog; - int update = 0; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct nvfx_pipe_fragment_program *pfp = nvfx->fragprog; + struct nvfx_vertex_program* vp; + + // TODO: the multiplication by point_quad_rasterization is probably superfluous + unsigned sprite_coord_enable = nvfx->rasterizer->pipe.point_quad_rasterization * nvfx->rasterizer->pipe.sprite_coord_enable; + + boolean emulate_sprite_flipping = sprite_coord_enable && nvfx->rasterizer->pipe.sprite_coord_mode; + unsigned key = emulate_sprite_flipping; + struct nvfx_fragment_program* fp; - if (!fp->translated) + fp = pfp->fps[key]; + if (!fp) { - const int min_size = 4096; + fp = nvfx_fragprog_translate(nvfx, pfp, emulate_sprite_flipping); - nvfx_fragprog_translate(nvfx, fp); - if (!fp->translated) { - static unsigned dummy[8] = {1, 0, 0, 0, 1, 0, 0, 0}; - static int warned = 0; - if(!warned) + if(!fp) + { + if(!nvfx->dummy_fs) { - fprintf(stderr, "nvfx: failed to translate fragment program!\n"); - warned = 1; + struct ureg_program *ureg = ureg_create( TGSI_PROCESSOR_FRAGMENT ); + if (ureg) + { + ureg_END( ureg ); + nvfx->dummy_fs = ureg_create_shader_and_destroy( ureg, &nvfx->pipe ); + } + + if(!nvfx->dummy_fs) + { + _debug_printf("Error: unable to create a dummy fragment shader: aborting."); + abort(); + } } - /* use dummy program: we cannot fail here */ - fp->translated = TRUE; - fp->insn = malloc(sizeof(dummy)); - memcpy(fp->insn, dummy, sizeof(dummy)); - fp->insn_len = sizeof(dummy) / sizeof(dummy[0]); - } - update = TRUE; + fp = nvfx_fragprog_translate(nvfx, nvfx->dummy_fs, FALSE); + emulate_sprite_flipping = FALSE; - fp->prog_size = (fp->insn_len * 4 + 63) & ~63; + if(!fp) + { + _debug_printf("Error: unable to compile even a dummy fragment shader: aborting."); + abort(); + } + } - if(fp->prog_size >= min_size) - fp->progs_per_bo = 1; - else - fp->progs_per_bo = min_size / fp->prog_size; - fp->bo_prog_idx = fp->progs_per_bo - 1; + pfp->fps[key] = fp; } - /* we must update constants even on "just" fragprog changes, because - we don't check whether the current constant buffer matches the latest - one bound to this fragment program */ - if (nvfx->dirty & (NVFX_NEW_FRAGCONST | NVFX_NEW_FRAGPROG)) - update = TRUE; - - struct nvfx_vertex_program* vp = nvfx->render_mode == HW ? nvfx->vertprog : nvfx->swtnl.vertprog; - if (fp->last_vp_id != vp->id) { - char* vp_sem_table = vp->generic_to_fp_input; - unsigned char* fp_semantics = fp->slot_to_generic; - unsigned diff = 0; - fp->last_vp_id = nvfx->vertprog->id; - unsigned char* cur_slots = fp->slot_to_fp_input; - for(unsigned i = 0; i < fp->num_slots; ++i) { - unsigned char slot_mask = vp_sem_table[fp_semantics[i]]; - diff |= (slot_mask >> 4) & (slot_mask ^ cur_slots[i]); - } + vp = nvfx->hw_vertprog; - if(diff) + if (fp->last_vp_id != vp->id || fp->last_sprite_coord_enable != sprite_coord_enable) { + int sprite_real_input = -1; + int sprite_reloc_input; + unsigned i; + fp->last_vp_id = vp->id; + fp->last_sprite_coord_enable = sprite_coord_enable; + + if(sprite_coord_enable) { - for(unsigned i = 0; i < fp->num_slots; ++i) { - /* if 0xff, then this will write to the dummy value at fp->last_layout_mask[0] */ - fp->slot_to_fp_input[i] = vp_sem_table[fp_semantics[i]] & 0xf; - //printf("fp: GENERIC[%i] from fpreg %i\n", fp_semantics[i], fp->slot_to_fp_input[i]); + sprite_real_input = vp->sprite_fp_input; + if(sprite_real_input < 0) + { + unsigned used_texcoords = 0; + for(unsigned i = 0; i < fp->num_slots; ++i) { + unsigned generic = fp->slot_to_generic[i]; + if((generic < 32) && !((1 << generic) & sprite_coord_enable)) + { + unsigned char slot_mask = vp->generic_to_fp_input[generic]; + if(slot_mask >= 0xf0) + used_texcoords |= 1 << ((slot_mask & 0xf) - NVFX_FP_OP_INPUT_SRC_TC0); + } + } + + sprite_real_input = NVFX_FP_OP_INPUT_SRC_TC(__builtin_ctz(~used_texcoords)); } - fp->progs_left_with_obsolete_slot_assignments = fp->progs; - update = TRUE; + fp->point_sprite_control |= (1 << (sprite_real_input - NVFX_FP_OP_INPUT_SRC_TC0 + 8)); } - } + else + fp->point_sprite_control = 0; - // last_sprite_coord_enable - unsigned sprite_coord_enable = nvfx->rasterizer->pipe.point_quad_rasterization * nvfx->rasterizer->pipe.sprite_coord_enable; - if(fp->last_sprite_coord_enable != sprite_coord_enable) - { - unsigned texcoord_mask = vp->texcoord_ouput_mask; - fp->last_sprite_coord_enable = sprite_coord_enable; - fp->point_sprite_control = 0; - for(unsigned i = 0; i < fp->num_slots; ++i) { - if((1 << fp->slot_to_generic[i]) & sprite_coord_enable) - { - unsigned fpin = fp->slot_to_fp_input[i]; - //printf("sprite: slot %i generic %i had texcoord %i\n", i, fp->slot_to_generic[i], fpin - NVFX_FP_OP_INPUT_SRC_TC0); - if(fpin >= 0x0f) - { - unsigned tc = __builtin_ctz(~texcoord_mask); - texcoord_mask |= (1 << tc); - fp->slot_to_fp_input[i] = fpin = NVFX_FP_OP_INPUT_SRC_TC(tc); + if(emulate_sprite_flipping) + sprite_reloc_input = 0; + else + sprite_reloc_input = sprite_real_input; - fp->progs_left_with_obsolete_slot_assignments = fp->progs; - update = TRUE; - } - //printf("sprite: slot %i texcoord %i\n", i, fpin - NVFX_FP_OP_INPUT_SRC_TC0); - fp->point_sprite_control |= (1 << (fpin - NVFX_FP_OP_INPUT_SRC_TC0 + 8)); + for(i = 0; i < fp->num_slots; ++i) { + unsigned generic = fp->slot_to_generic[i]; + if((generic < 32) && ((1 << generic) & sprite_coord_enable)) + { + if(fp->slot_to_fp_input[i] != sprite_reloc_input) + goto update_slots; } else { - unsigned fpin = fp->slot_to_fp_input[i]; - if(!(vp->texcoord_ouput_mask & (1 << (fpin - NVFX_FP_OP_INPUT_SRC_TC0)))) - { - fp->slot_to_fp_input[i] = 0x0f; + unsigned char slot_mask = vp->generic_to_fp_input[generic]; + if((slot_mask >> 4) & (slot_mask ^ fp->slot_to_fp_input[i])) + goto update_slots; + } + } + + if(emulate_sprite_flipping) + { + if(fp->slot_to_fp_input[fp->num_slots] != sprite_real_input) + goto update_slots; + } - fp->progs_left_with_obsolete_slot_assignments = fp->progs; - update = TRUE; + if(0) + { +update_slots: + /* optimization: we start updating from the slot we found the first difference in */ + for(; i < fp->num_slots; ++i) + { + unsigned generic = fp->slot_to_generic[i]; + if((generic < 32) && ((1 << generic) & sprite_coord_enable)) + fp->slot_to_fp_input[i] = sprite_reloc_input; + else + fp->slot_to_fp_input[i] = vp->generic_to_fp_input[generic] & 0xf; + } + + fp->slot_to_fp_input[fp->num_slots] = sprite_real_input; + + if(nvfx->is_nv4x) + { + fp->or = 0; + for(i = 0; i <= fp->num_slots; ++i) { + unsigned fp_input = fp->slot_to_fp_input[i]; + if(fp_input == NVFX_FP_OP_INPUT_SRC_TC(8)) + fp->or |= (1 << 12); + else if(fp_input == NVFX_FP_OP_INPUT_SRC_TC(9)) + fp->or |= (1 << 13); + else if(fp_input >= NVFX_FP_OP_INPUT_SRC_TC(0) && fp_input <= NVFX_FP_OP_INPUT_SRC_TC(7)) + fp->or |= (1 << (fp_input - NVFX_FP_OP_INPUT_SRC_TC0 + 14)); } } + + fp->progs_left_with_obsolete_slot_assignments = fp->progs; + goto update; } } - if(update) { + /* We must update constants even on "just" fragprog changes, because + * we don't check whether the current constant buffer matches the latest + * one bound to this fragment program. + * Doing such a check would likely be a pessimization. + */ + if ((nvfx->hw_fragprog != fp) || (nvfx->dirty & (NVFX_NEW_FRAGPROG | NVFX_NEW_FRAGCONST))) { + int offset; + uint32_t* fpmap; + +update: ++fp->bo_prog_idx; if(fp->bo_prog_idx >= fp->progs_per_bo) { @@ -1203,6 +1393,9 @@ nvfx_fragprog_validate(struct nvfx_context *nvfx) else { struct nvfx_fragment_program_bo* fpbo = os_malloc_aligned(sizeof(struct nvfx_fragment_program) + (fp->prog_size + 8) * fp->progs_per_bo, 16); + uint8_t* map; + uint8_t* buf; + fpbo->slots = (unsigned char*)&fpbo->insn[(fp->prog_size) * fp->progs_per_bo]; memset(fpbo->slots, 0, 8 * fp->progs_per_bo); if(fp->fpbo) @@ -1219,8 +1412,8 @@ nvfx_fragprog_validate(struct nvfx_context *nvfx) nouveau_bo_new(nvfx->screen->base.device, NOUVEAU_BO_VRAM | NOUVEAU_BO_MAP, 64, fp->prog_size * fp->progs_per_bo, &fpbo->bo); nouveau_bo_map(fpbo->bo, NOUVEAU_BO_NOSYNC); - uint8_t* map = fpbo->bo->map; - uint8_t* buf = (uint8_t*)fpbo->insn; + map = fpbo->bo->map; + buf = (uint8_t*)fpbo->insn; for(unsigned i = 0; i < fp->progs_per_bo; ++i) { memcpy(buf, fp->insn, fp->insn_len * 4); @@ -1232,8 +1425,8 @@ nvfx_fragprog_validate(struct nvfx_context *nvfx) fp->bo_prog_idx = 0; } - int offset = fp->bo_prog_idx * fp->prog_size; - uint32_t* fpmap = (uint32_t*)((char*)fp->fpbo->bo->map + offset); + offset = fp->bo_prog_idx * fp->prog_size; + fpmap = (uint32_t*)((char*)fp->fpbo->bo->map + offset); if(nvfx->constbuf[PIPE_SHADER_FRAGMENT]) { struct pipe_resource* constbuf = nvfx->constbuf[PIPE_SHADER_FRAGMENT]; @@ -1253,66 +1446,103 @@ nvfx_fragprog_validate(struct nvfx_context *nvfx) } } + /* we only do this if we aren't sure that all program versions have the + * current slot assignments, otherwise we just update constants for speed + */ if(fp->progs_left_with_obsolete_slot_assignments) { unsigned char* fpbo_slots = &fp->fpbo->slots[fp->bo_prog_idx * 8]; - for(unsigned i = 0; i < fp->num_slots; ++i) { + /* also relocate sprite coord slot, if any */ + for(unsigned i = 0; i <= fp->num_slots; ++i) { unsigned value = fp->slot_to_fp_input[i];; if(value != fpbo_slots[i]) { - unsigned* p = (unsigned*)fp->slot_relocations[i].data; - unsigned* pend = (unsigned*)((char*)fp->slot_relocations[i].data + fp->slot_relocations[i].size); - for(; p != pend; ++p) { - unsigned off = *p; - unsigned dw = fp->insn[off]; - dw = (dw & ~NVFX_FP_OP_INPUT_SRC_MASK) | (value << NVFX_FP_OP_INPUT_SRC_SHIFT); - nvfx_fp_memcpy(&fpmap[*p], &dw, sizeof(dw)); + unsigned* p; + unsigned* begin = (unsigned*)fp->slot_relocations[i].data; + unsigned* end = (unsigned*)((char*)fp->slot_relocations[i].data + fp->slot_relocations[i].size); + //printf("fp %p reloc slot %u/%u: %u -> %u\n", fp, i, fp->num_slots, fpbo_slots[i], value); + if(value == 0) + { + /* was relocated to an input, switch type to temporary */ + for(p = begin; p != end; ++p) { + unsigned off = *p; + unsigned dw = fp->insn[off]; + dw &=~ NVFX_FP_REG_TYPE_MASK; + //printf("reloc_tmp at %x\n", off); + nvfx_fp_memcpy(&fpmap[off], &dw, sizeof(dw)); + } + } else { + if(!fpbo_slots[i]) + { + /* was relocated to a temporary, switch type to input */ + for(p= begin; p != end; ++p) { + unsigned off = *p; + unsigned dw = fp->insn[off]; + //printf("reloc_in at %x\n", off); + dw |= NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT; + nvfx_fp_memcpy(&fpmap[off], &dw, sizeof(dw)); + } + } + + /* set the correct input index */ + for(p = begin; p != end; ++p) { + unsigned off = *p & ~3; + unsigned dw = fp->insn[off]; + //printf("reloc&~3 at %x\n", off); + dw = (dw & ~NVFX_FP_OP_INPUT_SRC_MASK) | (value << NVFX_FP_OP_INPUT_SRC_SHIFT); + nvfx_fp_memcpy(&fpmap[off], &dw, sizeof(dw)); + } } fpbo_slots[i] = value; } } --fp->progs_left_with_obsolete_slot_assignments; } - } - if(update || (nvfx->dirty & NVFX_NEW_FRAGPROG)) { - int offset = fp->bo_prog_idx * fp->prog_size; + nvfx->hw_fragprog = fp; + MARK_RING(chan, 8, 1); - OUT_RING(chan, RING_3D(NV34TCL_FP_ACTIVE_PROGRAM, 1)); + BEGIN_RING(chan, eng3d, NV30_3D_FP_ACTIVE_PROGRAM, 1); OUT_RELOC(chan, fp->fpbo->bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, - NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - OUT_RING(chan, RING_3D(NV34TCL_FP_CONTROL, 1)); + NOUVEAU_BO_OR, NV30_3D_FP_ACTIVE_PROGRAM_DMA0, + NV30_3D_FP_ACTIVE_PROGRAM_DMA1); + BEGIN_RING(chan, eng3d, NV30_3D_FP_CONTROL, 1); OUT_RING(chan, fp->fp_control); if(!nvfx->is_nv4x) { - OUT_RING(chan, RING_3D(NV34TCL_FP_REG_CONTROL, 1)); + BEGIN_RING(chan, eng3d, NV30_3D_FP_REG_CONTROL, 1); OUT_RING(chan, (1<<16)|0x4); - OUT_RING(chan, RING_3D(NV34TCL_TX_UNITS_ENABLE, 1)); + BEGIN_RING(chan, eng3d, NV30_3D_TEX_UNITS_ENABLE, 1); OUT_RING(chan, fp->samplers); } } - if(nvfx->dirty & (NVFX_NEW_FRAGPROG | NVFX_NEW_SPRITE)) { - WAIT_RING(chan, 2); - OUT_RING(chan, RING_3D(NV34TCL_POINT_SPRITE, 1)); - OUT_RING(chan, fp->point_sprite_control | nvfx->rasterizer->pipe.point_quad_rasterization); + unsigned pointsprite_control = fp->point_sprite_control | nvfx->rasterizer->pipe.point_quad_rasterization; + if(pointsprite_control != nvfx->hw_pointsprite_control) + { + BEGIN_RING(chan, eng3d, NV30_3D_POINT_SPRITE, 1); + OUT_RING(chan, pointsprite_control); + nvfx->hw_pointsprite_control = pointsprite_control; + } } + + nvfx->relocs_needed &=~ NVFX_RELOCATE_FRAGPROG; } void nvfx_fragprog_relocate(struct nvfx_context *nvfx) { struct nouveau_channel* chan = nvfx->screen->base.channel; - struct nvfx_fragment_program *fp = nvfx->fragprog; + struct nvfx_fragment_program *fp = nvfx->hw_fragprog; struct nouveau_bo* bo = fp->fpbo->bo; int offset = fp->bo_prog_idx * fp->prog_size; unsigned fp_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD; // TODO: GART? fp_flags |= NOUVEAU_BO_DUMMY; MARK_RING(chan, 2, 2); - OUT_RELOC(chan, bo, RING_3D(NV34TCL_FP_ACTIVE_PROGRAM, 1), fp_flags, 0, 0); + OUT_RELOC(chan, bo, RING_3D(NV30_3D_FP_ACTIVE_PROGRAM, 1), fp_flags, 0, 0); OUT_RELOC(chan, bo, offset, fp_flags | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, - NV34TCL_FP_ACTIVE_PROGRAM_DMA1); + NOUVEAU_BO_OR, NV30_3D_FP_ACTIVE_PROGRAM_DMA0, + NV30_3D_FP_ACTIVE_PROGRAM_DMA1); + nvfx->relocs_needed &=~ NVFX_RELOCATE_FRAGPROG; } void @@ -1328,15 +1558,66 @@ nvfx_fragprog_destroy(struct nvfx_context *nvfx, struct nvfx_fragment_program_bo* next = fpbo->next; nouveau_bo_unmap(fpbo->bo); nouveau_bo_ref(0, &fpbo->bo); - free(fpbo); + os_free_aligned(fpbo); fpbo = next; } while(fpbo != fp->fpbo); } - for(i = 0; i < 8; ++i) + for(i = 0; i < Elements(fp->slot_relocations); ++i) util_dynarray_fini(&fp->slot_relocations[i]); if (fp->insn_len) FREE(fp->insn); } + +static void * +nvfx_fp_state_create(struct pipe_context *pipe, + const struct pipe_shader_state *cso) +{ + struct nvfx_pipe_fragment_program *pfp; + + pfp = CALLOC(1, sizeof(struct nvfx_pipe_fragment_program)); + pfp->pipe.tokens = tgsi_dup_tokens(cso->tokens); + + tgsi_scan_shader(pfp->pipe.tokens, &pfp->info); + + return (void *)pfp; +} + +static void +nvfx_fp_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->fragprog = hwcso; + nvfx->dirty |= NVFX_NEW_FRAGPROG; +} + +static void +nvfx_fp_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_pipe_fragment_program *pfp = hwcso; + unsigned i; + + for(i = 0; i < Elements(pfp->fps); ++i) + { + if(pfp->fps[i]) + { + nvfx_fragprog_destroy(nvfx, pfp->fps[i]); + FREE(pfp->fps[i]); + } + } + + FREE((void*)pfp->pipe.tokens); + FREE(pfp); +} + +void +nvfx_init_fragprog_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.create_fs_state = nvfx_fp_state_create; + nvfx->pipe.bind_fs_state = nvfx_fp_state_bind; + nvfx->pipe.delete_fs_state = nvfx_fp_state_delete; +}