X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fevergreend.h;h=9fd56ec514020879da268d8aeadfcf570d278343;hb=21d296a4817fa772ef1c1da72fa0b73eb77e00ac;hp=a81b6c5fc8153af15366cd9eb09cc31d860bf14c;hpb=5ea5ed60500a8612166853975b42abd40a459216;p=mesa.git diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index a81b6c5fc81..9fd56ec5140 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -50,6 +50,8 @@ #define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f #define EVENT_TYPE_VGT_FLUSH 0x24 #define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c +#define EVENT_TYPE_CS_DONE 0x2f +#define EVENT_TYPE_PS_DONE 0x30 #define EVENT_TYPE(x) ((x) << 0) #define EVENT_INDEX(x) ((x) << 8) @@ -59,6 +61,7 @@ * 3 - SAMPLE_STREAMOUTSTAT* * 4 - *S_PARTIAL_FLUSH * 5 - TS events + * 6 - EOS events */ #define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7 @@ -87,6 +90,8 @@ #define PKT3_WAIT_REG_MEM 0x3C #define WAIT_REG_MEM_EQUAL 3 #define PKT3_MEM_WRITE 0x3D +#define MEM_WRITE_CONFIRM (1 << 17) +#define MEM_WRITE_32_BITS (1 << 18) #define PKT3_INDIRECT_BUFFER 0x32 #define PKT3_PFP_SYNC_ME 0x42 #define PKT3_SURFACE_SYNC 0x43 @@ -94,6 +99,7 @@ #define PKT3_COND_WRITE 0x45 #define PKT3_EVENT_WRITE 0x46 #define PKT3_EVENT_WRITE_EOP 0x47 +#define PKT3_EVENT_WRITE_EOS 0x48 #define PKT3_ONE_REG_WRITE 0x57 #define PKT3_SET_CONFIG_REG 0x68 #define PKT3_SET_CONTEXT_REG 0x69 @@ -162,9 +168,149 @@ #define PKT3_CP_DMA_CMD_SAIC (1 << 28) #define PKT3_CP_DMA_CMD_DAIC (1 << 29) +#define PKT3_SET_APPEND_CNT 0x75 +/* 1. header + * 2. COMMAND + * 1:0 - SOURCE SEL + * 15:2 - Reserved + * 31:16 - WR_REG_OFFSET - context register to write source data to. + * (one of R_02872C_GDS_APPEND_COUNT_0-11) + * 3. CONTROL + * (for source == mem) + * 31:2 SRC_ADDRESS_LO + * 0:1 SWAP + * (for source == GDS) + * 31:0 GDS offset + * (for source == DATA) + * 31:0 DATA + * (for source == REG) + * 31:0 REG + * 4. SRC_ADDRESS_HI[7:0] + * kernel driver 2.44 only supports SRC == MEM. + */ +#define PKT3_SET_APPEND_CNT_SRC_SELECT(x) ((x) << 0) +/* source is from the data in CONTROL */ +#define PKT3_SAC_SRC_SEL_DATA 0x0 +/* source is from register */ +#define PKT3_SAC_SRC_SEL_REG 0x1 +/* source is from GDS offset in CONTROL */ +#define PKT3_SAC_SRC_SEL_GDS 0x2 +/* source is from memory address */ +#define PKT3_SAC_SRC_SEL_MEM 0x3 + /* Registers */ #define R_0084FC_CP_STRMOUT_CNTL 0x0084FC #define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) +#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 +#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) +#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE +#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) +#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD +#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) +#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB +#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) +#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 +#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) +#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) +#define C_028B94_RAST_STREAM 0xFFFFFF8F +#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) /* SI+ */ +#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) +#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF +#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) /* SI+ */ +#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) +#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF +#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 +#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) +#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 +#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) +#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F +#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) +#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF +#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) +#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF + +#define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C +#define EG_S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) +#define EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) +#define EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) +#define CM_R_028804_DB_EQAA 0x00028804 +#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) +#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) +#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 +#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x07) << 4) +#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) +#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F +#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 8) +#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) +#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF +#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) +#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) +#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF +#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) +#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) +#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF +#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) +#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) +#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF +#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) +#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) +#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF +#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) +#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) +#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF +#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) +#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) +#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF +#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) +#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) +#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF +#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) +#define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07) +#define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF +#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) +#define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) +#define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF +#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc +#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) +#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) +#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF +#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) +#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) +#define C_028BDC_LAST_PIXEL 0xFFFFFBFF +#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) +#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF +#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) +#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF +#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 +#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) +#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) +#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 +#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) +#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) +#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF +#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0x0F) << 13) +#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) +#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF +#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x07) << 20) +#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) +#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF +#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x03) << 24) +#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) +#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF +#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 +#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 +#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 +#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 #define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 /* read-only */ #define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 /* read-only */ #define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 /* read-only */ @@ -388,9 +534,9 @@ #define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 17) #define G_028C70_FAST_CLEAR(x) (((x) >> 17) & 0x1) #define C_028C70_FAST_CLEAR 0xFFFDFFFF -#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x3) << 18) -#define G_028C70_COMPRESSION(x) (((x) >> 18) & 0x3) -#define C_028C70_COMPRESSION 0xFFF3FFFF +#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 18) +#define G_028C70_COMPRESSION(x) (((x) >> 18) & 0x1) +#define C_028C70_COMPRESSION 0xFFFBFFFF #define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 19) #define G_028C70_BLEND_CLAMP(x) (((x) >> 19) & 0x1) #define C_028C70_BLEND_CLAMP 0xFFF7FFFF @@ -842,6 +988,12 @@ #define S_02880C_DUAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 9) #define G_02880C_DUAL_EXPORT_ENABLE(x) (((x) >> 9) & 0x1) #define C_02880C_DUAL_EXPORT_ENABLE 0xFFFFFDFF +#define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 10) +#define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 10) & 0x1) +#define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFBFF +#define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 11) +#define G_02880C_EXEC_ON_NOOP(x) (((x) >> 11) & 0x1) +#define C_02880C_EXEC_ON_NOOP 0xFFFFF7FF #define S_02880C_DB_SOURCE_FORMAT(x) (((unsigned)(x) & 0x3) << 13) #define G_02880C_DB_SOURCE_FORMAT(x) (((x) >> 13) & 0x3) #define C_02880C_DB_SOURCE_FORMAT 0xFFFF9FFF @@ -849,6 +1001,7 @@ #define V_02880C_EXPORT_DB_FOUR16 0x01 #define V_02880C_EXPORT_DB_TWO 0x02 #define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 12) +#define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 15) #define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x03) << 16) #define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 16) & 0x03) #define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFCFFFF @@ -1078,6 +1231,11 @@ #define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) #define C_028208_BR_Y 0x8000FFFF +#define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 +#define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C +#define R_028A88_VGT_NUM_INSTANCES 0x028A88 +#define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 +#define R_0287E8_VGT_DMA_BASE 0x0287E8 #define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 #define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x3) << 0) #define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x3) @@ -1863,8 +2021,8 @@ #define R_0283F8_SQ_VTX_SEMANTIC_30 0x000283F8 #define R_0283FC_SQ_VTX_SEMANTIC_31 0x000283FC #define R_0288F0_SQ_VTX_SEMANTIC_CLEAR 0x000288F0 -#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x000282D0 -#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x000282D4 +#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 +#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 #define R_028400_VGT_MAX_VTX_INDX 0x00028400 #define R_028404_VGT_MIN_VTX_INDX 0x00028404 #define R_028408_VGT_INDX_OFFSET 0x00028408 @@ -1951,12 +2109,25 @@ #define R_0286DC_SPI_FOG_CNTL 0x000286DC #define R_0286E4_SPI_PS_IN_CONTROL_2 0x000286E4 #define R_0286E8_SPI_COMPUTE_INPUT_CNTL 0x000286E8 -#define S_0286E8_TID_IN_GROUP_ENA 1 -#define S_0286E8_TGID_ENA 2 -#define S_0286E8_DISABLE_INDEX_PACK 4 +#define S_0286E8_TID_IN_GROUP_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define S_0286E8_TGID_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define S_0286E8_DISABLE_INDEX_PACK(x) (((unsigned)(x) & 0x1) << 2) #define R_028720_GDS_ADDR_BASE 0x00028720 #define R_028724_GDS_ADDR_SIZE 0x00028724 #define R_028728_GDS_ORDERED_WAVE_PER_SE 0x00028728 +#define R_02872C_GDS_APPEND_COUNT_0 0x0002872C +#define R_028730_GDS_APPEND_COUNT_1 0x00028730 +#define R_028734_GDS_APPEND_COUNT_2 0x00028734 +#define R_028738_GDS_APPEND_COUNT_3 0x00028738 +#define R_02873C_GDS_APPEND_COUNT_4 0x0002873C +#define R_028740_GDS_APPEND_COUNT_5 0x00028740 +#define R_028748_GDS_APPEND_COUNT_6 0x00028744 +#define R_028744_GDS_APPEND_COUNT_7 0x00028748 +#define R_028744_GDS_APPEND_COUNT_8 0x0002874C +#define R_028744_GDS_APPEND_COUNT_9 0x00028750 +#define R_028744_GDS_APPEND_COUNT_10 0x00028754 +#define R_028744_GDS_APPEND_COUNT_11 0x00028758 + #define R_028784_CB_BLEND1_CONTROL 0x00028784 #define R_028788_CB_BLEND2_CONTROL 0x00028788 #define R_02878C_CB_BLEND3_CONTROL 0x0002878C @@ -2021,10 +2192,24 @@ #define R_0288EC_SQ_LDS_ALLOC_PS 0x000288EC #define R_028900_SQ_ESGS_RING_ITEMSIZE 0x00028900 #define R_028904_SQ_GSVS_RING_ITEMSIZE 0x00028904 +#define R_008C50_SQ_ESTMP_RING_BASE 0x00008C50 #define R_028908_SQ_ESTMP_RING_ITEMSIZE 0x00028908 +#define R_008C54_SQ_ESTMP_RING_SIZE 0x00008C54 +#define R_008C58_SQ_GSTMP_RING_BASE 0x00008C58 #define R_02890C_SQ_GSTMP_RING_ITEMSIZE 0x0002890C +#define R_008C5C_SQ_GSTMP_RING_SIZE 0x00008C5C +#define R_008C60_SQ_VSTMP_RING_BASE 0x00008C60 #define R_028910_SQ_VSTMP_RING_ITEMSIZE 0x00028910 +#define R_008C64_SQ_VSTMP_RING_SIZE 0x00008C64 +#define R_008C68_SQ_PSTMP_RING_BASE 0x00008C68 #define R_028914_SQ_PSTMP_RING_ITEMSIZE 0x00028914 +#define R_008C6C_SQ_PSTMP_RING_SIZE 0x00008C6C +#define R_008E10_SQ_LSTMP_RING_BASE 0x00008E10 +#define R_028830_SQ_LSTMP_RING_ITEMSIZE 0x00028830 +#define R_008E14_SQ_LSTMP_RING_SIZE 0x00008E14 +#define R_008E18_SQ_HSTMP_RING_BASE 0x00008E18 +#define R_028834_SQ_HSTMP_RING_ITEMSIZE 0x00028834 +#define R_008E1C_SQ_HSTMP_RING_SIZE 0x00008E1C #define R_02891C_SQ_GS_VERT_ITEMSIZE 0x0002891C #define R_028920_SQ_GS_VERT_ITEMSIZE_1 0x00028920 #define R_028924_SQ_GS_VERT_ITEMSIZE_2 0x00028924 @@ -2208,6 +2393,18 @@ #define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) #define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) #define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) +#define R_028B9C_CB_IMMED0_BASE 0x00028B9C +#define R_028BA0_CB_IMMED1_BASE 0x00028BA0 +#define R_028BA4_CB_IMMED2_BASE 0x00028BA4 +#define R_028BA4_CB_IMMED3_BASE 0x00028BA8 +#define R_028BA4_CB_IMMED4_BASE 0x00028BAC +#define R_028BA4_CB_IMMED5_BASE 0x00028BB0 +#define R_028BA4_CB_IMMED6_BASE 0x00028BB4 +#define R_028BA4_CB_IMMED7_BASE 0x00028BB8 +#define R_028BA4_CB_IMMED8_BASE 0x00028BBC +#define R_028BA4_CB_IMMED9_BASE 0x00028BC0 +#define R_028BA4_CB_IMMED10_BASE 0x00028BC4 +#define R_028BA4_CB_IMMED11_BASE 0x00028BC8 #define R_028C00_PA_SC_LINE_CNTL 0x00028C00 #define S_028C00_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) #define G_028C00_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) @@ -2487,6 +2684,8 @@ #define S_0085F0_CR2_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) #define G_0085F0_CR2_ACTION_ENA(x) (((x) >> 31) & 0x1) #define C_0085F0_CR2_ACTION_ENA 0x7FFFFFFF +#define R_0085F4_CP_COHER_SIZE 0x0085F4 +#define R_0085F8_CP_COHER_BASE 0x0085F8 #define R_008970_VGT_NUM_INDICES 0x008970 #define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0 @@ -2499,31 +2698,65 @@ #define ENDIAN_8IN32 2 #define ENDIAN_8IN64 3 +#define CM_R_0286F8_SPI_GPR_MGMT 0x286f8 #define CM_R_0286FC_SPI_LDS_MGMT 0x286fc #define S_0286FC_NUM_PS_LDS(x) ((x) & 0xff) #define S_0286FC_NUM_LS_LDS(x) ((x) & 0xff) << 8 +#define CM_R_028700_SPI_STACK_MGMT 0x28700 +#define CM_R_028704_SPI_WAVE_MGMT_1 0x28704 +#define CM_R_028708_SPI_WAVE_MGMT_2 0x28708 #define CM_R_028804_DB_EQAA 0x00028804 -#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) -#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) -#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) -#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) -#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) -#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) -#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) -#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) -#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) -#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) +#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) +#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) +#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 +#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x07) << 4) +#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) +#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F +#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 8) +#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) +#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF +#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) +#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) +#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF +#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) +#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) +#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF +#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) +#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) +#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF +#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) +#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) +#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF +#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) +#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) +#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF +#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) +#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) +#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF +#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) +#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) +#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF #define CM_R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x00028BD4 #define CM_R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x00028BD8 #define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc #define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 -#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) -#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) -#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) -#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) -#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) +#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) +#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) +#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 +#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) +#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) +#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF +#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0x0F) << 13) +#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) +#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF +#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x07) << 20) +#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) +#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF +#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x03) << 24) +#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) +#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF #define CM_R_028BE4_PA_SU_VTX_CNTL 0x28be4 #define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x28be8 #define CM_R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x28bec