X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fr600_asm.c;h=92c2bdf27ca6b6a6461fd28a3280390d77e41005;hb=63b231309e829aa6f9289fd30c71a6d301ab5c0a;hp=1ab16f288218068e6d5c571129700c68987f0104;hpb=4ce635c871d00e442efb2b265562685d7edd44ae;p=mesa.git diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index 1ab16f28821..92c2bdf27ca 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -20,189 +20,45 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#include -#include -#include -#include "util/u_format.h" -#include "util/u_memory.h" -#include "pipe/p_shader_tokens.h" -#include "r600_pipe.h" #include "r600_sq.h" #include "r600_opcodes.h" -#include "r600_asm.h" #include "r600_formats.h" +#include "r600_shader.h" #include "r600d.h" +#include +#include "util/u_bitcast.h" +#include "util/u_dump.h" +#include "util/u_memory.h" +#include "util/u_math.h" +#include "pipe/p_shader_tokens.h" + +#include "sb/sb_public.h" + #define NUM_OF_CYCLES 3 #define NUM_OF_COMPONENTS 4 -static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) +static inline bool alu_writes(struct r600_bytecode_alu *alu) { - if(alu->is_op3) - return 3; - - switch (bc->chip_class) { - case R600: - case R700: - switch (alu->inst) { - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP: - return 0; - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT: - return 2; - - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE: - case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT: - return 1; - default: R600_ERR( - "Need instruction operand number for 0x%x.\n", alu->inst); - } - break; - case EVERGREEN: - case CAYMAN: - switch (alu->inst) { - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP: - return 0; - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT: - return 2; - - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT: - case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_LOAD_P0: - return 1; - default: R600_ERR( - "Need instruction operand number for 0x%x.\n", alu->inst); - } - break; - } - - return 3; + return alu->dst.write || alu->is_op3; } -int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id); +static inline unsigned int r600_bytecode_get_num_operands(const struct r600_bytecode_alu *alu) +{ + return r600_isa_alu(alu->op)->src_count; +} static struct r600_bytecode_cf *r600_bytecode_cf(void) { struct r600_bytecode_cf *cf = CALLOC_STRUCT(r600_bytecode_cf); - if (cf == NULL) + if (!cf) return NULL; LIST_INITHEAD(&cf->list); LIST_INITHEAD(&cf->alu); LIST_INITHEAD(&cf->vtx); LIST_INITHEAD(&cf->tex); + LIST_INITHEAD(&cf->gds); return cf; } @@ -210,7 +66,7 @@ static struct r600_bytecode_alu *r600_bytecode_alu(void) { struct r600_bytecode_alu *alu = CALLOC_STRUCT(r600_bytecode_alu); - if (alu == NULL) + if (!alu) return NULL; LIST_INITHEAD(&alu->list); return alu; @@ -220,7 +76,7 @@ static struct r600_bytecode_vtx *r600_bytecode_vtx(void) { struct r600_bytecode_vtx *vtx = CALLOC_STRUCT(r600_bytecode_vtx); - if (vtx == NULL) + if (!vtx) return NULL; LIST_INITHEAD(&vtx->list); return vtx; @@ -230,27 +86,96 @@ static struct r600_bytecode_tex *r600_bytecode_tex(void) { struct r600_bytecode_tex *tex = CALLOC_STRUCT(r600_bytecode_tex); - if (tex == NULL) + if (!tex) return NULL; LIST_INITHEAD(&tex->list); return tex; } -void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class) +static struct r600_bytecode_gds *r600_bytecode_gds(void) +{ + struct r600_bytecode_gds *gds = CALLOC_STRUCT(r600_bytecode_gds); + + if (gds == NULL) + return NULL; + LIST_INITHEAD(&gds->list); + return gds; +} + +static unsigned stack_entry_size(enum radeon_family chip) { + /* Wavefront size: + * 64: R600/RV670/RV770/Cypress/R740/Barts/Turks/Caicos/ + * Aruba/Sumo/Sumo2/redwood/juniper + * 32: R630/R730/R710/Palm/Cedar + * 16: R610/Rs780 + * + * Stack row size: + * Wavefront Size 16 32 48 64 + * Columns per Row (R6xx/R7xx/R8xx only) 8 8 4 4 + * Columns per Row (R9xx+) 8 4 4 4 */ + + switch (chip) { + /* FIXME: are some chips missing here? */ + /* wavefront size 16 */ + case CHIP_RV610: + case CHIP_RS780: + case CHIP_RV620: + case CHIP_RS880: + /* wavefront size 32 */ + case CHIP_RV630: + case CHIP_RV635: + case CHIP_RV730: + case CHIP_RV710: + case CHIP_PALM: + case CHIP_CEDAR: + return 8; + + /* wavefront size 64 */ + default: + return 4; + } +} + +void r600_bytecode_init(struct r600_bytecode *bc, + enum chip_class chip_class, + enum radeon_family family, + bool has_compressed_msaa_texturing) { + static unsigned next_shader_id = 0; + + bc->debug_id = ++next_shader_id; + + if ((chip_class == R600) && + (family != CHIP_RV670 && family != CHIP_RS780 && family != CHIP_RS880)) { + bc->ar_handling = AR_HANDLE_RV6XX; + bc->r6xx_nop_after_rel_dst = 1; + } else { + bc->ar_handling = AR_HANDLE_NORMAL; + bc->r6xx_nop_after_rel_dst = 0; + } + LIST_INITHEAD(&bc->cf); bc->chip_class = chip_class; + bc->family = family; + bc->has_compressed_msaa_texturing = has_compressed_msaa_texturing; + bc->stack.entry_size = stack_entry_size(family); } -static int r600_bytecode_add_cf(struct r600_bytecode *bc) +int r600_bytecode_add_cf(struct r600_bytecode *bc) { struct r600_bytecode_cf *cf = r600_bytecode_cf(); - if (cf == NULL) + if (!cf) return -ENOMEM; LIST_ADDTAIL(&cf->list, &bc->cf); - if (bc->cf_last) + if (bc->cf_last) { cf->id = bc->cf_last->id + 2; + if (bc->cf_last->eg_alu_extended) { + /* take into account extended alu size */ + cf->id += 2; + bc->ndw += 2; + } + } bc->cf_last = cf; bc->ncf++; bc->ndw += 2; @@ -259,26 +184,30 @@ static int r600_bytecode_add_cf(struct r600_bytecode *bc) return 0; } -int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output) +int r600_bytecode_add_output(struct r600_bytecode *bc, + const struct r600_bytecode_output *output) { int r; - if (bc->cf_last && (bc->cf_last->inst == output->inst || - (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT) && - output->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE))) && + if (output->gpr >= bc->ngpr) + bc->ngpr = output->gpr + 1; + + if (bc->cf_last && (bc->cf_last->op == output->op || + (bc->cf_last->op == CF_OP_EXPORT && + output->op == CF_OP_EXPORT_DONE)) && output->type == bc->cf_last->output.type && output->elem_size == bc->cf_last->output.elem_size && output->swizzle_x == bc->cf_last->output.swizzle_x && output->swizzle_y == bc->cf_last->output.swizzle_y && output->swizzle_z == bc->cf_last->output.swizzle_z && output->swizzle_w == bc->cf_last->output.swizzle_w && + output->comp_mask == bc->cf_last->output.comp_mask && (output->burst_count + bc->cf_last->output.burst_count) <= 16) { if ((output->gpr + output->burst_count) == bc->cf_last->output.gpr && (output->array_base + output->burst_count) == bc->cf_last->output.array_base) { - bc->cf_last->output.end_of_program |= output->end_of_program; - bc->cf_last->output.inst = output->inst; + bc->cf_last->op = bc->cf_last->output.op = output->op; bc->cf_last->output.gpr = output->gpr; bc->cf_last->output.array_base = output->array_base; bc->cf_last->output.burst_count += output->burst_count; @@ -287,8 +216,7 @@ int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecod } else if (output->gpr == (bc->cf_last->output.gpr + bc->cf_last->output.burst_count) && output->array_base == (bc->cf_last->output.array_base + bc->cf_last->output.burst_count)) { - bc->cf_last->output.end_of_program |= output->end_of_program; - bc->cf_last->output.inst = output->inst; + bc->cf_last->op = bc->cf_last->output.op = output->op; bc->cf_last->output.burst_count += output->burst_count; return 0; } @@ -297,243 +225,92 @@ int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecod r = r600_bytecode_add_cf(bc); if (r) return r; - bc->cf_last->inst = output->inst; + bc->cf_last->op = output->op; memcpy(&bc->cf_last->output, output, sizeof(struct r600_bytecode_output)); + bc->cf_last->barrier = 1; return 0; } /* alu instructions that can ony exits once per group */ -static int is_alu_once_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) +static int is_alu_once_inst(struct r600_bytecode_alu *alu) { - switch (bc->chip_class) { - case R600: - case R700: - return !alu->is_op3 && ( - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT); - case EVERGREEN: - case CAYMAN: - default: - return !alu->is_op3 && ( - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT); - } + return r600_isa_alu(alu->op)->flags & (AF_KILL | AF_PRED) || alu->is_lds_idx_op || alu->op == ALU_OP0_GROUP_BARRIER; } static int is_alu_reduction_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) { - switch (bc->chip_class) { - case R600: - case R700: - return !alu->is_op3 && ( - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4); - case EVERGREEN: - case CAYMAN: - default: - return !alu->is_op3 && ( - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4); - } + return (r600_isa_alu(alu->op)->flags & AF_REPL) && + (r600_isa_alu_slots(bc->isa->hw_class, alu->op) == AF_4V); } -static int is_alu_cube_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) +static int is_alu_mova_inst(struct r600_bytecode_alu *alu) { - switch (bc->chip_class) { - case R600: - case R700: - return !alu->is_op3 && - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE; - case EVERGREEN: - case CAYMAN: - default: - return !alu->is_op3 && - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE; + return r600_isa_alu(alu->op)->flags & AF_MOVA; +} + +static int alu_uses_rel(struct r600_bytecode_alu *alu) +{ + unsigned num_src = r600_bytecode_get_num_operands(alu); + unsigned src; + + if (alu->dst.rel) { + return 1; + } + + for (src = 0; src < num_src; ++src) { + if (alu->src[src].rel) { + return 1; + } } + return 0; } -static int is_alu_mova_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) +static int is_lds_read(int sel) { - switch (bc->chip_class) { - case R600: - case R700: - return !alu->is_op3 && ( - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT); - case EVERGREEN: - case CAYMAN: - default: - return !alu->is_op3 && ( - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT); + return sel == EG_V_SQ_ALU_SRC_LDS_OQ_A_POP || sel == EG_V_SQ_ALU_SRC_LDS_OQ_B_POP; +} + +static int alu_uses_lds(struct r600_bytecode_alu *alu) +{ + unsigned num_src = r600_bytecode_get_num_operands(alu); + unsigned src; + + for (src = 0; src < num_src; ++src) { + if (is_lds_read(alu->src[src].sel)) { + return 1; + } } + return 0; +} + +static int is_alu_64bit_inst(struct r600_bytecode_alu *alu) +{ + const struct alu_op_info *op = r600_isa_alu(alu->op); + return (op->flags & AF_64); } -/* alu instructions that can only execute on the vector unit */ static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) { - switch (bc->chip_class) { - case R600: - case R700: - return is_alu_reduction_inst(bc, alu) || - is_alu_mova_inst(bc, alu); - case EVERGREEN: - case CAYMAN: - default: - return is_alu_reduction_inst(bc, alu) || - is_alu_mova_inst(bc, alu) || - (alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW); - } + unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op); + return !(slots & AF_S); } -/* alu instructions that can only execute on the trans unit */ static int is_alu_trans_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) { - switch (bc->chip_class) { - case R600: - case R700: - if (!alu->is_op3) - return alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN || - alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE; - else - return alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT || - alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 || - alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 || - alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4; - case EVERGREEN: - case CAYMAN: - default: - if (!alu->is_op3) - /* Note that FLT_TO_INT_* instructions are vector-only instructions - * on Evergreen, despite what the documentation says. FLT_TO_INT - * can do both vector and scalar. */ - return alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN || - alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE; - else - return alu->inst == EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT; - } + unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op); + return !(slots & AF_V); } /* alu instructions that can execute on any unit */ static int is_alu_any_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu) { - return !is_alu_vec_unit_inst(bc, alu) && - !is_alu_trans_unit_inst(bc, alu); + unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op); + return slots == AF_VS; +} + +static int is_nop_inst(struct r600_bytecode_alu *alu) +{ + return alu->op == ALU_OP0_NOP; } static int assign_alu_units(struct r600_bytecode *bc, struct r600_bytecode_alu *alu_first, @@ -625,7 +402,8 @@ static int reserve_gpr(struct alu_bank_swizzle *bs, unsigned sel, unsigned chan, return 0; } -static int reserve_cfile(struct r600_bytecode *bc, struct alu_bank_swizzle *bs, unsigned sel, unsigned chan) +static int reserve_cfile(const struct r600_bytecode *bc, + struct alu_bank_swizzle *bs, unsigned sel, unsigned chan) { int res, num_res = 4; if (bc->chip_class >= R700) { @@ -647,7 +425,7 @@ static int reserve_cfile(struct r600_bytecode *bc, struct alu_bank_swizzle *bs, static int is_gpr(unsigned sel) { - return (sel >= 0 && sel <= 127); + return (sel <= 127); } /* CB constants start at 512, and get translated to a kcache index when ALU @@ -667,12 +445,12 @@ static int is_const(int sel) sel <= V_SQ_ALU_SRC_LITERAL); } -static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, +static int check_vector(const struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, struct alu_bank_swizzle *bs, int bank_swizzle) { int r, src, num_src, sel, elem, cycle; - num_src = r600_bytecode_get_num_operands(bc, alu); + num_src = r600_bytecode_get_num_operands(alu); for (src = 0; src < num_src; src++) { sel = alu->src[src].sel; elem = alu->src[src].chan; @@ -688,7 +466,7 @@ static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, return r; } } else if (is_cfile(sel)) { - r = reserve_cfile(bc, bs, sel, elem); + r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem); if (r) return r; } @@ -697,12 +475,12 @@ static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, return 0; } -static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, +static int check_scalar(const struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, struct alu_bank_swizzle *bs, int bank_swizzle) { int r, src, num_src, const_count, sel, elem, cycle; - num_src = r600_bytecode_get_num_operands(bc, alu); + num_src = r600_bytecode_get_num_operands(alu); for (const_count = 0, src = 0; src < num_src; ++src) { sel = alu->src[src].sel; elem = alu->src[src].chan; @@ -715,7 +493,7 @@ static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, const_count++; } if (is_cfile(sel)) { - r = reserve_cfile(bc, bs, sel, elem); + r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem); if (r) return r; } @@ -743,7 +521,7 @@ static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, return 0; } -static int check_and_set_bank_swizzle(struct r600_bytecode *bc, +static int check_and_set_bank_swizzle(const struct r600_bytecode *bc, struct r600_bytecode_alu *slots[5]) { struct alu_bank_swizzle bs; @@ -778,12 +556,6 @@ static int check_and_set_bank_swizzle(struct r600_bytecode *bc, bank_swizzle[4] = SQ_ALU_SCL_210; while(bank_swizzle[4] <= SQ_ALU_SCL_221) { - if (max_slots == 4) { - for (i = 0; i < max_slots; i++) { - if (bank_swizzle[i] == SQ_ALU_VEC_210) - return -1; - } - } init_bank_swizzle(&bs); if (scalar_only == false) { for (i = 0; i < 4; i++) { @@ -796,7 +568,7 @@ static int check_and_set_bank_swizzle(struct r600_bytecode *bc, } else r = 0; - if (!r && slots[4] && max_slots == 5) { + if (!r && max_slots == 5 && slots[4]) { r = check_scalar(bc, slots[4], &bs, bank_swizzle[4]); } if (!r) { @@ -815,8 +587,10 @@ static int check_and_set_bank_swizzle(struct r600_bytecode *bc, bank_swizzle[i]++; if (bank_swizzle[i] <= SQ_ALU_VEC_210) break; - else + else if (i < max_slots - 1) bank_swizzle[i] = SQ_ALU_VEC_012; + else + return -1; } } } @@ -839,10 +613,16 @@ static int replace_gpr_with_pv_ps(struct r600_bytecode *bc, return r; for (i = 0; i < max_slots; ++i) { - if (prev[i] && (prev[i]->dst.write || prev[i]->is_op3) && !prev[i]->dst.rel) { + if (prev[i] && alu_writes(prev[i]) && !prev[i]->dst.rel) { + + if (is_alu_64bit_inst(prev[i])) { + gpr[i] = -1; + continue; + } + gpr[i] = prev[i]->dst.sel; /* cube writes more than PV.X */ - if (!is_alu_cube_inst(bc, prev[i]) && is_alu_reduction_inst(bc, prev[i])) + if (is_alu_reduction_inst(bc, prev[i])) chan[i] = 0; else chan[i] = prev[i]->dst.chan; @@ -852,17 +632,20 @@ static int replace_gpr_with_pv_ps(struct r600_bytecode *bc, for (i = 0; i < max_slots; ++i) { struct r600_bytecode_alu *alu = slots[i]; - if(!alu) + if (!alu) continue; - num_src = r600_bytecode_get_num_operands(bc, alu); + if (is_alu_64bit_inst(alu)) + continue; + num_src = r600_bytecode_get_num_operands(alu); for (src = 0; src < num_src; ++src) { if (!is_gpr(alu->src[src].sel) || alu->src[src].rel) continue; if (bc->chip_class < CAYMAN) { if (alu->src[src].sel == gpr[4] && - alu->src[src].chan == chan[4]) { + alu->src[src].chan == chan[4] && + alu_prev->pred_sel == alu->pred_sel) { alu->src[src].sel = V_SQ_ALU_SRC_PS; alu->src[src].chan = 0; continue; @@ -871,7 +654,8 @@ static int replace_gpr_with_pv_ps(struct r600_bytecode *bc, for (j = 0; j < 4; ++j) { if (alu->src[src].sel == gpr[j] && - alu->src[src].chan == j) { + alu->src[src].chan == j && + alu_prev->pred_sel == alu->pred_sel) { alu->src[src].sel = V_SQ_ALU_SRC_PV; alu->src[src].chan = chan[j]; break; @@ -883,7 +667,7 @@ static int replace_gpr_with_pv_ps(struct r600_bytecode *bc, return 0; } -void r600_bytecode_special_constants(u32 value, unsigned *sel, unsigned *neg) +void r600_bytecode_special_constants(uint32_t value, unsigned *sel, unsigned *neg, unsigned abs) { switch(value) { case 0: @@ -903,11 +687,11 @@ void r600_bytecode_special_constants(u32 value, unsigned *sel, unsigned *neg) break; case 0xBF800000: /* -1.0f */ *sel = V_SQ_ALU_SRC_1; - *neg ^= 1; + *neg ^= !abs; break; case 0xBF000000: /* -0.5f */ *sel = V_SQ_ALU_SRC_0_5; - *neg ^= 1; + *neg ^= !abs; break; default: *sel = V_SQ_ALU_SRC_LITERAL; @@ -916,10 +700,10 @@ void r600_bytecode_special_constants(u32 value, unsigned *sel, unsigned *neg) } /* compute how many literal are needed */ -static int r600_bytecode_alu_nliterals(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, +static int r600_bytecode_alu_nliterals(struct r600_bytecode_alu *alu, uint32_t literal[4], unsigned *nliteral) { - unsigned num_src = r600_bytecode_get_num_operands(bc, alu); + unsigned num_src = r600_bytecode_get_num_operands(alu); unsigned i, j; for (i = 0; i < num_src; ++i) { @@ -942,11 +726,10 @@ static int r600_bytecode_alu_nliterals(struct r600_bytecode *bc, struct r600_byt return 0; } -static void r600_bytecode_alu_adjust_literals(struct r600_bytecode *bc, - struct r600_bytecode_alu *alu, - uint32_t literal[4], unsigned nliteral) +static void r600_bytecode_alu_adjust_literals(struct r600_bytecode_alu *alu, + uint32_t literal[4], unsigned nliteral) { - unsigned num_src = r600_bytecode_get_num_operands(bc, alu); + unsigned num_src = r600_bytecode_get_num_operands(alu); unsigned i, j; for (i = 0; i < num_src; ++i) { @@ -980,23 +763,51 @@ static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu if (r) return r; + for (i = 0; i < max_slots; ++i) { + if (prev[i]) { + if (prev[i]->pred_sel) + return 0; + if (is_alu_once_inst(prev[i])) + return 0; + } + if (slots[i]) { + if (slots[i]->pred_sel) + return 0; + if (is_alu_once_inst(slots[i])) + return 0; + } + } + for (i = 0; i < max_slots; ++i) { struct r600_bytecode_alu *alu; + if (num_once_inst > 0) + return 0; + /* check number of literals */ if (prev[i]) { - if (r600_bytecode_alu_nliterals(bc, prev[i], literal, &nliteral)) + if (r600_bytecode_alu_nliterals(prev[i], literal, &nliteral)) return 0; - if (r600_bytecode_alu_nliterals(bc, prev[i], prev_literal, &prev_nliteral)) + if (r600_bytecode_alu_nliterals(prev[i], prev_literal, &prev_nliteral)) return 0; - if (is_alu_mova_inst(bc, prev[i])) { + if (is_alu_mova_inst(prev[i])) { if (have_rel) return 0; have_mova = 1; } - num_once_inst += is_alu_once_inst(bc, prev[i]); + + if (alu_uses_rel(prev[i])) { + if (have_mova) { + return 0; + } + have_rel = 1; + } + if (alu_uses_lds(prev[i])) + return 0; + + num_once_inst += is_alu_once_inst(prev[i]); } - if (slots[i] && r600_bytecode_alu_nliterals(bc, slots[i], literal, &nliteral)) + if (slots[i] && r600_bytecode_alu_nliterals(slots[i], literal, &nliteral)) return 0; /* Let's check used slots. */ @@ -1006,13 +817,13 @@ static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu } else if (prev[i] && slots[i]) { if (max_slots == 5 && result[4] == NULL && prev[4] == NULL && slots[4] == NULL) { /* Trans unit is still free try to use it. */ - if (is_alu_any_unit_inst(bc, slots[i])) { + if (is_alu_any_unit_inst(bc, slots[i]) && !alu_uses_lds(slots[i])) { result[i] = prev[i]; result[4] = slots[i]; } else if (is_alu_any_unit_inst(bc, prev[i])) { if (slots[i]->dst.sel == prev[i]->dst.sel && - (slots[i]->dst.write == 1 || slots[i]->is_op3) && - (prev[i]->dst.write == 1 || prev[i]->is_op3)) + alu_writes(slots[i]) && + alu_writes(prev[i])) return 0; result[i] = slots[i]; @@ -1027,38 +838,48 @@ static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu if (max_slots == 5 && slots[i] && prev[4] && slots[i]->dst.sel == prev[4]->dst.sel && slots[i]->dst.chan == prev[4]->dst.chan && - (slots[i]->dst.write == 1 || slots[i]->is_op3) && - (prev[4]->dst.write == 1 || prev[4]->is_op3)) + alu_writes(slots[i]) && + alu_writes(prev[4])) return 0; result[i] = slots[i]; } alu = slots[i]; - num_once_inst += is_alu_once_inst(bc, alu); + num_once_inst += is_alu_once_inst(alu); + + /* don't reschedule NOPs */ + if (is_nop_inst(alu)) + return 0; + + if (is_alu_mova_inst(alu)) { + if (have_rel) { + return 0; + } + have_mova = 1; + } - /* Let's check dst gpr. */ - if (alu->dst.rel) { - if (have_mova) + if (alu_uses_rel(alu)) { + if (have_mova) { return 0; + } have_rel = 1; } + if (alu->op == ALU_OP0_SET_CF_IDX0 || + alu->op == ALU_OP0_SET_CF_IDX1) + return 0; /* data hazard with MOVA */ + /* Let's check source gprs */ - num_src = r600_bytecode_get_num_operands(bc, alu); + num_src = r600_bytecode_get_num_operands(alu); for (src = 0; src < num_src; ++src) { - if (alu->src[src].rel) { - if (have_mova) - return 0; - have_rel = 1; - } /* Constants don't matter. */ if (!is_gpr(alu->src[src].sel)) continue; for (j = 0; j < max_slots; ++j) { - if (!prev[j] || !(prev[j]->dst.write || prev[j]->is_op3)) + if (!prev[j] || !alu_writes(prev[j])) continue; /* If it's relative then we can't determin which gpr is really used. */ @@ -1111,117 +932,211 @@ static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu return 0; } -/* This code handles kcache lines as single blocks of 32 constants. We could - * probably do slightly better by recognizing that we actually have two - * consecutive lines of 16 constants, but the resulting code would also be - * somewhat more complicated. */ -static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, int type) +/* we'll keep kcache sets sorted by bank & addr */ +static int r600_bytecode_alloc_kcache_line(struct r600_bytecode *bc, + struct r600_bytecode_kcache *kcache, + unsigned bank, unsigned line, unsigned index_mode) { - struct r600_bytecode_kcache *kcache = bc->cf_last->kcache; - unsigned int required_lines; - unsigned int free_lines = 0; - unsigned int cache_line[3]; - unsigned int count = 0; - unsigned int i, j; - int r; + int i, kcache_banks = bc->chip_class >= EVERGREEN ? 4 : 2; - /* Collect required cache lines. */ - for (i = 0; i < 3; ++i) { - boolean found = false; - unsigned int line; + for (i = 0; i < kcache_banks; i++) { + if (kcache[i].mode) { + int d; - if (alu->src[i].sel < 512) - continue; + if (kcache[i].bank < bank) + continue; - line = ((alu->src[i].sel - 512) / 32) * 2; + if ((kcache[i].bank == bank && kcache[i].addr > line+1) || + kcache[i].bank > bank) { + /* try to insert new line */ + if (kcache[kcache_banks-1].mode) { + /* all sets are in use */ + return -ENOMEM; + } - for (j = 0; j < count; ++j) { - if (cache_line[j] == line) { - found = true; - break; + memmove(&kcache[i+1],&kcache[i], (kcache_banks-i-1)*sizeof(struct r600_bytecode_kcache)); + kcache[i].mode = V_SQ_CF_KCACHE_LOCK_1; + kcache[i].bank = bank; + kcache[i].addr = line; + kcache[i].index_mode = index_mode; + return 0; } - } - if (!found) - cache_line[count++] = line; + d = line - kcache[i].addr; + + if (d == -1) { + kcache[i].addr--; + if (kcache[i].mode == V_SQ_CF_KCACHE_LOCK_2) { + /* we are prepending the line to the current set, + * discarding the existing second line, + * so we'll have to insert line+2 after it */ + line += 2; + continue; + } else if (kcache[i].mode == V_SQ_CF_KCACHE_LOCK_1) { + kcache[i].mode = V_SQ_CF_KCACHE_LOCK_2; + return 0; + } else { + /* V_SQ_CF_KCACHE_LOCK_LOOP_INDEX is not supported */ + return -ENOMEM; + } + } else if (d == 1) { + kcache[i].mode = V_SQ_CF_KCACHE_LOCK_2; + return 0; + } else if (d == 0) + return 0; + } else { /* free kcache set - use it */ + kcache[i].mode = V_SQ_CF_KCACHE_LOCK_1; + kcache[i].bank = bank; + kcache[i].addr = line; + kcache[i].index_mode = index_mode; + return 0; + } } + return -ENOMEM; +} + +static int r600_bytecode_alloc_inst_kcache_lines(struct r600_bytecode *bc, + struct r600_bytecode_kcache *kcache, + struct r600_bytecode_alu *alu) +{ + int i, r; - /* This should never actually happen. */ - if (count >= 3) return -ENOMEM; + for (i = 0; i < 3; i++) { + unsigned bank, line, sel = alu->src[i].sel, index_mode; - for (i = 0; i < 2; ++i) { - if (kcache[i].mode == V_SQ_CF_KCACHE_NOP) { - ++free_lines; - } + if (sel < 512) + continue; + + bank = alu->src[i].kc_bank; + assert(bank < R600_MAX_HW_CONST_BUFFERS); + line = (sel-512)>>4; + index_mode = alu->src[i].kc_rel ? 1 : 0; // V_SQ_CF_INDEX_0 / V_SQ_CF_INDEX_NONE + + if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line, index_mode))) + return r; } + return 0; +} - /* Filter lines pulled in by previous intructions. Note that this is - * only for the required_lines count, we can't remove these from the - * cache_line array since we may have to start a new ALU clause. */ - for (i = 0, required_lines = count; i < count; ++i) { - for (j = 0; j < 2; ++j) { - if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 && - kcache[j].addr == cache_line[i]) { - --required_lines; - break; +static int r600_bytecode_assign_kcache_banks( + struct r600_bytecode_alu *alu, + struct r600_bytecode_kcache * kcache) +{ + int i, j; + + /* Alter the src operands to refer to the kcache. */ + for (i = 0; i < 3; ++i) { + static const unsigned int base[] = {128, 160, 256, 288}; + unsigned int line, sel = alu->src[i].sel, found = 0; + + if (sel < 512) + continue; + + sel -= 512; + line = sel>>4; + + for (j = 0; j < 4 && !found; ++j) { + switch (kcache[j].mode) { + case V_SQ_CF_KCACHE_NOP: + case V_SQ_CF_KCACHE_LOCK_LOOP_INDEX: + R600_ERR("unexpected kcache line mode\n"); + return -ENOMEM; + default: + if (kcache[j].bank == alu->src[i].kc_bank && + kcache[j].addr <= line && + line < kcache[j].addr + kcache[j].mode) { + alu->src[i].sel = sel - (kcache[j].addr<<4); + alu->src[i].sel += base[j]; + found=1; + } } } } + return 0; +} + +static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, + struct r600_bytecode_alu *alu, + unsigned type) +{ + struct r600_bytecode_kcache kcache_sets[4]; + struct r600_bytecode_kcache *kcache = kcache_sets; + int r; + + memcpy(kcache, bc->cf_last->kcache, 4 * sizeof(struct r600_bytecode_kcache)); - /* Start a new ALU clause if needed. */ - if (required_lines > free_lines) { + if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) { + /* can't alloc, need to start new clause */ if ((r = r600_bytecode_add_cf(bc))) { return r; } - bc->cf_last->inst = type; + bc->cf_last->op = type; + + /* retry with the new clause */ kcache = bc->cf_last->kcache; + if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) { + /* can't alloc again- should never happen */ + return r; + } + } else { + /* update kcache sets */ + memcpy(bc->cf_last->kcache, kcache, 4 * sizeof(struct r600_bytecode_kcache)); } - /* Setup the kcache lines. */ - for (i = 0; i < count; ++i) { - boolean found = false; + /* if we actually used more than 2 kcache sets, or have relative indexing - use ALU_EXTENDED on eg+ */ + if (kcache[2].mode != V_SQ_CF_KCACHE_NOP || + kcache[0].index_mode || kcache[1].index_mode || kcache[2].index_mode || kcache[3].index_mode) { + if (bc->chip_class < EVERGREEN) + return -ENOMEM; + bc->cf_last->eg_alu_extended = 1; + } - for (j = 0; j < 2; ++j) { - if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 && - kcache[j].addr == cache_line[i]) { - found = true; - break; - } - } + return 0; +} - if (found) continue; +static int insert_nop_r6xx(struct r600_bytecode *bc) +{ + struct r600_bytecode_alu alu; + int r, i; - for (j = 0; j < 2; ++j) { - if (kcache[j].mode == V_SQ_CF_KCACHE_NOP) { - kcache[j].bank = 0; - kcache[j].addr = cache_line[i]; - kcache[j].mode = V_SQ_CF_KCACHE_LOCK_2; - break; - } - } + for (i = 0; i < 4; i++) { + memset(&alu, 0, sizeof(alu)); + alu.op = ALU_OP0_NOP; + alu.src[0].chan = i; + alu.dst.chan = i; + alu.last = (i == 3); + r = r600_bytecode_add_alu(bc, &alu); + if (r) + return r; } + return 0; +} - /* Alter the src operands to refer to the kcache. */ - for (i = 0; i < 3; ++i) { - static const unsigned int base[] = {128, 160, 256, 288}; - unsigned int line; +/* load AR register from gpr (bc->ar_reg) with MOVA_INT */ +static int load_ar_r6xx(struct r600_bytecode *bc) +{ + struct r600_bytecode_alu alu; + int r; - if (alu->src[i].sel < 512) - continue; + if (bc->ar_loaded) + return 0; - alu->src[i].sel -= 512; - line = (alu->src[i].sel / 32) * 2; + /* hack to avoid making MOVA the last instruction in the clause */ + if ((bc->cf_last->ndw>>1) >= 110) + bc->force_add_cf = 1; - for (j = 0; j < 2; ++j) { - if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 && - kcache[j].addr == line) { - alu->src[i].sel &= 0x1f; - alu->src[i].sel += base[j]; - break; - } - } - } + memset(&alu, 0, sizeof(alu)); + alu.op = ALU_OP1_MOVA_GPR_INT; + alu.src[0].sel = bc->ar_reg; + alu.src[0].chan = bc->ar_chan; + alu.last = 1; + alu.index_mode = INDEX_MODE_LOOP; + r = r600_bytecode_add_alu(bc, &alu); + if (r) + return r; + /* no requirement to set uses waterfall on MOVA_GPR_INT */ + bc->ar_loaded = 1; return 0; } @@ -1231,6 +1146,9 @@ static int load_ar(struct r600_bytecode *bc) struct r600_bytecode_alu alu; int r; + if (bc->ar_handling) + return load_ar_r6xx(bc); + if (bc->ar_loaded) return 0; @@ -1239,8 +1157,9 @@ static int load_ar(struct r600_bytecode *bc) bc->force_add_cf = 1; memset(&alu, 0, sizeof(alu)); - alu.inst = BC_INST(bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT); + alu.op = ALU_OP1_MOVA_INT; alu.src[0].sel = bc->ar_reg; + alu.src[0].chan = bc->ar_chan; alu.last = 1; r = r600_bytecode_add_alu(bc, &alu); if (r) @@ -1251,22 +1170,28 @@ static int load_ar(struct r600_bytecode *bc) return 0; } -int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type) +int r600_bytecode_add_alu_type(struct r600_bytecode *bc, + const struct r600_bytecode_alu *alu, unsigned type) { struct r600_bytecode_alu *nalu = r600_bytecode_alu(); struct r600_bytecode_alu *lalu; int i, r; - if (nalu == NULL) + if (!nalu) return -ENOMEM; memcpy(nalu, alu, sizeof(struct r600_bytecode_alu)); - if (bc->cf_last != NULL && bc->cf_last->inst != type) { + if (alu->is_op3) { + /* will fail later since alu does not support it. */ + assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs); + } + + if (bc->cf_last != NULL && bc->cf_last->op != type) { /* check if we could add it anyway */ - if (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU) && - type == BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE)) { + if (bc->cf_last->op == CF_OP_ALU && + type == CF_OP_ALU_PUSH_BEFORE) { LIST_FOR_EACH_ENTRY(lalu, &bc->cf_last->alu, list) { - if (lalu->predicate) { + if (lalu->execute_mask) { bc->force_add_cf = 1; break; } @@ -1283,7 +1208,14 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec return r; } } - bc->cf_last->inst = type; + bc->cf_last->op = type; + + /* Load index register if required */ + if (bc->chip_class >= EVERGREEN) { + for (i = 0; i < 3; i++) + if (nalu->src[i].kc_bank && nalu->src[i].kc_rel) + egcm_load_index_reg(bc, 0, true); + } /* Check AR usage and load it if required */ for (i = 0; i < 3; i++) @@ -1310,7 +1242,7 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec } if (nalu->src[i].sel == V_SQ_ALU_SRC_LITERAL) r600_bytecode_special_constants(nalu->src[i].value, - &nalu->src[i].sel, &nalu->src[i].neg); + &nalu->src[i].sel, &nalu->src[i].neg, nalu->src[i].abs); } if (nalu->dst.sel >= bc->ngpr) { bc->ngpr = nalu->dst.sel + 1; @@ -1348,7 +1280,7 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec for (i = 0, nliteral = 0; i < max_slots; i++) { if (slots[i]) { - r = r600_bytecode_alu_nliterals(bc, slots[i], literal, &nliteral); + r = r600_bytecode_alu_nliterals(slots[i], literal, &nliteral); if (r) return r; } @@ -1365,12 +1297,16 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec bc->cf_last->prev_bs_head = bc->cf_last->curr_bs_head; bc->cf_last->curr_bs_head = NULL; } + + if (nalu->dst.rel && bc->r6xx_nop_after_rel_dst) + insert_nop_r6xx(bc); + return 0; } int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu) { - return r600_bytecode_add_alu_type(bc, alu, BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU)); + return r600_bytecode_add_alu_type(bc, alu, CF_OP_ALU); } static unsigned r600_bytecode_num_tex_and_vtx_instructions(const struct r600_bytecode *bc) @@ -1392,31 +1328,29 @@ static unsigned r600_bytecode_num_tex_and_vtx_instructions(const struct r600_byt static inline boolean last_inst_was_not_vtx_fetch(struct r600_bytecode *bc) { - switch (bc->chip_class) { - case R700: - case R600: - return bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX && - bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC; - case EVERGREEN: - return bc->cf_last->inst != EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX; - case CAYMAN: - return bc->cf_last->inst != CM_V_SQ_CF_WORD1_SQ_CF_INST_TC; - default: - R600_ERR("Unknown chip class %d.\n", bc->chip_class); - return FALSE; - } + return !((r600_isa_cf(bc->cf_last->op)->flags & CF_FETCH) && + bc->cf_last->op != CF_OP_GDS && + (bc->chip_class == CAYMAN || + bc->cf_last->op != CF_OP_TEX)); } -int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx) +static int r600_bytecode_add_vtx_internal(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx, + bool use_tc) { struct r600_bytecode_vtx *nvtx = r600_bytecode_vtx(); int r; - if (nvtx == NULL) + if (!nvtx) return -ENOMEM; memcpy(nvtx, vtx, sizeof(struct r600_bytecode_vtx)); - /* cf can contains only alu or only vtx or only tex */ + /* Load index register if required */ + if (bc->chip_class >= EVERGREEN) { + if (vtx->buffer_index_mode) + egcm_load_index_reg(bc, vtx->buffer_index_mode - 1, false); + } + + /* cf can contains only alu or only vtx or only tex */ if (bc->cf_last == NULL || last_inst_was_not_vtx_fetch(bc) || bc->force_add_cf) { @@ -1428,16 +1362,20 @@ int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_v switch (bc->chip_class) { case R600: case R700: - bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_VTX; + bc->cf_last->op = CF_OP_VTX; break; case EVERGREEN: - bc->cf_last->inst = EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX; + if (use_tc) + bc->cf_last->op = CF_OP_TEX; + else + bc->cf_last->op = CF_OP_VTX; break; case CAYMAN: - bc->cf_last->inst = CM_V_SQ_CF_WORD1_SQ_CF_INST_TC; + bc->cf_last->op = CF_OP_TEX; break; default: R600_ERR("Unknown chip class %d.\n", bc->chip_class); + free(nvtx); return -EINVAL; } } @@ -1447,21 +1385,41 @@ int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_v bc->ndw += 4; if ((bc->cf_last->ndw / 4) >= r600_bytecode_num_tex_and_vtx_instructions(bc)) bc->force_add_cf = 1; + + bc->ngpr = MAX2(bc->ngpr, vtx->src_gpr + 1); + bc->ngpr = MAX2(bc->ngpr, vtx->dst_gpr + 1); + return 0; } +int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx) +{ + return r600_bytecode_add_vtx_internal(bc, vtx, false); +} + +int r600_bytecode_add_vtx_tc(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx) +{ + return r600_bytecode_add_vtx_internal(bc, vtx, true); +} + int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex) { struct r600_bytecode_tex *ntex = r600_bytecode_tex(); int r; - if (ntex == NULL) + if (!ntex) return -ENOMEM; memcpy(ntex, tex, sizeof(struct r600_bytecode_tex)); + /* Load index register if required */ + if (bc->chip_class >= EVERGREEN) { + if (tex->sampler_index_mode || tex->resource_index_mode) + egcm_load_index_reg(bc, 1, false); + } + /* we can't fetch data und use it as texture lookup address in the same TEX clause */ if (bc->cf_last != NULL && - bc->cf_last->inst == BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX)) { + bc->cf_last->op == CF_OP_TEX) { struct r600_bytecode_tex *ttex; LIST_FOR_EACH_ENTRY(ttex, &bc->cf_last->tex, list) { if (ttex->dst_gpr == ntex->src_gpr) { @@ -1470,20 +1428,20 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t } } /* slight hack to make gradients always go into same cf */ - if (ntex->inst == SQ_TEX_INST_SET_GRADIENTS_H) + if (ntex->op == FETCH_OP_SET_GRADIENTS_H) bc->force_add_cf = 1; } /* cf can contains only alu or only vtx or only tex */ if (bc->cf_last == NULL || - bc->cf_last->inst != BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX) || + bc->cf_last->op != CF_OP_TEX || bc->force_add_cf) { r = r600_bytecode_add_cf(bc); if (r) { free(ntex); return r; } - bc->cf_last->inst = BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX); + bc->cf_last->op = CF_OP_TEX; } if (ntex->src_gpr >= bc->ngpr) { bc->ngpr = ntex->src_gpr + 1; @@ -1500,7 +1458,39 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t return 0; } -int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst) +int r600_bytecode_add_gds(struct r600_bytecode *bc, const struct r600_bytecode_gds *gds) +{ + struct r600_bytecode_gds *ngds = r600_bytecode_gds(); + int r; + + if (ngds == NULL) + return -ENOMEM; + memcpy(ngds, gds, sizeof(struct r600_bytecode_gds)); + + if (bc->chip_class >= EVERGREEN) { + if (gds->uav_index_mode) + egcm_load_index_reg(bc, gds->uav_index_mode - 1, false); + } + + if (bc->cf_last == NULL || + bc->cf_last->op != CF_OP_GDS || + bc->force_add_cf) { + r = r600_bytecode_add_cf(bc); + if (r) { + free(ngds); + return r; + } + bc->cf_last->op = CF_OP_GDS; + } + + LIST_ADDTAIL(&ngds->list, &bc->cf_last->gds); + bc->cf_last->ndw += 4; /* each GDS uses 4 dwords */ + if ((bc->cf_last->ndw / 4) >= r600_bytecode_num_tex_and_vtx_instructions(bc)) + bc->force_add_cf = 1; + return 0; +} + +int r600_bytecode_add_cfinst(struct r600_bytecode *bc, unsigned op) { int r; r = r600_bytecode_add_cf(bc); @@ -1508,19 +1498,20 @@ int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst) return r; bc->cf_last->cond = V_SQ_CF_COND_ACTIVE; - bc->cf_last->inst = inst; + bc->cf_last->op = op; return 0; } int cm_bytecode_add_cf_end(struct r600_bytecode *bc) { - return r600_bytecode_add_cfinst(bc, CM_V_SQ_CF_WORD1_SQ_CF_INST_END); + return r600_bytecode_add_cfinst(bc, CF_OP_CF_END); } /* common to all 3 families */ static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct r600_bytecode_vtx *vtx, unsigned id) { - bc->bytecode[id] = S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) | + bc->bytecode[id] = S_SQ_VTX_WORD0_VTX_INST(vtx->op) | + S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) | S_SQ_VTX_WORD0_FETCH_TYPE(vtx->fetch_type) | S_SQ_VTX_WORD0_SRC_GPR(vtx->src_gpr) | S_SQ_VTX_WORD0_SRC_SEL_X(vtx->src_sel_x); @@ -1539,6 +1530,8 @@ static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct r600_bytecod S_SQ_VTX_WORD1_GPR_DST_GPR(vtx->dst_gpr); bc->bytecode[id] = S_SQ_VTX_WORD2_OFFSET(vtx->offset)| S_SQ_VTX_WORD2_ENDIAN_SWAP(vtx->endian); + if (bc->chip_class >= EVERGREEN) + bc->bytecode[id] |= ((vtx->buffer_index_mode & 0x3) << 21); // S_SQ_VTX_WORD2_BIM(vtx->buffer_index_mode); if (bc->chip_class < CAYMAN) bc->bytecode[id] |= S_SQ_VTX_WORD2_MEGA_FETCH(1); id++; @@ -1549,10 +1542,16 @@ static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct r600_bytecod /* common to all 3 families */ static int r600_bytecode_tex_build(struct r600_bytecode *bc, struct r600_bytecode_tex *tex, unsigned id) { - bc->bytecode[id++] = S_SQ_TEX_WORD0_TEX_INST(tex->inst) | + bc->bytecode[id] = S_SQ_TEX_WORD0_TEX_INST( + r600_isa_fetch_opcode(bc->isa->hw_class, tex->op)) | + EG_S_SQ_TEX_WORD0_INST_MOD(tex->inst_mod) | S_SQ_TEX_WORD0_RESOURCE_ID(tex->resource_id) | S_SQ_TEX_WORD0_SRC_GPR(tex->src_gpr) | S_SQ_TEX_WORD0_SRC_REL(tex->src_rel); + if (bc->chip_class >= EVERGREEN) + bc->bytecode[id] |= ((tex->sampler_index_mode & 0x3) << 27) | // S_SQ_TEX_WORD0_SIM(tex->sampler_index_mode); + ((tex->resource_index_mode & 0x3) << 25); // S_SQ_TEX_WORD0_RIM(tex->resource_index_mode) + id++; bc->bytecode[id++] = S_SQ_TEX_WORD1_DST_GPR(tex->dst_gpr) | S_SQ_TEX_WORD1_DST_REL(tex->dst_rel) | S_SQ_TEX_WORD1_DST_SEL_X(tex->dst_sel_x) | @@ -1579,6 +1578,8 @@ static int r600_bytecode_tex_build(struct r600_bytecode *bc, struct r600_bytecod /* r600 only, r700/eg bits in r700_asm.c */ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id) { + unsigned opcode = r600_isa_alu_opcode(bc->isa->hw_class, alu->op); + /* don't replace gpr by pv or ps for destination register */ bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) | S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) | @@ -1588,9 +1589,12 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) | S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) | S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) | + S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) | + S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | S_SQ_ALU_WORD0_LAST(alu->last); if (alu->is_op3) { + assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs); bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) | S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) | S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) | @@ -1599,7 +1603,7 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) | S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) | S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) | - S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) | + S_SQ_ALU_WORD1_OP3_ALU_INST(opcode) | S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle); } else { bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) | @@ -1610,10 +1614,10 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) | S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) | S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) | - S_SQ_ALU_WORD1_OP2_ALU_INST(alu->inst) | + S_SQ_ALU_WORD1_OP2_ALU_INST(opcode) | S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) | - S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->predicate) | - S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->predicate); + S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->execute_mask) | + S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->update_pred); } return 0; } @@ -1621,76 +1625,74 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod static void r600_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_cf *cf) { *bytecode++ = S_SQ_CF_WORD0_ADDR(cf->addr >> 1); - *bytecode++ = cf->inst | + *bytecode++ = S_SQ_CF_WORD1_CF_INST(r600_isa_cf_opcode(ISA_CC_R600, cf->op)) | S_SQ_CF_WORD1_BARRIER(1) | - S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1); + S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1)| + S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program); } /* common for r600/r700 - eg in eg_asm.c */ static int r600_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf) { unsigned id = cf->id; + const struct cf_op_info *cfop = r600_isa_cf(cf->op); + unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op); + - switch (cf->inst) { - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: + if (cf->op == CF_NATIVE) { + bc->bytecode[id++] = cf->isa[0]; + bc->bytecode[id++] = cf->isa[1]; + } else if (cfop->flags & CF_ALU) { bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) | S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) | S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) | S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank); - bc->bytecode[id++] = cf->inst | + bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(opcode) | S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) | S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) | S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) | S_SQ_CF_ALU_WORD1_BARRIER(1) | S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chip_class == R600 ? cf->r6xx_uses_waterfall : 0) | S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1); - break; - case V_SQ_CF_WORD1_SQ_CF_INST_TEX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC: + } else if (cfop->flags & CF_FETCH) { if (bc->chip_class == R700) r700_bytecode_cf_vtx_build(&bc->bytecode[id], cf); else r600_bytecode_cf_vtx_build(&bc->bytecode[id], cf); - break; - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: + } else if (cfop->flags & CF_EXP) { bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) | S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) | S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) | - S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type); + S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) | + S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr); bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) | S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) | S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) | S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) | S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) | - S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) | - cf->output.inst | - S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program); - break; - case V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case V_SQ_CF_WORD1_SQ_CF_INST_POP: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case V_SQ_CF_WORD1_SQ_CF_INST_RETURN: + S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) | + S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) | + S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program); + } else if (cfop->flags & CF_MEM) { + bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) | + S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) | + S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) | + S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) | + S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr); + bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) | + S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) | + S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) | + S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program) | + S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size) | + S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask); + } else { bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1); - bc->bytecode[id++] = cf->inst | + bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(opcode) | S_SQ_CF_WORD1_BARRIER(1) | S_SQ_CF_WORD1_COND(cf->cond) | - S_SQ_CF_WORD1_POP_COUNT(cf->pop_count); - - break; - default: - R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst); - return -EINVAL; + S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) | + S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program); } return 0; } @@ -1701,241 +1703,110 @@ int r600_bytecode_build(struct r600_bytecode *bc) struct r600_bytecode_alu *alu; struct r600_bytecode_vtx *vtx; struct r600_bytecode_tex *tex; + struct r600_bytecode_gds *gds; uint32_t literal[4]; unsigned nliteral; unsigned addr; int i, r; - if (bc->callstack[0].max > 0) - bc->nstack = ((bc->callstack[0].max + 3) >> 2) + 2; - if (bc->type == TGSI_PROCESSOR_VERTEX && !bc->nstack) { - bc->nstack = 1; + if (!bc->nstack) { // If not 0, Stack_size already provided by llvm + if (bc->stack.max_entries) + bc->nstack = bc->stack.max_entries; + else if (bc->type == PIPE_SHADER_VERTEX || + bc->type == PIPE_SHADER_TESS_EVAL || + bc->type == PIPE_SHADER_TESS_CTRL) + bc->nstack = 1; } /* first path compute addr of each CF block */ /* addr start after all the CF instructions */ addr = bc->cf_last->id + 2; LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) { - if (bc->chip_class >= EVERGREEN) { - switch (cf->inst) { - case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX: - /* fetch node need to be 16 bytes aligned*/ - addr += 3; - addr &= 0xFFFFFFFCUL; - break; - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN: - case CM_V_SQ_CF_WORD1_SQ_CF_INST_END: - break; - default: - R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst); - return -EINVAL; - } - } else { - switch (cf->inst) { - case V_SQ_CF_WORD1_SQ_CF_INST_TEX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC: - /* fetch node need to be 16 bytes aligned*/ - addr += 3; - addr &= 0xFFFFFFFCUL; - break; - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: - case V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case V_SQ_CF_WORD1_SQ_CF_INST_POP: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case V_SQ_CF_WORD1_SQ_CF_INST_RETURN: - break; - default: - R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst); - return -EINVAL; - } + if (r600_isa_cf(cf->op)->flags & CF_FETCH) { + addr += 3; + addr &= 0xFFFFFFFCUL; } cf->addr = addr; addr += cf->ndw; bc->ndw = cf->addr + cf->ndw; } free(bc->bytecode); - bc->bytecode = calloc(1, bc->ndw * 4); + bc->bytecode = calloc(4, bc->ndw); if (bc->bytecode == NULL) return -ENOMEM; LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) { + const struct cf_op_info *cfop = r600_isa_cf(cf->op); addr = cf->addr; - if (bc->chip_class >= EVERGREEN) { + if (bc->chip_class >= EVERGREEN) r = eg_bytecode_cf_build(bc, cf); - if (r) - return r; + else + r = r600_bytecode_cf_build(bc, cf); + if (r) + return r; + if (cfop->flags & CF_ALU) { + nliteral = 0; + memset(literal, 0, sizeof(literal)); + LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) { + r = r600_bytecode_alu_nliterals(alu, literal, &nliteral); + if (r) + return r; + r600_bytecode_alu_adjust_literals(alu, literal, nliteral); + r600_bytecode_assign_kcache_banks(alu, cf->kcache); - switch (cf->inst) { - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - nliteral = 0; - memset(literal, 0, sizeof(literal)); - LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) { - r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral); - if (r) - return r; - r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral); - switch(bc->chip_class) { - case EVERGREEN: /* eg alu is same encoding as r700 */ - case CAYMAN: - r = r700_bytecode_alu_build(bc, alu, addr); - break; - default: - R600_ERR("unknown chip class %d.\n", bc->chip_class); - return -EINVAL; - } - if (r) - return r; - addr += 2; - if (alu->last) { - for (i = 0; i < align(nliteral, 2); ++i) { - bc->bytecode[addr++] = literal[i]; - } - nliteral = 0; - memset(literal, 0, sizeof(literal)); - } - } - break; - case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX: - LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) { - r = r600_bytecode_vtx_build(bc, vtx, addr); - if (r) - return r; - addr += 4; + switch(bc->chip_class) { + case R600: + r = r600_bytecode_alu_build(bc, alu, addr); + break; + case R700: + r = r700_bytecode_alu_build(bc, alu, addr); + break; + case EVERGREEN: + case CAYMAN: + r = eg_bytecode_alu_build(bc, alu, addr); + break; + default: + R600_ERR("unknown chip class %d.\n", bc->chip_class); + return -EINVAL; } - break; - case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX: - if (bc->chip_class == CAYMAN) { - LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) { - r = r600_bytecode_vtx_build(bc, vtx, addr); - if (r) - return r; - addr += 4; + if (r) + return r; + addr += 2; + if (alu->last) { + for (i = 0; i < align(nliteral, 2); ++i) { + bc->bytecode[addr++] = literal[i]; } + nliteral = 0; + memset(literal, 0, sizeof(literal)); } - LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) { - r = r600_bytecode_tex_build(bc, tex, addr); - if (r) - return r; - addr += 4; - } - break; - case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN: - case CM_V_SQ_CF_WORD1_SQ_CF_INST_END: - break; - default: - R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst); - return -EINVAL; } - } else { - r = r600_bytecode_cf_build(bc, cf); - if (r) - return r; - - switch (cf->inst) { - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - nliteral = 0; - memset(literal, 0, sizeof(literal)); - LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) { - r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral); - if (r) - return r; - r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral); - switch(bc->chip_class) { - case R600: - r = r600_bytecode_alu_build(bc, alu, addr); - break; - case R700: - r = r700_bytecode_alu_build(bc, alu, addr); - break; - default: - R600_ERR("unknown chip class %d.\n", bc->chip_class); - return -EINVAL; - } - if (r) - return r; - addr += 2; - if (alu->last) { - for (i = 0; i < align(nliteral, 2); ++i) { - bc->bytecode[addr++] = literal[i]; - } - nliteral = 0; - memset(literal, 0, sizeof(literal)); - } - } - break; - case V_SQ_CF_WORD1_SQ_CF_INST_VTX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC: - LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) { - r = r600_bytecode_vtx_build(bc, vtx, addr); - if (r) - return r; - addr += 4; - } - break; - case V_SQ_CF_WORD1_SQ_CF_INST_TEX: - LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) { - r = r600_bytecode_tex_build(bc, tex, addr); - if (r) - return r; - addr += 4; - } - break; - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case V_SQ_CF_WORD1_SQ_CF_INST_POP: - case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case V_SQ_CF_WORD1_SQ_CF_INST_RETURN: - break; - default: - R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst); - return -EINVAL; + } else if (cf->op == CF_OP_VTX) { + LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) { + r = r600_bytecode_vtx_build(bc, vtx, addr); + if (r) + return r; + addr += 4; + } + } else if (cf->op == CF_OP_GDS) { + assert(bc->chip_class >= EVERGREEN); + LIST_FOR_EACH_ENTRY(gds, &cf->gds, list) { + r = eg_bytecode_gds_build(bc, gds, addr); + if (r) + return r; + addr += 4; + } + } else if (cf->op == CF_OP_TEX) { + LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) { + assert(bc->chip_class >= EVERGREEN); + r = r600_bytecode_vtx_build(bc, vtx, addr); + if (r) + return r; + addr += 4; + } + LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) { + r = r600_bytecode_tex_build(bc, tex, addr); + if (r) + return r; + addr += 4; } } } @@ -1953,6 +1824,7 @@ void r600_bytecode_clear(struct r600_bytecode *bc) struct r600_bytecode_alu *alu = NULL, *next_alu; struct r600_bytecode_tex *tex = NULL, *next_tex; struct r600_bytecode_tex *vtx = NULL, *next_vtx; + struct r600_bytecode_gds *gds = NULL, *next_gds; LIST_FOR_EACH_ENTRY_SAFE(alu, next_alu, &cf->alu, list) { free(alu); @@ -1972,20 +1844,207 @@ void r600_bytecode_clear(struct r600_bytecode *bc) LIST_INITHEAD(&cf->vtx); + LIST_FOR_EACH_ENTRY_SAFE(gds, next_gds, &cf->gds, list) { + free(gds); + } + + LIST_INITHEAD(&cf->gds); + free(cf); } LIST_INITHEAD(&cf->list); } -void r600_bytecode_dump(struct r600_bytecode *bc) +static int print_swizzle(unsigned swz) +{ + const char * swzchars = "xyzw01?_"; + assert(swz<8 && swz != 6); + return fprintf(stderr, "%c", swzchars[swz]); +} + +static int print_sel(unsigned sel, unsigned rel, unsigned index_mode, + unsigned need_brackets) +{ + int o = 0; + if (rel && index_mode >= 5 && sel < 128) + o += fprintf(stderr, "G"); + if (rel || need_brackets) { + o += fprintf(stderr, "["); + } + o += fprintf(stderr, "%d", sel); + if (rel) { + if (index_mode == 0 || index_mode == 6) + o += fprintf(stderr, "+AR"); + else if (index_mode == 4) + o += fprintf(stderr, "+AL"); + } + if (rel || need_brackets) { + o += fprintf(stderr, "]"); + } + return o; +} + +static int print_dst(struct r600_bytecode_alu *alu) { + int o = 0; + unsigned sel = alu->dst.sel; + char reg_char = 'R'; + if (sel > 128 - 4) { /* clause temporary gpr */ + sel -= 128 - 4; + reg_char = 'T'; + } + + if (alu_writes(alu)) { + o += fprintf(stderr, "%c", reg_char); + o += print_sel(alu->dst.sel, alu->dst.rel, alu->index_mode, 0); + } else { + o += fprintf(stderr, "__"); + } + o += fprintf(stderr, "."); + o += print_swizzle(alu->dst.chan); + return o; +} + +static int print_src(struct r600_bytecode_alu *alu, unsigned idx) +{ + int o = 0; + struct r600_bytecode_alu_src *src = &alu->src[idx]; + unsigned sel = src->sel, need_sel = 1, need_chan = 1, need_brackets = 0; + + if (src->neg) + o += fprintf(stderr,"-"); + if (src->abs) + o += fprintf(stderr,"|"); + + if (sel < 128 - 4) { + o += fprintf(stderr, "R"); + } else if (sel < 128) { + o += fprintf(stderr, "T"); + sel -= 128 - 4; + } else if (sel < 160) { + o += fprintf(stderr, "KC0"); + need_brackets = 1; + sel -= 128; + } else if (sel < 192) { + o += fprintf(stderr, "KC1"); + need_brackets = 1; + sel -= 160; + } else if (sel >= 512) { + o += fprintf(stderr, "C%d", src->kc_bank); + need_brackets = 1; + sel -= 512; + } else if (sel >= 448) { + o += fprintf(stderr, "Param"); + sel -= 448; + need_chan = 0; + } else if (sel >= 288) { + o += fprintf(stderr, "KC3"); + need_brackets = 1; + sel -= 288; + } else if (sel >= 256) { + o += fprintf(stderr, "KC2"); + need_brackets = 1; + sel -= 256; + } else { + need_sel = 0; + need_chan = 0; + switch (sel) { + case EG_V_SQ_ALU_SRC_LDS_DIRECT_A: + o += fprintf(stderr, "LDS_A[0x%08X]", src->value); + break; + case EG_V_SQ_ALU_SRC_LDS_DIRECT_B: + o += fprintf(stderr, "LDS_B[0x%08X]", src->value); + break; + case EG_V_SQ_ALU_SRC_LDS_OQ_A: + o += fprintf(stderr, "LDS_OQ_A"); + need_chan = 1; + break; + case EG_V_SQ_ALU_SRC_LDS_OQ_B: + o += fprintf(stderr, "LDS_OQ_B"); + need_chan = 1; + break; + case EG_V_SQ_ALU_SRC_LDS_OQ_A_POP: + o += fprintf(stderr, "LDS_OQ_A_POP"); + need_chan = 1; + break; + case EG_V_SQ_ALU_SRC_LDS_OQ_B_POP: + o += fprintf(stderr, "LDS_OQ_B_POP"); + need_chan = 1; + break; + case EG_V_SQ_ALU_SRC_SE_ID: + o += fprintf(stderr, "SE_ID"); + break; + case EG_V_SQ_ALU_SRC_SIMD_ID: + o += fprintf(stderr, "SIMD_ID"); + break; + case EG_V_SQ_ALU_SRC_HW_WAVE_ID: + o += fprintf(stderr, "HW_WAVE_ID"); + break; + case V_SQ_ALU_SRC_PS: + o += fprintf(stderr, "PS"); + break; + case V_SQ_ALU_SRC_PV: + o += fprintf(stderr, "PV"); + need_chan = 1; + break; + case V_SQ_ALU_SRC_LITERAL: + o += fprintf(stderr, "[0x%08X %f]", src->value, u_bitcast_u2f(src->value)); + break; + case V_SQ_ALU_SRC_0_5: + o += fprintf(stderr, "0.5"); + break; + case V_SQ_ALU_SRC_M_1_INT: + o += fprintf(stderr, "-1"); + break; + case V_SQ_ALU_SRC_1_INT: + o += fprintf(stderr, "1"); + break; + case V_SQ_ALU_SRC_1: + o += fprintf(stderr, "1.0"); + break; + case V_SQ_ALU_SRC_0: + o += fprintf(stderr, "0"); + break; + default: + o += fprintf(stderr, "??IMM_%d", sel); + break; + } + } + + if (need_sel) + o += print_sel(sel, src->rel, alu->index_mode, need_brackets); + + if (need_chan) { + o += fprintf(stderr, "."); + o += print_swizzle(src->chan); + } + + if (src->abs) + o += fprintf(stderr,"|"); + + return o; +} + +static int print_indent(int p, int c) +{ + int o = 0; + while (p++ < c) + o += fprintf(stderr, " "); + return o; +} + +void r600_bytecode_disasm(struct r600_bytecode *bc) +{ + const char *index_mode[] = {"CF_INDEX_NONE", "CF_INDEX_0", "CF_INDEX_1"}; + static int index = 0; struct r600_bytecode_cf *cf = NULL; struct r600_bytecode_alu *alu = NULL; struct r600_bytecode_vtx *vtx = NULL; struct r600_bytecode_tex *tex = NULL; + struct r600_bytecode_gds *gds = NULL; - unsigned i, id; + unsigned i, id, ngr = 0, last; uint32_t literal[4]; unsigned nliteral; char chip = '6'; @@ -2005,269 +2064,322 @@ void r600_bytecode_dump(struct r600_bytecode *bc) chip = '6'; break; } - fprintf(stderr, "bytecode %d dw -- %d gprs ---------------------\n", bc->ndw, bc->ngpr); - fprintf(stderr, " %c\n", chip); + fprintf(stderr, "bytecode %d dw -- %d gprs -- %d nstack -------------\n", + bc->ndw, bc->ngpr, bc->nstack); + fprintf(stderr, "shader %d -- %c\n", index++, chip); LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) { id = cf->id; - - if (bc->chip_class >= EVERGREEN) { - switch (cf->inst) { - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: - case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]); - fprintf(stderr, "ADDR:%d ", cf->addr); - fprintf(stderr, "KCACHE_MODE0:%X ", cf->kcache[0].mode); - fprintf(stderr, "KCACHE_BANK0:%X ", cf->kcache[0].bank); - fprintf(stderr, "KCACHE_BANK1:%X\n", cf->kcache[1].bank); - id++; - fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_ALU_WORD1_CF_INST(cf->inst)); - fprintf(stderr, "KCACHE_MODE1:%X ", cf->kcache[1].mode); - fprintf(stderr, "KCACHE_ADDR0:%X ", cf->kcache[0].addr); - fprintf(stderr, "KCACHE_ADDR1:%X ", cf->kcache[1].addr); - fprintf(stderr, "COUNT:%d\n", cf->ndw / 2); - break; - case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX: - fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]); - fprintf(stderr, "ADDR:%d\n", cf->addr); - id++; - fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_WORD1_CF_INST(cf->inst)); - fprintf(stderr, "COUNT:%d\n", cf->ndw / 4); - break; - case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: - fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]); - fprintf(stderr, "GPR:%X ", cf->output.gpr); - fprintf(stderr, "ELEM_SIZE:%X ", cf->output.elem_size); - fprintf(stderr, "ARRAY_BASE:%X ", cf->output.array_base); - fprintf(stderr, "TYPE:%X\n", cf->output.type); - id++; - fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]); - fprintf(stderr, "SWIZ_X:%X ", cf->output.swizzle_x); - fprintf(stderr, "SWIZ_Y:%X ", cf->output.swizzle_y); - fprintf(stderr, "SWIZ_Z:%X ", cf->output.swizzle_z); - fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w); - fprintf(stderr, "BARRIER:%X ", cf->output.barrier); - fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst)); - fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count); - fprintf(stderr, "EOP:%X\n", cf->output.end_of_program); - break; - case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN: - case CM_V_SQ_CF_WORD1_SQ_CF_INST_END: - fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]); - fprintf(stderr, "ADDR:%d\n", cf->cf_addr); - id++; - fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_WORD1_CF_INST(cf->inst)); - fprintf(stderr, "COND:%X ", cf->cond); - fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count); - break; - default: - R600_ERR("Unknown instruction %0x\n", cf->inst); - } + if (cf->op == CF_NATIVE) { + fprintf(stderr, "%04d %08X %08X CF_NATIVE\n", id, bc->bytecode[id], + bc->bytecode[id + 1]); } else { - switch (cf->inst) { - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER: - case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE: - fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]); - fprintf(stderr, "ADDR:%d ", cf->addr); - fprintf(stderr, "KCACHE_MODE0:%X ", cf->kcache[0].mode); - fprintf(stderr, "KCACHE_BANK0:%X ", cf->kcache[0].bank); - fprintf(stderr, "KCACHE_BANK1:%X\n", cf->kcache[1].bank); - id++; - fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_ALU_WORD1_CF_INST(cf->inst)); - fprintf(stderr, "KCACHE_MODE1:%X ", cf->kcache[1].mode); - fprintf(stderr, "KCACHE_ADDR0:%X ", cf->kcache[0].addr); - fprintf(stderr, "KCACHE_ADDR1:%X ", cf->kcache[1].addr); - fprintf(stderr, "COUNT:%d\n", cf->ndw / 2); - break; - case V_SQ_CF_WORD1_SQ_CF_INST_TEX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX: - case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC: - fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]); - fprintf(stderr, "ADDR:%d\n", cf->addr); - id++; - fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_WORD1_CF_INST(cf->inst)); - fprintf(stderr, "COUNT:%d\n", cf->ndw / 4); - break; - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT: - case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE: - fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]); - fprintf(stderr, "GPR:%X ", cf->output.gpr); - fprintf(stderr, "ELEM_SIZE:%X ", cf->output.elem_size); - fprintf(stderr, "ARRAY_BASE:%X ", cf->output.array_base); - fprintf(stderr, "TYPE:%X\n", cf->output.type); - id++; - fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]); - fprintf(stderr, "SWIZ_X:%X ", cf->output.swizzle_x); - fprintf(stderr, "SWIZ_Y:%X ", cf->output.swizzle_y); - fprintf(stderr, "SWIZ_Z:%X ", cf->output.swizzle_z); - fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w); - fprintf(stderr, "BARRIER:%X ", cf->output.barrier); - fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst)); - fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count); - fprintf(stderr, "EOP:%X\n", cf->output.end_of_program); - break; - case V_SQ_CF_WORD1_SQ_CF_INST_JUMP: - case V_SQ_CF_WORD1_SQ_CF_INST_ELSE: - case V_SQ_CF_WORD1_SQ_CF_INST_POP: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE: - case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK: - case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS: - case V_SQ_CF_WORD1_SQ_CF_INST_RETURN: - fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]); - fprintf(stderr, "ADDR:%d\n", cf->cf_addr); - id++; - fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_WORD1_CF_INST(cf->inst)); - fprintf(stderr, "COND:%X ", cf->cond); - fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count); - break; - default: - R600_ERR("Unknown instruction %0x\n", cf->inst); + const struct cf_op_info *cfop = r600_isa_cf(cf->op); + if (cfop->flags & CF_ALU) { + if (cf->eg_alu_extended) { + fprintf(stderr, "%04d %08X %08X %s\n", id, bc->bytecode[id], + bc->bytecode[id + 1], "ALU_EXT"); + id += 2; + } + fprintf(stderr, "%04d %08X %08X %s ", id, bc->bytecode[id], + bc->bytecode[id + 1], cfop->name); + fprintf(stderr, "%d @%d ", cf->ndw / 2, cf->addr); + for (i = 0; i < 4; ++i) { + if (cf->kcache[i].mode) { + int c_start = (cf->kcache[i].addr << 4); + int c_end = c_start + (cf->kcache[i].mode << 4); + fprintf(stderr, "KC%d[CB%d:%d-%d%s%s] ", + i, cf->kcache[i].bank, c_start, c_end, + cf->kcache[i].index_mode ? " " : "", + cf->kcache[i].index_mode ? index_mode[cf->kcache[i].index_mode] : ""); + } + } + fprintf(stderr, "\n"); + } else if (cfop->flags & CF_FETCH) { + fprintf(stderr, "%04d %08X %08X %s ", id, bc->bytecode[id], + bc->bytecode[id + 1], cfop->name); + fprintf(stderr, "%d @%d ", cf->ndw / 4, cf->addr); + fprintf(stderr, "\n"); + if (cf->end_of_program) + fprintf(stderr, "EOP "); + } else if (cfop->flags & CF_EXP) { + int o = 0; + const char *exp_type[] = {"PIXEL", "POS ", "PARAM"}; + o += fprintf(stderr, "%04d %08X %08X %s ", id, bc->bytecode[id], + bc->bytecode[id + 1], cfop->name); + o += print_indent(o, 43); + o += fprintf(stderr, "%s ", exp_type[cf->output.type]); + if (cf->output.burst_count > 1) { + o += fprintf(stderr, "%d-%d ", cf->output.array_base, + cf->output.array_base + cf->output.burst_count - 1); + + o += print_indent(o, 55); + o += fprintf(stderr, "R%d-%d.", cf->output.gpr, + cf->output.gpr + cf->output.burst_count - 1); + } else { + o += fprintf(stderr, "%d ", cf->output.array_base); + o += print_indent(o, 55); + o += fprintf(stderr, "R%d.", cf->output.gpr); + } + + o += print_swizzle(cf->output.swizzle_x); + o += print_swizzle(cf->output.swizzle_y); + o += print_swizzle(cf->output.swizzle_z); + o += print_swizzle(cf->output.swizzle_w); + + print_indent(o, 67); + + fprintf(stderr, " ES:%X ", cf->output.elem_size); + if (cf->mark) + fprintf(stderr, "MARK "); + if (!cf->barrier) + fprintf(stderr, "NO_BARRIER "); + if (cf->end_of_program) + fprintf(stderr, "EOP "); + fprintf(stderr, "\n"); + } else if (r600_isa_cf(cf->op)->flags & CF_MEM) { + int o = 0; + const char *exp_type[] = {"WRITE", "WRITE_IND", "WRITE_ACK", + "WRITE_IND_ACK"}; + o += fprintf(stderr, "%04d %08X %08X %s ", id, + bc->bytecode[id], bc->bytecode[id + 1], cfop->name); + o += print_indent(o, 43); + o += fprintf(stderr, "%s ", exp_type[cf->output.type]); + + if (r600_isa_cf(cf->op)->flags & CF_RAT) { + o += fprintf(stderr, "RAT%d", cf->rat.id); + if (cf->rat.index_mode) { + o += fprintf(stderr, "[IDX%d]", cf->rat.index_mode - 1); + } + o += fprintf(stderr, " INST: %d ", cf->rat.inst); + } + + if (cf->output.burst_count > 1) { + o += fprintf(stderr, "%d-%d ", cf->output.array_base, + cf->output.array_base + cf->output.burst_count - 1); + o += print_indent(o, 55); + o += fprintf(stderr, "R%d-%d.", cf->output.gpr, + cf->output.gpr + cf->output.burst_count - 1); + } else { + o += fprintf(stderr, "%d ", cf->output.array_base); + o += print_indent(o, 55); + o += fprintf(stderr, "R%d.", cf->output.gpr); + } + for (i = 0; i < 4; ++i) { + if (cf->output.comp_mask & (1 << i)) + o += print_swizzle(i); + else + o += print_swizzle(7); + } + + if (cf->output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE_IND || + cf->output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_READ_IND) + o += fprintf(stderr, " R%d", cf->output.index_gpr); + + o += print_indent(o, 67); + + fprintf(stderr, " ES:%i ", cf->output.elem_size); + if (cf->output.array_size != 0xFFF) + fprintf(stderr, "AS:%i ", cf->output.array_size); + if (cf->mark) + fprintf(stderr, "MARK "); + if (!cf->barrier) + fprintf(stderr, "NO_BARRIER "); + if (cf->end_of_program) + fprintf(stderr, "EOP "); + fprintf(stderr, "\n"); + } else { + fprintf(stderr, "%04d %08X %08X %s ", id, bc->bytecode[id], + bc->bytecode[id + 1], cfop->name); + fprintf(stderr, "@%d ", cf->cf_addr); + if (cf->cond) + fprintf(stderr, "CND:%X ", cf->cond); + if (cf->pop_count) + fprintf(stderr, "POP:%X ", cf->pop_count); + if (cf->count && (cfop->flags & CF_EMIT)) + fprintf(stderr, "STREAM%d ", cf->count); + if (cf->end_of_program) + fprintf(stderr, "EOP "); + fprintf(stderr, "\n"); } } id = cf->addr; nliteral = 0; + last = 1; LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) { - r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral); - - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "SRC0(SEL:%d ", alu->src[0].sel); - fprintf(stderr, "REL:%d ", alu->src[0].rel); - fprintf(stderr, "CHAN:%d ", alu->src[0].chan); - fprintf(stderr, "NEG:%d) ", alu->src[0].neg); - fprintf(stderr, "SRC1(SEL:%d ", alu->src[1].sel); - fprintf(stderr, "REL:%d ", alu->src[1].rel); - fprintf(stderr, "CHAN:%d ", alu->src[1].chan); - fprintf(stderr, "NEG:%d) ", alu->src[1].neg); - fprintf(stderr, "LAST:%d)\n", alu->last); - id++; - fprintf(stderr, "%04d %08X %c ", id, bc->bytecode[id], alu->last ? '*' : ' '); - fprintf(stderr, "INST:0x%x ", alu->inst); - fprintf(stderr, "DST(SEL:%d ", alu->dst.sel); - fprintf(stderr, "CHAN:%d ", alu->dst.chan); - fprintf(stderr, "REL:%d ", alu->dst.rel); - fprintf(stderr, "CLAMP:%d) ", alu->dst.clamp); - fprintf(stderr, "BANK_SWIZZLE:%d ", alu->bank_swizzle); - if (alu->is_op3) { - fprintf(stderr, "SRC2(SEL:%d ", alu->src[2].sel); - fprintf(stderr, "REL:%d ", alu->src[2].rel); - fprintf(stderr, "CHAN:%d ", alu->src[2].chan); - fprintf(stderr, "NEG:%d)\n", alu->src[2].neg); - } else { - fprintf(stderr, "SRC0_ABS:%d ", alu->src[0].abs); - fprintf(stderr, "SRC1_ABS:%d ", alu->src[1].abs); - fprintf(stderr, "WRITE_MASK:%d ", alu->dst.write); - fprintf(stderr, "OMOD:%d ", alu->omod); - fprintf(stderr, "EXECUTE_MASK:%d ", alu->predicate); - fprintf(stderr, "UPDATE_PRED:%d\n", alu->predicate); + const char *omod_str[] = {"","*2","*4","/2"}; + const struct alu_op_info *aop = r600_isa_alu(alu->op); + int o = 0; + + r600_bytecode_alu_nliterals(alu, literal, &nliteral); + o += fprintf(stderr, " %04d %08X %08X ", id, bc->bytecode[id], bc->bytecode[id+1]); + if (last) + o += fprintf(stderr, "%4d ", ++ngr); + else + o += fprintf(stderr, " "); + o += fprintf(stderr, "%c%c %c ", alu->execute_mask ? 'M':' ', + alu->update_pred ? 'P':' ', + alu->pred_sel ? alu->pred_sel==2 ? '0':'1':' '); + + o += fprintf(stderr, "%s%s%s ", aop->name, + omod_str[alu->omod], alu->dst.clamp ? "_sat":""); + + o += print_indent(o,60); + o += print_dst(alu); + for (i = 0; i < aop->src_count; ++i) { + o += fprintf(stderr, i == 0 ? ", ": ", "); + o += print_src(alu, i); } - id++; + if (alu->bank_swizzle) { + o += print_indent(o,75); + o += fprintf(stderr, " BS:%d", alu->bank_swizzle); + } + + fprintf(stderr, "\n"); + id += 2; + if (alu->last) { for (i = 0; i < nliteral; i++, id++) { float *f = (float*)(bc->bytecode + id); - fprintf(stderr, "%04d %08X\t%f\n", id, bc->bytecode[id], *f); + o = fprintf(stderr, " %04d %08X", id, bc->bytecode[id]); + print_indent(o, 60); + fprintf(stderr, " %f (%d)\n", *f, *(bc->bytecode + id)); } id += nliteral & 1; nliteral = 0; } + last = alu->last; } LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) { - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "INST:0x%x ", tex->inst); - fprintf(stderr, "RESOURCE_ID:%d ", tex->resource_id); - fprintf(stderr, "SRC(GPR:%d ", tex->src_gpr); - fprintf(stderr, "REL:%d)\n", tex->src_rel); - id++; - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "DST(GPR:%d ", tex->dst_gpr); - fprintf(stderr, "REL:%d ", tex->dst_rel); - fprintf(stderr, "SEL_X:%d ", tex->dst_sel_x); - fprintf(stderr, "SEL_Y:%d ", tex->dst_sel_y); - fprintf(stderr, "SEL_Z:%d ", tex->dst_sel_z); - fprintf(stderr, "SEL_W:%d) ", tex->dst_sel_w); - fprintf(stderr, "LOD_BIAS:%d ", tex->lod_bias); - fprintf(stderr, "COORD_TYPE_X:%d ", tex->coord_type_x); - fprintf(stderr, "COORD_TYPE_Y:%d ", tex->coord_type_y); - fprintf(stderr, "COORD_TYPE_Z:%d ", tex->coord_type_z); - fprintf(stderr, "COORD_TYPE_W:%d\n", tex->coord_type_w); - id++; - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "OFFSET_X:%d ", tex->offset_x); - fprintf(stderr, "OFFSET_Y:%d ", tex->offset_y); - fprintf(stderr, "OFFSET_Z:%d ", tex->offset_z); - fprintf(stderr, "SAMPLER_ID:%d ", tex->sampler_id); - fprintf(stderr, "SRC(SEL_X:%d ", tex->src_sel_x); - fprintf(stderr, "SEL_Y:%d ", tex->src_sel_y); - fprintf(stderr, "SEL_Z:%d ", tex->src_sel_z); - fprintf(stderr, "SEL_W:%d)\n", tex->src_sel_w); - id++; - fprintf(stderr, "%04d %08X \n", id, bc->bytecode[id]); - id++; + int o = 0; + o += fprintf(stderr, " %04d %08X %08X %08X ", id, bc->bytecode[id], + bc->bytecode[id + 1], bc->bytecode[id + 2]); + + o += fprintf(stderr, "%s ", r600_isa_fetch(tex->op)->name); + + o += print_indent(o, 50); + + o += fprintf(stderr, "R%d.", tex->dst_gpr); + o += print_swizzle(tex->dst_sel_x); + o += print_swizzle(tex->dst_sel_y); + o += print_swizzle(tex->dst_sel_z); + o += print_swizzle(tex->dst_sel_w); + + o += fprintf(stderr, ", R%d.", tex->src_gpr); + o += print_swizzle(tex->src_sel_x); + o += print_swizzle(tex->src_sel_y); + o += print_swizzle(tex->src_sel_z); + o += print_swizzle(tex->src_sel_w); + + o += fprintf(stderr, ", RID:%d", tex->resource_id); + o += fprintf(stderr, ", SID:%d ", tex->sampler_id); + + if (tex->sampler_index_mode) + fprintf(stderr, "SQ_%s ", index_mode[tex->sampler_index_mode]); + + if (tex->lod_bias) + fprintf(stderr, "LB:%d ", tex->lod_bias); + + fprintf(stderr, "CT:%c%c%c%c ", + tex->coord_type_x ? 'N' : 'U', + tex->coord_type_y ? 'N' : 'U', + tex->coord_type_z ? 'N' : 'U', + tex->coord_type_w ? 'N' : 'U'); + + if (tex->offset_x) + fprintf(stderr, "OX:%d ", tex->offset_x); + if (tex->offset_y) + fprintf(stderr, "OY:%d ", tex->offset_y); + if (tex->offset_z) + fprintf(stderr, "OZ:%d ", tex->offset_z); + + id += 4; + fprintf(stderr, "\n"); } LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) { - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "INST:%d ", vtx->inst); - fprintf(stderr, "FETCH_TYPE:%d ", vtx->fetch_type); - fprintf(stderr, "BUFFER_ID:%d\n", vtx->buffer_id); - id++; - /* This assumes that no semantic fetches exist */ - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "SRC(GPR:%d ", vtx->src_gpr); - fprintf(stderr, "SEL_X:%d) ", vtx->src_sel_x); - if (bc->chip_class < CAYMAN) - fprintf(stderr, "MEGA_FETCH_COUNT:%d ", vtx->mega_fetch_count); - else - fprintf(stderr, "SEL_Y:%d) ", 0); - fprintf(stderr, "DST(GPR:%d ", vtx->dst_gpr); - fprintf(stderr, "SEL_X:%d ", vtx->dst_sel_x); - fprintf(stderr, "SEL_Y:%d ", vtx->dst_sel_y); - fprintf(stderr, "SEL_Z:%d ", vtx->dst_sel_z); - fprintf(stderr, "SEL_W:%d) ", vtx->dst_sel_w); - fprintf(stderr, "USE_CONST_FIELDS:%d ", vtx->use_const_fields); - fprintf(stderr, "FORMAT(DATA:%d ", vtx->data_format); + int o = 0; + const char * fetch_type[] = {"VERTEX", "INSTANCE", ""}; + o += fprintf(stderr, " %04d %08X %08X %08X ", id, bc->bytecode[id], + bc->bytecode[id + 1], bc->bytecode[id + 2]); + + o += fprintf(stderr, "%s ", r600_isa_fetch(vtx->op)->name); + + o += print_indent(o, 50); + + o += fprintf(stderr, "R%d.", vtx->dst_gpr); + o += print_swizzle(vtx->dst_sel_x); + o += print_swizzle(vtx->dst_sel_y); + o += print_swizzle(vtx->dst_sel_z); + o += print_swizzle(vtx->dst_sel_w); + + o += fprintf(stderr, ", R%d.", vtx->src_gpr); + o += print_swizzle(vtx->src_sel_x); + + if (vtx->offset) + fprintf(stderr, " +%db", vtx->offset); + + o += print_indent(o, 55); + + fprintf(stderr, ", RID:%d ", vtx->buffer_id); + + fprintf(stderr, "%s ", fetch_type[vtx->fetch_type]); + + if (bc->chip_class < CAYMAN && vtx->mega_fetch_count) + fprintf(stderr, "MFC:%d ", vtx->mega_fetch_count); + + if (bc->chip_class >= EVERGREEN && vtx->buffer_index_mode) + fprintf(stderr, "SQ_%s ", index_mode[vtx->buffer_index_mode]); + + fprintf(stderr, "UCF:%d ", vtx->use_const_fields); + fprintf(stderr, "FMT(DTA:%d ", vtx->data_format); fprintf(stderr, "NUM:%d ", vtx->num_format_all); fprintf(stderr, "COMP:%d ", vtx->format_comp_all); fprintf(stderr, "MODE:%d)\n", vtx->srf_mode_all); - id++; - fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]); - fprintf(stderr, "ENDIAN:%d ", vtx->endian); - fprintf(stderr, "OFFSET:%d\n", vtx->offset); - /* TODO */ - id++; - fprintf(stderr, "%04d %08X \n", id, bc->bytecode[id]); - id++; + + id += 4; + } + + LIST_FOR_EACH_ENTRY(gds, &cf->gds, list) { + int o = 0; + o += fprintf(stderr, " %04d %08X %08X %08X ", id, bc->bytecode[id], + bc->bytecode[id + 1], bc->bytecode[id + 2]); + + o += fprintf(stderr, "%s ", r600_isa_fetch(gds->op)->name); + + if (gds->op != FETCH_OP_TF_WRITE) { + o += fprintf(stderr, "R%d.", gds->dst_gpr); + o += print_swizzle(gds->dst_sel_x); + o += print_swizzle(gds->dst_sel_y); + o += print_swizzle(gds->dst_sel_z); + o += print_swizzle(gds->dst_sel_w); + } + + o += fprintf(stderr, ", R%d.", gds->src_gpr); + o += print_swizzle(gds->src_sel_x); + o += print_swizzle(gds->src_sel_y); + o += print_swizzle(gds->src_sel_z); + + if (gds->op != FETCH_OP_TF_WRITE) { + o += fprintf(stderr, ", R%d.", gds->src_gpr2); + } + if (gds->alloc_consume) { + o += fprintf(stderr, " UAV: %d", gds->uav_id); + if (gds->uav_index_mode) + o += fprintf(stderr, "[%s]", index_mode[gds->uav_index_mode]); + } + fprintf(stderr, "\n"); + id += 4; } } fprintf(stderr, "--------------------------------------\n"); } -static void r600_vertex_data_type(enum pipe_format pformat, +void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, unsigned *num_format, unsigned *format_comp, unsigned *endian) { @@ -2279,6 +2391,24 @@ static void r600_vertex_data_type(enum pipe_format pformat, *format_comp = 0; *endian = ENDIAN_NONE; + if (pformat == PIPE_FORMAT_R11G11B10_FLOAT) { + *format = FMT_10_11_11_FLOAT; + *endian = r600_endian_swap(32); + return; + } + + if (pformat == PIPE_FORMAT_B5G6R5_UNORM) { + *format = FMT_5_6_5; + *endian = r600_endian_swap(16); + return; + } + + if (pformat == PIPE_FORMAT_B5G5R5A1_UNORM) { + *format = FMT_1_5_5_5; + *endian = r600_endian_swap(16); + return; + } + desc = util_format_description(pformat); if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) { goto out_unknown; @@ -2413,74 +2543,90 @@ out_unknown: R600_ERR("unsupported vertex format %s\n", util_format_name(pformat)); } -int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, struct r600_vertex_element *ve) +void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, + unsigned count, + const struct pipe_vertex_element *elements) { - static int dump_shaders = -1; - + struct r600_context *rctx = (struct r600_context *)ctx; struct r600_bytecode bc; struct r600_bytecode_vtx vtx; - struct pipe_vertex_element *elements = ve->elements; const struct util_format_description *desc; - unsigned fetch_resource_start = rctx->chip_class >= EVERGREEN ? 0 : 160; + unsigned fetch_resource_start = rctx->b.chip_class >= EVERGREEN ? 0 : 160; unsigned format, num_format, format_comp, endian; - u32 *bytecode; - int i, r; + uint32_t *bytecode; + int i, j, r, fs_size; + struct r600_fetch_shader *shader; + unsigned no_sb = rctx->screen->b.debug_flags & DBG_NO_SB; + unsigned sb_disasm = !no_sb || (rctx->screen->b.debug_flags & DBG_SB_DISASM); - /* Vertex element offsets need special handling. If the offset is - * bigger than what we can put in the fetch instruction we need to - * alter the vertex resource offset. In order to simplify code we - * will bind one resource per element in such cases. It's a worst - * case scenario. */ - for (i = 0; i < ve->count; i++) { - ve->vbuffer_offset[i] = C_SQ_VTX_WORD2_OFFSET & elements[i].src_offset; - if (ve->vbuffer_offset[i]) { - ve->vbuffer_need_offset = 1; - } - } + assert(count < 32); memset(&bc, 0, sizeof(bc)); - r600_bytecode_init(&bc, rctx->chip_class); - - for (i = 0; i < ve->count; i++) { - if (elements[i].instance_divisor > 1) { - struct r600_bytecode_alu alu; + r600_bytecode_init(&bc, rctx->b.chip_class, rctx->b.family, + rctx->screen->has_compressed_msaa_texturing); - memset(&alu, 0, sizeof(alu)); - alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); - alu.src[0].sel = 0; - alu.src[0].chan = 3; + bc.isa = rctx->isa; - alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; - alu.src[1].value = (1ll << 32) / elements[i].instance_divisor + 1; - - alu.dst.sel = i + 1; - alu.dst.chan = 3; - alu.dst.write = 1; - alu.last = 1; - - if ((r = r600_bytecode_add_alu(&bc, &alu))) { - r600_bytecode_clear(&bc); - return r; + for (i = 0; i < count; i++) { + if (elements[i].instance_divisor > 1) { + if (rctx->b.chip_class == CAYMAN) { + for (j = 0; j < 4; j++) { + struct r600_bytecode_alu alu; + memset(&alu, 0, sizeof(alu)); + alu.op = ALU_OP2_MULHI_UINT; + alu.src[0].sel = 0; + alu.src[0].chan = 3; + alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; + alu.src[1].value = (1ll << 32) / elements[i].instance_divisor + 1; + alu.dst.sel = i + 1; + alu.dst.chan = j; + alu.dst.write = j == 3; + alu.last = j == 3; + if ((r = r600_bytecode_add_alu(&bc, &alu))) { + r600_bytecode_clear(&bc); + return NULL; + } + } + } else { + struct r600_bytecode_alu alu; + memset(&alu, 0, sizeof(alu)); + alu.op = ALU_OP2_MULHI_UINT; + alu.src[0].sel = 0; + alu.src[0].chan = 3; + alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; + alu.src[1].value = (1ll << 32) / elements[i].instance_divisor + 1; + alu.dst.sel = i + 1; + alu.dst.chan = 3; + alu.dst.write = 1; + alu.last = 1; + if ((r = r600_bytecode_add_alu(&bc, &alu))) { + r600_bytecode_clear(&bc); + return NULL; + } } } } - for (i = 0; i < ve->count; i++) { - unsigned vbuffer_index; - r600_vertex_data_type(ve->elements[i].src_format, + for (i = 0; i < count; i++) { + r600_vertex_data_type(elements[i].src_format, &format, &num_format, &format_comp, &endian); - desc = util_format_description(ve->elements[i].src_format); - if (desc == NULL) { + + desc = util_format_description(elements[i].src_format); + if (!desc) { r600_bytecode_clear(&bc); - R600_ERR("unknown format %d\n", ve->elements[i].src_format); - return -EINVAL; + R600_ERR("unknown format %d\n", elements[i].src_format); + return NULL; + } + + if (elements[i].src_offset > 65535) { + r600_bytecode_clear(&bc); + R600_ERR("too big src_offset: %u\n", elements[i].src_offset); + return NULL; } - /* see above for vbuffer_need_offset explanation */ - vbuffer_index = elements[i].vertex_buffer_index; memset(&vtx, 0, sizeof(vtx)); - vtx.buffer_id = (ve->vbuffer_need_offset ? i : vbuffer_index) + fetch_resource_start; - vtx.fetch_type = elements[i].instance_divisor ? 1 : 0; + vtx.buffer_id = elements[i].vertex_buffer_index + fetch_resource_start; + vtx.fetch_type = elements[i].instance_divisor ? SQ_VTX_FETCH_INSTANCE_DATA : SQ_VTX_FETCH_VERTEX_DATA; vtx.src_gpr = elements[i].instance_divisor > 1 ? i + 1 : 0; vtx.src_sel_x = elements[i].instance_divisor ? 3 : 0; vtx.mega_fetch_count = 0x1F; @@ -2492,65 +2638,142 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru vtx.data_format = format; vtx.num_format_all = num_format; vtx.format_comp_all = format_comp; - vtx.srf_mode_all = 1; vtx.offset = elements[i].src_offset; vtx.endian = endian; if ((r = r600_bytecode_add_vtx(&bc, &vtx))) { r600_bytecode_clear(&bc); - return r; + return NULL; } } - r600_bytecode_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_RETURN)); + r600_bytecode_add_cfinst(&bc, CF_OP_RET); if ((r = r600_bytecode_build(&bc))) { r600_bytecode_clear(&bc); - return r; + return NULL; } - if (dump_shaders == -1) - dump_shaders = debug_get_bool_option("R600_DUMP_SHADERS", FALSE); - - if (dump_shaders) { + if (rctx->screen->b.debug_flags & DBG_FS) { fprintf(stderr, "--------------------------------------------------------------\n"); - r600_bytecode_dump(&bc); - fprintf(stderr, "______________________________________________________________\n"); + fprintf(stderr, "Vertex elements state:\n"); + for (i = 0; i < count; i++) { + fprintf(stderr, " "); + util_dump_vertex_element(stderr, elements+i); + fprintf(stderr, "\n"); + } + + if (!sb_disasm) { + r600_bytecode_disasm(&bc); + + fprintf(stderr, "______________________________________________________________\n"); + } else { + r600_sb_bytecode_process(rctx, &bc, NULL, 1 /*dump*/, 0 /*optimize*/); + } } - ve->fs_size = bc.ndw*4; + fs_size = bc.ndw*4; - ve->fetch_shader = (struct r600_resource*) - pipe_buffer_create(rctx->context.screen, - PIPE_BIND_CUSTOM, - PIPE_USAGE_IMMUTABLE, ve->fs_size); - if (ve->fetch_shader == NULL) { + /* Allocate the CSO. */ + shader = CALLOC_STRUCT(r600_fetch_shader); + if (!shader) { r600_bytecode_clear(&bc); - return -ENOMEM; + return NULL; } - bytecode = rctx->ws->buffer_map(ve->fetch_shader->buf, rctx->ctx.cs, PIPE_TRANSFER_WRITE); - if (bytecode == NULL) { + u_suballocator_alloc(rctx->allocator_fetch_shader, fs_size, 256, + &shader->offset, + (struct pipe_resource**)&shader->buffer); + if (!shader->buffer) { r600_bytecode_clear(&bc); - pipe_resource_reference((struct pipe_resource**)&ve->fetch_shader, NULL); - return -ENOMEM; + FREE(shader); + return NULL; } + bytecode = r600_buffer_map_sync_with_rings(&rctx->b, shader->buffer, PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED); + bytecode += shader->offset / 4; + if (R600_BIG_ENDIAN) { - for (i = 0; i < ve->fs_size / 4; ++i) { - bytecode[i] = bswap_32(bc.bytecode[i]); + for (i = 0; i < fs_size / 4; ++i) { + bytecode[i] = util_cpu_to_le32(bc.bytecode[i]); } } else { - memcpy(bytecode, bc.bytecode, ve->fs_size); + memcpy(bytecode, bc.bytecode, fs_size); } + rctx->b.ws->buffer_unmap(shader->buffer->buf); - rctx->ws->buffer_unmap(ve->fetch_shader->buf); r600_bytecode_clear(&bc); + return shader; +} - if (rctx->chip_class >= EVERGREEN) - evergreen_fetch_shader(&rctx->context, ve); - else - r600_fetch_shader(&rctx->context, ve); +void r600_bytecode_alu_read(struct r600_bytecode *bc, + struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1) +{ + /* WORD0 */ + alu->src[0].sel = G_SQ_ALU_WORD0_SRC0_SEL(word0); + alu->src[0].rel = G_SQ_ALU_WORD0_SRC0_REL(word0); + alu->src[0].chan = G_SQ_ALU_WORD0_SRC0_CHAN(word0); + alu->src[0].neg = G_SQ_ALU_WORD0_SRC0_NEG(word0); + alu->src[1].sel = G_SQ_ALU_WORD0_SRC1_SEL(word0); + alu->src[1].rel = G_SQ_ALU_WORD0_SRC1_REL(word0); + alu->src[1].chan = G_SQ_ALU_WORD0_SRC1_CHAN(word0); + alu->src[1].neg = G_SQ_ALU_WORD0_SRC1_NEG(word0); + alu->index_mode = G_SQ_ALU_WORD0_INDEX_MODE(word0); + alu->pred_sel = G_SQ_ALU_WORD0_PRED_SEL(word0); + alu->last = G_SQ_ALU_WORD0_LAST(word0); + + /* WORD1 */ + alu->bank_swizzle = G_SQ_ALU_WORD1_BANK_SWIZZLE(word1); + if (alu->bank_swizzle) + alu->bank_swizzle_force = alu->bank_swizzle; + alu->dst.sel = G_SQ_ALU_WORD1_DST_GPR(word1); + alu->dst.rel = G_SQ_ALU_WORD1_DST_REL(word1); + alu->dst.chan = G_SQ_ALU_WORD1_DST_CHAN(word1); + alu->dst.clamp = G_SQ_ALU_WORD1_CLAMP(word1); + if (G_SQ_ALU_WORD1_ENCODING(word1)) /*ALU_DWORD1_OP3*/ + { + alu->is_op3 = 1; + alu->src[2].sel = G_SQ_ALU_WORD1_OP3_SRC2_SEL(word1); + alu->src[2].rel = G_SQ_ALU_WORD1_OP3_SRC2_REL(word1); + alu->src[2].chan = G_SQ_ALU_WORD1_OP3_SRC2_CHAN(word1); + alu->src[2].neg = G_SQ_ALU_WORD1_OP3_SRC2_NEG(word1); + alu->op = r600_isa_alu_by_opcode(bc->isa, + G_SQ_ALU_WORD1_OP3_ALU_INST(word1), /* is_op3 = */ 1); + + } + else /*ALU_DWORD1_OP2*/ + { + alu->src[0].abs = G_SQ_ALU_WORD1_OP2_SRC0_ABS(word1); + alu->src[1].abs = G_SQ_ALU_WORD1_OP2_SRC1_ABS(word1); + alu->op = r600_isa_alu_by_opcode(bc->isa, + G_SQ_ALU_WORD1_OP2_ALU_INST(word1), /* is_op3 = */ 0); + alu->omod = G_SQ_ALU_WORD1_OP2_OMOD(word1); + alu->dst.write = G_SQ_ALU_WORD1_OP2_WRITE_MASK(word1); + alu->update_pred = G_SQ_ALU_WORD1_OP2_UPDATE_PRED(word1); + alu->execute_mask = + G_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(word1); + } +} - return 0; +#if 0 +void r600_bytecode_export_read(struct r600_bytecode *bc, + struct r600_bytecode_output *output, uint32_t word0, uint32_t word1) +{ + output->array_base = G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(word0); + output->type = G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(word0); + output->gpr = G_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(word0); + output->elem_size = G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(word0); + + output->swizzle_x = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(word1); + output->swizzle_y = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(word1); + output->swizzle_z = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(word1); + output->swizzle_w = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(word1); + output->burst_count = G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(word1); + output->end_of_program = G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(word1); + output->op = r600_isa_cf_by_opcode(bc->isa, + G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(word1), 0); + output->barrier = G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(word1); + output->array_size = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(word1); + output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1); } +#endif