X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fr600_asm.h;h=b12913d4374cb04ba08b52696c4a0186680b3470;hb=ab8fb5a082513bb699b224c52ac82779752608fb;hp=61caa4b915e24304bd7b0606828803d361b36b23;hpb=f8e6d19f3f40931be741b44d3edf210c38e13f0f;p=mesa.git

diff --git a/src/gallium/drivers/r600/r600_asm.h b/src/gallium/drivers/r600/r600_asm.h
index 61caa4b915e..b12913d4374 100644
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -23,8 +23,9 @@
 #ifndef R600_ASM_H
 #define R600_ASM_H
 
-struct r600_vertex_element;
-struct r600_pipe_context;
+#include "r600_pipe.h"
+#include "r600_isa.h"
+#include "tgsi/tgsi_exec.h"
 
 struct r600_bytecode_alu_src {
 	unsigned			sel;
@@ -32,6 +33,8 @@ struct r600_bytecode_alu_src {
 	unsigned			neg;
 	unsigned			abs;
 	unsigned			rel;
+	unsigned			kc_bank;
+	unsigned			kc_rel;
 	uint32_t			value;
 };
 
@@ -47,18 +50,24 @@ struct r600_bytecode_alu {
 	struct list_head		list;
 	struct r600_bytecode_alu_src		src[3];
 	struct r600_bytecode_alu_dst		dst;
-	unsigned			inst;
+	unsigned			op;
 	unsigned			last;
 	unsigned			is_op3;
-	unsigned			predicate;
+	unsigned			is_lds_idx_op;
+	unsigned			execute_mask;
+	unsigned			update_pred;
+	unsigned			pred_sel;
 	unsigned			bank_swizzle;
 	unsigned			bank_swizzle_force;
 	unsigned			omod;
+	unsigned                        index_mode;
+	unsigned                        lds_idx;
 };
 
 struct r600_bytecode_tex {
 	struct list_head		list;
-	unsigned			inst;
+	unsigned			op;
+	unsigned			inst_mod;
 	unsigned			resource_id;
 	unsigned			src_gpr;
 	unsigned			src_rel;
@@ -73,19 +82,22 @@ struct r600_bytecode_tex {
 	unsigned			coord_type_y;
 	unsigned			coord_type_z;
 	unsigned			coord_type_w;
-	unsigned			offset_x;
-	unsigned			offset_y;
-	unsigned			offset_z;
+	int				offset_x;
+	int				offset_y;
+	int				offset_z;
 	unsigned			sampler_id;
 	unsigned			src_sel_x;
 	unsigned			src_sel_y;
 	unsigned			src_sel_z;
 	unsigned			src_sel_w;
+	/* indexed samplers/resources only on evergreen/cayman */
+	unsigned			sampler_index_mode;
+	unsigned			resource_index_mode;
 };
 
 struct r600_bytecode_vtx {
 	struct list_head		list;
-	unsigned			inst;
+	unsigned			op;
 	unsigned			fetch_type;
 	unsigned			buffer_id;
 	unsigned			src_gpr;
@@ -103,13 +115,35 @@ struct r600_bytecode_vtx {
 	unsigned			srf_mode_all;
 	unsigned			offset;
 	unsigned			endian;
+	unsigned			buffer_index_mode;
+};
+
+struct r600_bytecode_gds {
+	struct list_head		list;
+	unsigned			op;
+	unsigned                        gds_op;
+	unsigned			src_gpr;
+	unsigned			src_rel;
+	unsigned			src_sel_x;
+	unsigned			src_sel_y;
+	unsigned			src_sel_z;
+	unsigned			src_gpr2;
+	unsigned			dst_gpr;
+	unsigned			dst_rel;
+	unsigned			dst_sel_x;
+	unsigned			dst_sel_y;
+	unsigned			dst_sel_z;
+	unsigned			dst_sel_w;
 };
 
 struct r600_bytecode_output {
 	unsigned			array_base;
+	unsigned			array_size;
+	unsigned			comp_mask;
 	unsigned			type;
-	unsigned			end_of_program;
-	unsigned			inst;
+
+	unsigned			op;
+
 	unsigned			elem_size;
 	unsigned			gpr;
 	unsigned			swizzle_x;
@@ -117,33 +151,41 @@ struct r600_bytecode_output {
 	unsigned			swizzle_z;
 	unsigned			swizzle_w;
 	unsigned			burst_count;
-	unsigned			barrier;
+	unsigned			index_gpr;
 };
 
 struct r600_bytecode_kcache {
 	unsigned			bank;
 	unsigned			mode;
 	unsigned			addr;
+	unsigned			index_mode;
 };
 
 struct r600_bytecode_cf {
 	struct list_head		list;
-	unsigned			inst;
+
+	unsigned			op;
 	unsigned			addr;
 	unsigned			ndw;
 	unsigned			id;
 	unsigned			cond;
 	unsigned			pop_count;
+	unsigned			count;
 	unsigned			cf_addr; /* control flow addr */
-	struct r600_bytecode_kcache		kcache[2];
+	struct r600_bytecode_kcache		kcache[4];
 	unsigned			r6xx_uses_waterfall;
+	unsigned			eg_alu_extended;
+	unsigned			barrier;
+	unsigned			end_of_program;
 	struct list_head		alu;
 	struct list_head		tex;
 	struct list_head		vtx;
+	struct list_head		gds;
 	struct r600_bytecode_output		output;
 	struct r600_bytecode_alu		*curr_bs_head;
 	struct r600_bytecode_alu		*prev_bs_head;
 	struct r600_bytecode_alu		*prev2_bs_head;
+	unsigned isa[2];
 };
 
 #define FC_NONE				0
@@ -161,15 +203,30 @@ struct r600_cf_stack_entry {
 };
 
 #define SQ_MAX_CALL_DEPTH 0x00000020
-struct r600_cf_callstack {
-	unsigned			fc_sp_before_entry;
-	int				sub_desc_index;
-	int				current;
-	int				max;
+
+#define AR_HANDLE_NORMAL 0
+#define AR_HANDLE_RV6XX 1 /* except RV670 */
+
+struct r600_stack_info {
+	/* current level of non-WQM PUSH operations
+	 * (PUSH, PUSH_ELSE, ALU_PUSH_BEFORE) */
+	int push;
+	/* current level of WQM PUSH operations
+	 * (PUSH, PUSH_ELSE, PUSH_WQM) */
+	int push_wqm;
+	/* current loop level */
+	int loop;
+
+	/* required depth */
+	int max_entries;
+	/* subentries per entry */
+	int entry_size;
 };
 
 struct r600_bytecode {
 	enum chip_class			chip_class;
+	enum radeon_family		family;
+	bool				has_compressed_msaa_texturing;
 	int				type;
 	struct list_head		cf;
 	struct r600_bytecode_cf		*cf_last;
@@ -177,37 +234,91 @@ struct r600_bytecode {
 	unsigned			ncf;
 	unsigned			ngpr;
 	unsigned			nstack;
+	unsigned			nlds_dw;
 	unsigned			nresource;
 	unsigned			force_add_cf;
-	u32				*bytecode;
-	u32				fc_sp;
-	struct r600_cf_stack_entry	fc_stack[32];
-	unsigned			call_sp;
-	struct r600_cf_callstack	callstack[SQ_MAX_CALL_DEPTH];
+	uint32_t			*bytecode;
+	uint32_t			fc_sp;
+	struct r600_cf_stack_entry	fc_stack[TGSI_EXEC_MAX_NESTING];
+	struct r600_stack_info		stack;
+	unsigned	ar_loaded;
+	unsigned	ar_reg;
+	unsigned	ar_chan;
+	unsigned        ar_handling;
+	unsigned        r6xx_nop_after_rel_dst;
+	bool            index_loaded[2];
+	unsigned        index_reg[2]; /* indexing register CF_INDEX_[01] */
+	unsigned        debug_id;
+	struct r600_isa* isa;
 };
 
 /* eg_asm.c */
 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
-
+int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause);
+int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id);
+int eg_bytecode_alu_build(struct r600_bytecode *bc,
+			  struct r600_bytecode_alu *alu, unsigned id);
 /* r600_asm.c */
-void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class);
+void r600_bytecode_init(struct r600_bytecode *bc,
+			enum chip_class chip_class,
+			enum radeon_family family,
+			bool has_compressed_msaa_texturing);
 void r600_bytecode_clear(struct r600_bytecode *bc);
-int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu);
-int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx);
-int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex);
-int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output);
+int r600_bytecode_add_alu(struct r600_bytecode *bc,
+		const struct r600_bytecode_alu *alu);
+int r600_bytecode_add_vtx(struct r600_bytecode *bc,
+		const struct r600_bytecode_vtx *vtx);
+int r600_bytecode_add_tex(struct r600_bytecode *bc,
+		const struct r600_bytecode_tex *tex);
+int r600_bytecode_add_gds(struct r600_bytecode *bc,
+		const struct r600_bytecode_gds *gds);
+int r600_bytecode_add_output(struct r600_bytecode *bc,
+		const struct r600_bytecode_output *output);
 int r600_bytecode_build(struct r600_bytecode *bc);
-int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst);
-int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type);
-void r600_bytecode_special_constants(u32 value, unsigned *sel, unsigned *neg);
-void r600_bytecode_dump(struct r600_bytecode *bc);
+int r600_bytecode_add_cf(struct r600_bytecode *bc);
+int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
+		unsigned op);
+int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
+		const struct r600_bytecode_alu *alu, unsigned type);
+void r600_bytecode_special_constants(uint32_t value,
+		unsigned *sel, unsigned *neg, unsigned abs);
+void r600_bytecode_disasm(struct r600_bytecode *bc);
+void r600_bytecode_alu_read(struct r600_bytecode *bc,
+		struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
 
 int cm_bytecode_add_cf_end(struct r600_bytecode *bc);
 
-int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, struct r600_vertex_element *ve);
+void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
+				      unsigned count,
+				      const struct pipe_vertex_element *elements);
 
 /* r700_asm.c */
-void r700_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_cf *cf);
-int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id);
+void r700_bytecode_cf_vtx_build(uint32_t *bytecode,
+		const struct r600_bytecode_cf *cf);
+int r700_bytecode_alu_build(struct r600_bytecode *bc,
+		struct r600_bytecode_alu *alu, unsigned id);
+void r700_bytecode_alu_read(struct r600_bytecode *bc,
+		struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
+void r600_bytecode_export_read(struct r600_bytecode *bc,
+		struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
+void eg_bytecode_export_read(struct r600_bytecode *bc,
+		struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
+
+void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
+			   unsigned *num_format, unsigned *format_comp, unsigned *endian);
 
+static inline int fp64_switch(int i)
+{
+	switch (i) {
+	case 0:
+		return 1;
+	case 1:
+		return 0;
+	case 2:
+		return 3;
+	case 3:
+		return 2;
+	}
+	return 0;
+}
 #endif