X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fr600_blit.c;h=c52d5a9bad00266b024266e82131ff09307f57fa;hb=34738a92dea31ab91edb62bf83a3fe1ca44c35a1;hp=f33bb43b8c632bbf644e841c30b23d136d5164dc;hpb=6b919b1b2d296f7d7410c2291b7e0332d7bef1a0;p=mesa.git

diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index f33bb43b8c6..c52d5a9bad0 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -21,8 +21,9 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 #include "r600_pipe.h"
+#include "compute_memory_pool.h"
+#include "evergreen_compute.h"
 #include "util/u_surface.h"
-#include "util/u_blitter.h"
 #include "util/u_format.h"
 #include "evergreend.h"
 
@@ -42,30 +43,32 @@ enum r600_blitter_op /* bitmask */
 	R600_COPY_TEXTURE  = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
 			     R600_DISABLE_RENDER_COND,
 
-	R600_BLIT          = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
-			     R600_DISABLE_RENDER_COND,
+	R600_BLIT          = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
 
 	R600_DECOMPRESS    = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
 
-	R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND
+	R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
 };
 
 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
 {
 	struct r600_context *rctx = (struct r600_context *)ctx;
 
-	r600_suspend_nontimer_queries(rctx);
+	r600_suspend_nontimer_queries(&rctx->b);
 
 	util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
 	util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
 	util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
+	util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
+	util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader);
+	util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader);
 	util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
 				     (struct pipe_stream_output_target**)rctx->b.streamout.targets);
 	util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
 
 	if (op & R600_SAVE_FRAGMENT_STATE) {
-		util_blitter_save_viewport(rctx->blitter, &rctx->viewport.state);
-		util_blitter_save_scissor(rctx->blitter, &rctx->scissor.scissor);
+		util_blitter_save_viewport(rctx->blitter, &rctx->viewport.state[0]);
+		util_blitter_save_scissor(rctx->blitter, &rctx->scissor.scissor[0]);
 		util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
 		util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
 		util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
@@ -86,18 +89,16 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op
 			(struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
 	}
 
-	if ((op & R600_DISABLE_RENDER_COND) && rctx->current_render_cond) {
-           util_blitter_save_render_condition(rctx->blitter,
-                                              rctx->current_render_cond,
-                                              rctx->current_render_cond_cond,
-                                              rctx->current_render_cond_mode);
-        }
+	if (op & R600_DISABLE_RENDER_COND)
+		rctx->b.render_cond_force_off = true;
 }
 
 static void r600_blitter_end(struct pipe_context *ctx)
 {
 	struct r600_context *rctx = (struct r600_context *)ctx;
-        r600_resume_nontimer_queries(rctx);
+
+	rctx->b.render_cond_force_off = false;
+	r600_resume_nontimer_queries(&rctx->b);
 }
 
 static unsigned u_max_sample(struct pipe_resource *r)
@@ -144,7 +145,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx,
 	rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
 	rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
 	rctx->db_misc_state.copy_sample = first_sample;
-	rctx->db_misc_state.atom.dirty = true;
+	r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 
 	for (level = first_level; level <= last_level; level++) {
 		if (!staging && !(texture->dirty_level_mask & (1 << level)))
@@ -161,7 +162,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx,
 
 				if (sample != rctx->db_misc_state.copy_sample) {
 					rctx->db_misc_state.copy_sample = sample;
-					rctx->db_misc_state.atom.dirty = true;
+					r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 				}
 
 				surf_tmpl.format = texture->resource.b.b.format;
@@ -196,25 +197,33 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx,
 
 	/* reenable compression in DB_RENDER_CONTROL */
 	rctx->db_misc_state.flush_depthstencil_through_cb = false;
-	rctx->db_misc_state.atom.dirty = true;
+	r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 }
 
 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
                                                 struct r600_texture *texture,
+						bool is_stencil_sampler,
                                                 unsigned first_level, unsigned last_level,
                                                 unsigned first_layer, unsigned last_layer)
 {
 	struct pipe_surface *zsurf, surf_tmpl = {{0}};
 	unsigned layer, max_layer, checked_last_layer, level;
+	unsigned *dirty_level_mask;
 
 	/* Enable decompression in DB_RENDER_CONTROL */
-	rctx->db_misc_state.flush_depthstencil_in_place = true;
-	rctx->db_misc_state.atom.dirty = true;
+	if (is_stencil_sampler) {
+		rctx->db_misc_state.flush_stencil_inplace = true;
+		dirty_level_mask = &texture->stencil_dirty_level_mask;
+	} else {
+		rctx->db_misc_state.flush_depth_inplace = true;
+		dirty_level_mask = &texture->dirty_level_mask;
+	}
+	r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 
 	surf_tmpl.format = texture->resource.b.b.format;
 
 	for (level = first_level; level <= last_level; level++) {
-		if (!(texture->dirty_level_mask & (1 << level)))
+		if (!(*dirty_level_mask & (1 << level)))
 			continue;
 
 		surf_tmpl.u.tex.level = level;
@@ -241,13 +250,14 @@ static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
 		/* The texture will always be dirty if some layers or samples aren't flushed.
 		 * I don't think this case occurs often though. */
 		if (first_layer == 0 && last_layer == max_layer) {
-			texture->dirty_level_mask &= ~(1 << level);
+			*dirty_level_mask &= ~(1 << level);
 		}
 	}
 
 	/* Disable decompression in DB_RENDER_CONTROL */
-	rctx->db_misc_state.flush_depthstencil_in_place = false;
-	rctx->db_misc_state.atom.dirty = true;
+	rctx->db_misc_state.flush_depth_inplace = false;
+	rctx->db_misc_state.flush_stencil_inplace = false;
+	r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 }
 
 void r600_decompress_depth_textures(struct r600_context *rctx,
@@ -258,12 +268,14 @@ void r600_decompress_depth_textures(struct r600_context *rctx,
 
 	while (depth_texture_mask) {
 		struct pipe_sampler_view *view;
+		struct r600_pipe_sampler_view *rview;
 		struct r600_texture *tex;
 
 		i = u_bit_scan(&depth_texture_mask);
 
 		view = &textures->views[i]->base;
 		assert(view);
+		rview = (struct r600_pipe_sampler_view*)view;
 
 		tex = (struct r600_texture *)view->texture;
 		assert(tex->is_depth && !tex->is_flushing_texture);
@@ -271,6 +283,7 @@ void r600_decompress_depth_textures(struct r600_context *rctx,
 		if (rctx->b.chip_class >= EVERGREEN ||
 		    r600_can_read_depth(tex)) {
 			r600_blit_decompress_depth_in_place(rctx, tex,
+						   rview->is_stencil_sampler,
 						   view->u.tex.first_level, view->u.tex.last_level,
 						   0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
 		} else {
@@ -366,9 +379,14 @@ static bool r600_decompress_subresource(struct pipe_context *ctx,
 	if (rtex->is_depth && !rtex->is_flushing_texture) {
 		if (rctx->b.chip_class >= EVERGREEN ||
 		    r600_can_read_depth(rtex)) {
-			r600_blit_decompress_depth_in_place(rctx, rtex,
+			r600_blit_decompress_depth_in_place(rctx, rtex, false,
 						   level, level,
 						   first_layer, last_layer);
+			if (rtex->surface.flags & RADEON_SURF_SBUFFER) {
+				r600_blit_decompress_depth_in_place(rctx, rtex, true,
+							   level, level,
+							   first_layer, last_layer);
+			}
 		} else {
 			if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
 				return false; /* error */
@@ -385,120 +403,6 @@ static bool r600_decompress_subresource(struct pipe_context *ctx,
 	return true;
 }
 
-static boolean is_simple_msaa_resolve(const struct pipe_blit_info *info)
-{
-	unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
-	unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
-	struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
-	unsigned dst_tile_mode = dst->surface.level[info->dst.level].mode;
-
-	return info->dst.resource->format == info->src.resource->format &&
-		info->dst.resource->format == info->dst.format &&
-		info->src.resource->format == info->src.format &&
-		!info->scissor_enable &&
-		info->mask == PIPE_MASK_RGBA &&
-		dst_width == info->src.resource->width0 &&
-		dst_height == info->src.resource->height0 &&
-		info->dst.box.x == 0 &&
-		info->dst.box.y == 0 &&
-		info->dst.box.width == dst_width &&
-		info->dst.box.height == dst_height &&
-		info->src.box.x == 0 &&
-		info->src.box.y == 0 &&
-		info->src.box.width == dst_width &&
-		info->src.box.height == dst_height &&
-		/* Dst must be tiled. If it's not, we have to use a temporary
-		 * resource which is tiled. */
-		dst_tile_mode >= RADEON_SURF_MODE_1D;
-}
-
-static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
-			      unsigned offset, unsigned size, unsigned value);
-
-static void evergreen_set_clear_color(struct pipe_surface *cbuf,
-				      const union pipe_color_union *color)
-{
-	unsigned *clear_value = ((struct r600_texture *)cbuf->texture)->color_clear_value;
-	union util_color uc;
-
-	memset(&uc, 0, sizeof(uc));
-
-	if (util_format_is_pure_uint(cbuf->format)) {
-		util_format_write_4ui(cbuf->format, color->ui, 0, &uc, 0, 0, 0, 1, 1);
-	} else if (util_format_is_pure_sint(cbuf->format)) {
-		util_format_write_4i(cbuf->format, color->i, 0, &uc, 0, 0, 0, 1, 1);
-	} else {
-		util_pack_color(color->f, cbuf->format, &uc);
-	}
-
-	memcpy(clear_value, &uc, 2 * sizeof(uint32_t));
-}
-
-static void evergreen_check_alloc_cmask(struct pipe_context *ctx,
-                                        struct pipe_surface *cbuf)
-{
-        struct r600_context *rctx = (struct r600_context *)ctx;
-        struct r600_texture *tex = (struct r600_texture *)cbuf->texture;
-        struct r600_surface *surf = (struct r600_surface *)cbuf;
-
-        if (tex->cmask_buffer)
-                return;
-
-        r600_texture_init_cmask(&rctx->screen->b, tex);
-
-        /* update colorbuffer state bits */
-        if (tex->cmask_buffer != NULL) {
-                uint64_t va = r600_resource_va(rctx->b.b.screen, &tex->cmask_buffer->b.b);
-                surf->cb_color_cmask = va >> 8;
-                surf->cb_color_cmask_slice = S_028C80_TILE_MAX(tex->cmask.slice_tile_max);
-                surf->cb_color_info |= S_028C70_FAST_CLEAR(1);
-        }
-}
-
-static bool can_fast_clear_color(struct pipe_context *ctx)
-{
-	struct r600_context *rctx = (struct r600_context *)ctx;
-	struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
-	int i;
-
-	if (rctx->b.chip_class < EVERGREEN) {
-		return false;
-	}
-
-	for (i = 0; i < fb->nr_cbufs; i++) {
-		struct r600_texture *tex = (struct r600_texture *)fb->cbufs[i]->texture;
-
-		/* 128-bit formats are unuspported */
-		if (util_format_get_blocksizebits(fb->cbufs[i]->format) > 64) {
-			return false;
-		}
-
-		/* the clear is allowed if all layers are bound */
-		if (fb->cbufs[i]->u.tex.first_layer != 0 ||
-		    fb->cbufs[i]->u.tex.last_layer != util_max_layer(&tex->resource.b.b, 0)) {
-			return false;
-		}
-
-		/* cannot clear mipmapped textures */
-		if (fb->cbufs[i]->texture->last_level != 0) {
-			return false;
-		}
-
-		/* only supported on tiled surfaces */
-		if (tex->surface.level[0].mode < RADEON_SURF_MODE_1D) {
-		    return false;
-		}
-
-		/* ensure CMASK is enabled */
-		evergreen_check_alloc_cmask(ctx, fb->cbufs[i]);
-		if (tex->cmask.size == 0) {
-			return false;
-		}
-	}
-
-	return true;
-}
-
 static void r600_clear(struct pipe_context *ctx, unsigned buffers,
 		       const union pipe_color_union *color,
 		       double depth, unsigned stencil)
@@ -506,32 +410,30 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
 	struct r600_context *rctx = (struct r600_context *)ctx;
 	struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
 
-	/* fast clear on colorbuffers (EG+) */
-	if ((buffers & PIPE_CLEAR_COLOR) && can_fast_clear_color(ctx)) {
+	if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
+		evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
+					      &buffers, NULL, color);
+		if (!buffers)
+			return; /* all buffers have been fast cleared */
+	}
+
+	if (buffers & PIPE_CLEAR_COLOR) {
 		int i;
 
+		/* These buffers cannot use fast clear, make sure to disable expansion. */
 		for (i = 0; i < fb->nr_cbufs; i++) {
-			struct r600_texture *tex = (struct r600_texture *)fb->cbufs[i]->texture;
-
-			evergreen_set_clear_color(fb->cbufs[i], color);
-			r600_clear_buffer(ctx, &tex->cmask_buffer->b.b,
-					tex->cmask.offset, tex->cmask.size, 0);
-			tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
-		}
+			struct r600_texture *tex;
 
-		rctx->framebuffer.atom.dirty = true;
+			/* If not clearing this buffer, skip. */
+			if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
+				continue;
 
-		buffers &= ~PIPE_CLEAR_COLOR;
-		if (!buffers)
-			return;
-	} else if (buffers & PIPE_CLEAR_COLOR) {
-		int i;
+			if (!fb->cbufs[i])
+				continue;
 
-		/* cannot use fast clear, make sure to disable expansion */
-		for (i = 0; i < fb->nr_cbufs; i++) {
-			struct r600_texture *tex = (struct r600_texture *)fb->cbufs[i]->texture;
+			tex = (struct r600_texture *)fb->cbufs[i]->texture;
 			if (tex->fmask.size == 0)
-			    tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
+				tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
 		}
 	}
 
@@ -547,25 +449,28 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
 		 * disable fast clear for texture array.
 		 */
 		/* Only use htile for first level */
-		if (rtex->htile && !level && rtex->surface.array_size == 1) {
-			if (rtex->depth_clear != depth) {
-				rtex->depth_clear = depth;
-				rctx->db_state.atom.dirty = true;
+		if (rtex->htile_buffer && !level &&
+                   fb->zsbuf->u.tex.first_layer == 0 &&
+                   fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
+			if (rtex->depth_clear_value != depth) {
+				rtex->depth_clear_value = depth;
+				r600_mark_atom_dirty(rctx, &rctx->db_state.atom);
 			}
 			rctx->db_misc_state.htile_clear = true;
-			rctx->db_misc_state.atom.dirty = true;
+			r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 		}
 	}
 
 	r600_blitter_begin(ctx, R600_CLEAR);
-	util_blitter_clear(rctx->blitter, fb->width, fb->height, 1,
+	util_blitter_clear(rctx->blitter, fb->width, fb->height,
+			   util_framebuffer_get_num_layers(fb),
 			   buffers, color, depth, stencil);
 	r600_blitter_end(ctx);
 
 	/* disable fast clear */
 	if (rctx->db_misc_state.htile_clear) {
 		rctx->db_misc_state.htile_clear = false;
-		rctx->db_misc_state.atom.dirty = true;
+		r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 	}
 }
 
@@ -599,15 +504,15 @@ static void r600_clear_depth_stencil(struct pipe_context *ctx,
 	r600_blitter_end(ctx);
 }
 
-void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
-		      struct pipe_resource *src, const struct pipe_box *src_box)
+static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
+			     struct pipe_resource *src, const struct pipe_box *src_box)
 {
 	struct r600_context *rctx = (struct r600_context*)ctx;
 
-	if (rctx->screen->has_cp_dma) {
+	if (rctx->screen->b.has_cp_dma) {
 		r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
 	}
-	else if (rctx->screen->has_streamout &&
+	else if (rctx->screen->b.has_streamout &&
 		 /* Require 4-byte alignment. */
 		 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
 
@@ -617,48 +522,78 @@ void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsig
 	} else {
 		util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
 	}
+
+	/* The index buffer (VGT) doesn't seem to see the result of the copying.
+	 * Can we somehow flush the index buffer cache? Starting a new IB seems
+	 * to do the trick. */
+	if (rctx->b.chip_class <= R700)
+		rctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
 }
 
 /**
  * Global buffers are not really resources, they are are actually offsets
  * into a single global resource (r600_screen::global_pool).  The means
- * they don't have their own cs_buf handle, so they cannot be passed
+ * they don't have their own buf handle, so they cannot be passed
  * to r600_copy_buffer() and must be handled separately.
- *
- * XXX: It should be possible to implement this function using
- * r600_copy_buffer() by passing the memory_pool resource as both src
- * and dst and updating dstx and src_box to point to the correct offsets.
- * This would likely perform better than the current implementation.
  */
 static void r600_copy_global_buffer(struct pipe_context *ctx,
 				    struct pipe_resource *dst, unsigned
 				    dstx, struct pipe_resource *src,
 				    const struct pipe_box *src_box)
 {
-	struct pipe_box dst_box; struct pipe_transfer *src_pxfer,
-	*dst_pxfer;
-
-	u_box_1d(dstx, src_box->width, &dst_box);
-	void *src_ptr = ctx->transfer_map(ctx, src, 0, PIPE_TRANSFER_READ,
-					  src_box, &src_pxfer);
-	void *dst_ptr = ctx->transfer_map(ctx, dst, 0, PIPE_TRANSFER_WRITE,
-					  &dst_box, &dst_pxfer);
-	memcpy(dst_ptr, src_ptr, src_box->width);
-
-	ctx->transfer_unmap(ctx, src_pxfer);
-	ctx->transfer_unmap(ctx, dst_pxfer);
+	struct r600_context *rctx = (struct r600_context*)ctx;
+	struct compute_memory_pool *pool = rctx->screen->global_pool;
+	struct pipe_box new_src_box = *src_box;
+
+	if (src->bind & PIPE_BIND_GLOBAL) {
+		struct r600_resource_global *rsrc =
+			(struct r600_resource_global *)src;
+		struct compute_memory_item *item = rsrc->chunk;
+
+		if (is_item_in_pool(item)) {
+			new_src_box.x += 4 * item->start_in_dw;
+			src = (struct pipe_resource *)pool->bo;
+		} else {
+			if (item->real_buffer == NULL) {
+				item->real_buffer =
+					r600_compute_buffer_alloc_vram(pool->screen,
+								       item->size_in_dw * 4);
+			}
+			src = (struct pipe_resource*)item->real_buffer;
+		}
+	}
+	if (dst->bind & PIPE_BIND_GLOBAL) {
+		struct r600_resource_global *rdst =
+			(struct r600_resource_global *)dst;
+		struct compute_memory_item *item = rdst->chunk;
+
+		if (is_item_in_pool(item)) {
+			dstx += 4 * item->start_in_dw;
+			dst = (struct pipe_resource *)pool->bo;
+		} else {
+			if (item->real_buffer == NULL) {
+				item->real_buffer =
+					r600_compute_buffer_alloc_vram(pool->screen,
+								       item->size_in_dw * 4);
+			}
+			dst = (struct pipe_resource*)item->real_buffer;
+		}
+	}
+
+	r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
 }
 
 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
-			      unsigned offset, unsigned size, unsigned value)
+			      unsigned offset, unsigned size, unsigned value,
+			      bool is_framebuffer)
 {
 	struct r600_context *rctx = (struct r600_context*)ctx;
 
-	if (rctx->screen->has_cp_dma &&
+	if (rctx->screen->b.has_cp_dma &&
 	    rctx->b.chip_class >= EVERGREEN &&
 	    offset % 4 == 0 && size % 4 == 0) {
 		evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value);
-	} else if (rctx->screen->has_streamout && offset % 4 == 0 && size % 4 == 0) {
+	} else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
 		union pipe_color_union clear_value;
 		clear_value.ui[0] = value;
 
@@ -669,34 +604,26 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds
 	} else {
 		uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
 								 PIPE_TRANSFER_WRITE);
+		map += offset / 4;
 		size /= 4;
 		for (unsigned i = 0; i < size; i++)
 			*map++ = value;
 	}
 }
 
-static bool util_format_is_subsampled_2x1_32bpp(enum pipe_format format)
-{
-	const struct util_format_description *desc = util_format_description(format);
-
-	return desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED &&
-	       desc->block.width == 2 &&
-	       desc->block.height == 1 &&
-	       desc->block.bits == 32;
-}
-
-static void r600_resource_copy_region(struct pipe_context *ctx,
-				      struct pipe_resource *dst,
-				      unsigned dst_level,
-				      unsigned dstx, unsigned dsty, unsigned dstz,
-				      struct pipe_resource *src,
-				      unsigned src_level,
-				      const struct pipe_box *src_box)
+void r600_resource_copy_region(struct pipe_context *ctx,
+			       struct pipe_resource *dst,
+			       unsigned dst_level,
+			       unsigned dstx, unsigned dsty, unsigned dstz,
+			       struct pipe_resource *src,
+			       unsigned src_level,
+			       const struct pipe_box *src_box)
 {
 	struct r600_context *rctx = (struct r600_context *)ctx;
 	struct pipe_surface *dst_view, dst_templ;
 	struct pipe_sampler_view src_templ, *src_view;
 	unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
+	unsigned src_force_level = 0;
 	struct pipe_box sbox, dstbox;
 
 	/* Handle buffers first. */
@@ -729,7 +656,8 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
 	util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
 	util_blitter_default_src_texture(&src_templ, src, src_level);
 
-	if (util_format_is_compressed(src->format)) {
+	if (util_format_is_compressed(src->format) ||
+	    util_format_is_compressed(dst->format)) {
 		unsigned blocksize = util_format_get_blocksize(src->format);
 
 		if (blocksize == 8)
@@ -755,9 +683,10 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
 		sbox.height = util_format_get_nblocksy(src->format, src_box->height);
 		sbox.depth = src_box->depth;
 		src_box = &sbox;
-	} else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src,
-						   PIPE_MASK_RGBAZS)) {
-		if (util_format_is_subsampled_2x1_32bpp(src->format)) {
+
+		src_force_level = src_level;
+	} else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
+		if (util_format_is_subsampled_422(src->format)) {
 
 			src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
 			dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
@@ -808,7 +737,8 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
 
 	if (rctx->b.chip_class >= EVERGREEN) {
 		src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
-								src_width0, src_height0);
+								src_width0, src_height0,
+								src_force_level);
 	} else {
 		src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
 							   src_widthFL, src_heightFL);
@@ -822,7 +752,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
 	util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
 				  src_view, src_box, src_width0, src_height0,
 				  PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
-				  TRUE);
+				  FALSE);
 	r600_blitter_end(ctx);
 
 	pipe_surface_reference(&dst_view, NULL);
@@ -865,67 +795,53 @@ static enum pipe_format int_to_norm_format(enum pipe_format format)
 	}
 }
 
-static void r600_msaa_color_resolve(struct pipe_context *ctx,
-			      const struct pipe_blit_info *info)
+static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
+				     const struct pipe_blit_info *info)
 {
-	struct r600_context *rctx = (struct r600_context *)ctx;
-	struct pipe_screen *screen = ctx->screen;
-	struct pipe_resource *tmp, templ;
-	struct pipe_blit_info blit;
+	struct r600_context *rctx = (struct r600_context*)ctx;
+	struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
+	unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
+	unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
+	enum pipe_format format = int_to_norm_format(info->dst.format);
 	unsigned sample_mask =
 		rctx->b.chip_class == CAYMAN ? ~0 :
 		((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
 
-	assert(info->src.level == 0);
-	assert(info->src.box.depth == 1);
-	assert(info->dst.box.depth == 1);
-
-	if (is_simple_msaa_resolve(info)) {
-		r600_blitter_begin(ctx, R600_COLOR_RESOLVE);
+	if (info->src.resource->nr_samples > 1 &&
+	    info->dst.resource->nr_samples <= 1 &&
+	    util_max_layer(info->src.resource, 0) == 0 &&
+	    util_max_layer(info->dst.resource, info->dst.level) == 0 &&
+	    info->dst.format == info->src.format &&
+	    !util_format_is_pure_integer(format) &&
+	    !util_format_is_depth_or_stencil(format) &&
+	    !info->scissor_enable &&
+	    (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
+	    dst_width == info->src.resource->width0 &&
+	    dst_height == info->src.resource->height0 &&
+	    info->dst.box.x == 0 &&
+	    info->dst.box.y == 0 &&
+	    info->dst.box.width == dst_width &&
+	    info->dst.box.height == dst_height &&
+	    info->dst.box.depth == 1 &&
+	    info->src.box.x == 0 &&
+	    info->src.box.y == 0 &&
+	    info->src.box.width == dst_width &&
+	    info->src.box.height == dst_height &&
+	    info->src.box.depth == 1 &&
+	    dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
+	    (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
+		r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
+				   (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
 		util_blitter_custom_resolve_color(rctx->blitter,
 						  info->dst.resource, info->dst.level,
 						  info->dst.box.z,
 						  info->src.resource, info->src.box.z,
 						  sample_mask, rctx->custom_blend_resolve,
-                                                  int_to_norm_format(info->dst.format));
+						  format);
 		r600_blitter_end(ctx);
-		return;
+		return true;
 	}
-
-	/* resolve into a temporary texture, then blit */
-	templ.target = PIPE_TEXTURE_2D;
-	templ.format = info->src.resource->format;
-	templ.width0 = info->src.resource->width0;
-	templ.height0 = info->src.resource->height0;
-	templ.depth0 = 1;
-	templ.array_size = 1;
-	templ.last_level = 0;
-	templ.nr_samples = 0;
-	templ.usage = PIPE_USAGE_STATIC;
-	templ.bind = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW;
-	templ.flags = R600_RESOURCE_FLAG_FORCE_TILING; /* dst must not have a linear layout */
-
-	tmp = screen->resource_create(screen, &templ);
-
-	/* resolve */
-	r600_blitter_begin(ctx, R600_COLOR_RESOLVE);
-	util_blitter_custom_resolve_color(rctx->blitter,
-					  tmp, 0, 0,
-					  info->src.resource, info->src.box.z,
-					  sample_mask, rctx->custom_blend_resolve,
-                                          int_to_norm_format(tmp->format));
-	r600_blitter_end(ctx);
-
-	/* blit */
-	blit = *info;
-	blit.src.resource = tmp;
-	blit.src.box.z = 0;
-
-	r600_blitter_begin(ctx, R600_BLIT);
-	util_blitter_blit(rctx->blitter, &blit);
-	r600_blitter_end(ctx);
-
-	pipe_resource_reference(&tmp, NULL);
+	return false;
 }
 
 static void r600_blit(struct pipe_context *ctx,
@@ -933,16 +849,12 @@ static void r600_blit(struct pipe_context *ctx,
 {
 	struct r600_context *rctx = (struct r600_context*)ctx;
 
-	assert(util_blitter_is_blit_supported(rctx->blitter, info));
-
-	if (info->src.resource->nr_samples > 1 &&
-	    info->dst.resource->nr_samples <= 1 &&
-	    !util_format_is_depth_or_stencil(info->src.resource->format) &&
-	    !util_format_is_pure_integer(int_to_norm_format(info->src.resource->format))) {
-		r600_msaa_color_resolve(ctx, info);
+	if (do_hardware_msaa_resolve(ctx, info)) {
 		return;
 	}
 
+	assert(util_blitter_is_blit_supported(rctx->blitter, info));
+
 	/* The driver doesn't decompress resources automatically while
 	 * u_blitter is rendering. */
 	if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
@@ -951,7 +863,12 @@ static void r600_blit(struct pipe_context *ctx,
 		return; /* error */
 	}
 
-	r600_blitter_begin(ctx, R600_BLIT);
+	if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
+	    util_try_blit_via_copy_region(ctx, info))
+		return;
+
+	r600_blitter_begin(ctx, R600_BLIT |
+			   (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
 	util_blitter_blit(rctx->blitter, info);
 	r600_blitter_end(ctx);
 }
@@ -965,7 +882,7 @@ static void r600_flush_resource(struct pipe_context *ctx,
 
 	if (!rtex->is_depth && rtex->cmask.size) {
 		r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
-					   0, res->array_size - 1);
+					   0, util_max_layer(res, 0));
 	}
 }