X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fr600_pipe.h;h=bb4e429aeb203ea225f4895263c4764ff1e21a08;hb=df27320560cfef439aa299dcea12b900195294c3;hp=eb25e357a75984d1dde9916dba670cc0492a31dd;hpb=5bbeae7a3d3be17d44b1bc851872a107a75c393b;p=mesa.git diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index eb25e357a75..bb4e429aeb2 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -35,9 +35,7 @@ #include "r600_public.h" #include "r600_resource.h" -#define R600_NUM_ATOMS 40 - -#define R600_TRACE_CS 0 +#define R600_NUM_ATOMS 41 /* the number of CS dwords for flushing and drawing */ #define R600_MAX_FLUSH_CS_DWORDS 16 @@ -245,7 +243,8 @@ typedef boolean (*r600g_dma_blit_t)(struct pipe_context *ctx, /* logging */ #define DBG_TEX_DEPTH (1 << 0) #define DBG_COMPUTE (1 << 1) -#define DBG_VM (1 << 2) +#define DBG_VM (1 << 2) +#define DBG_TRACE_CS (1 << 3) /* shaders */ #define DBG_FS (1 << 8) #define DBG_VS (1 << 9) @@ -258,6 +257,14 @@ typedef boolean (*r600g_dma_blit_t)(struct pipe_context *ctx, #define DBG_NO_CP_DMA (1 << 18) #define DBG_NO_ASYNC_DMA (1 << 19) #define DBG_NO_DISCARD_RANGE (1 << 20) +/* shader backend */ +#define DBG_SB (1 << 21) +#define DBG_SB_CS (1 << 22) +#define DBG_SB_DRY_RUN (1 << 23) +#define DBG_SB_STAT (1 << 24) +#define DBG_SB_DUMP (1 << 25) +#define DBG_SB_NO_FALLBACK (1 << 26) +#define DBG_SB_DISASM (1 << 27) struct r600_tiling_info { unsigned num_channels; @@ -284,11 +291,9 @@ struct r600_screen { * XXX: Not sure if this is the best place for global_pool. Also, * it's not thread safe, so it won't work with multiple contexts. */ struct compute_memory_pool *global_pool; -#if R600_TRACE_CS struct r600_resource *trace_bo; uint32_t *trace_ptr; unsigned cs_count; -#endif r600g_dma_blit_t dma_blit; /* Auxiliary context. Mainly used to initialize resources. @@ -643,6 +648,7 @@ struct r600_context { unsigned current_render_cond_mode; boolean predicate_drawing; + void *sb_context; struct r600_isa *isa; }; @@ -654,19 +660,15 @@ static INLINE void r600_emit_command_buffer(struct radeon_winsys_cs *cs, cs->cdw += cb->num_dw; } -#if R600_TRACE_CS void r600_trace_emit(struct r600_context *rctx); -#endif static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom) { atom->emit(rctx, atom); atom->dirty = false; -#if R600_TRACE_CS if (rctx->screen->trace_bo) { r600_trace_emit(rctx); } -#endif } static INLINE void r600_set_cso_state(struct r600_cso_state *state, void *cso) @@ -909,6 +911,9 @@ struct pipe_video_decoder *r600_uvd_create_decoder(struct pipe_context *context, struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe, const struct pipe_video_buffer *tmpl); +int r600_uvd_get_video_param(struct pipe_screen *screen, + enum pipe_video_profile profile, + enum pipe_video_cap param); /* * Helpers for building command buffers @@ -1120,6 +1125,15 @@ static INLINE void r600_write_compute_context_reg(struct radeon_winsys_cs *cs, u r600_write_value(cs, value); } +static INLINE void r600_write_context_reg_flag(struct radeon_winsys_cs *cs, unsigned reg, unsigned value, unsigned flag) +{ + if (flag & RADEON_CP_PACKET3_COMPUTE_MODE) { + r600_write_compute_context_reg(cs, reg, value); + } else { + r600_write_context_reg(cs, reg, value); + } + +} static INLINE void r600_write_ctl_const(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) { r600_write_ctl_const_seq(cs, reg, 1);