X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fr600_shader.c;h=f0d3be405d23ae089f1317cb120261c807fa3eb6;hb=2cd769179345799d383f92dd615991755ec24be1;hp=c16e467c853bbcb489aec1ca5b94f230c87ea359;hpb=33dc412b8901ec6b693644a40b1cd62a2cde2e99;p=mesa.git diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index c16e467c853..f0d3be405d2 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -58,56 +58,37 @@ issued in the w slot as well. The compiler must issue the source argument to slots z, y, and x */ -static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *shader) +static int r600_shader_from_tgsi(struct r600_screen *rscreen, + struct r600_pipe_shader *pipeshader, + struct r600_shader_key key); + +static unsigned tgsi_get_processor_type(const struct tgsi_token *tokens) { - struct r600_context *rctx = (struct r600_context *)ctx; - struct r600_shader *rshader = &shader->shader; - uint32_t *ptr; - int i; + struct tgsi_parse_context parse; - /* copy new shader */ - if (shader->bo == NULL) { - shader->bo = (struct r600_resource*) - pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, rshader->bc.ndw * 4); - if (shader->bo == NULL) { - return -ENOMEM; - } - ptr = r600_buffer_mmap_sync_with_rings(rctx, shader->bo, PIPE_TRANSFER_WRITE); - if (R600_BIG_ENDIAN) { - for (i = 0; i < rshader->bc.ndw; ++i) { - ptr[i] = bswap_32(rshader->bc.bytecode[i]); - } - } else { - memcpy(ptr, rshader->bc.bytecode, rshader->bc.ndw * sizeof(*ptr)); - } - rctx->ws->buffer_unmap(shader->bo->cs_buf); + if (tgsi_parse_init( &parse, tokens ) != TGSI_PARSE_OK) { + debug_printf("tgsi_parse_init() failed in %s:%i!\n", __func__, __LINE__); + return ~0; } - /* build state */ - switch (rshader->processor_type) { + return parse.FullHeader.Processor.Processor; +} + +static bool r600_can_dump_shader(struct r600_screen *rscreen, unsigned processor_type) +{ + switch (processor_type) { case TGSI_PROCESSOR_VERTEX: - if (rctx->chip_class >= EVERGREEN) { - evergreen_pipe_shader_vs(ctx, shader); - } else { - r600_pipe_shader_vs(ctx, shader); - } - break; + return (rscreen->debug_flags & DBG_VS) != 0; + case TGSI_PROCESSOR_GEOMETRY: + return (rscreen->debug_flags & DBG_GS) != 0; case TGSI_PROCESSOR_FRAGMENT: - if (rctx->chip_class >= EVERGREEN) { - evergreen_pipe_shader_ps(ctx, shader); - } else { - r600_pipe_shader_ps(ctx, shader); - } - break; + return (rscreen->debug_flags & DBG_PS) != 0; + case TGSI_PROCESSOR_COMPUTE: + return (rscreen->debug_flags & DBG_CS) != 0; default: - return -EINVAL; + return false; } - return 0; } -static int r600_shader_from_tgsi(struct r600_screen *rscreen, - struct r600_pipe_shader *pipeshader, - struct r600_shader_key key); - static void r600_dump_streamout(struct pipe_stream_output_info *so) { unsigned i; @@ -132,17 +113,15 @@ int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader, struct r600_shader_key key) { - static int dump_shaders = -1; struct r600_context *rctx = (struct r600_context *)ctx; struct r600_pipe_shader_selector *sel = shader->selector; - int r; + int r, i; + uint32_t *ptr; + bool dump = r600_can_dump_shader(rctx->screen, tgsi_get_processor_type(sel->tokens)); - /* Would like some magic "get_bool_option_once" routine. - */ - if (dump_shaders == -1) - dump_shaders = debug_get_bool_option("R600_DUMP_SHADERS", FALSE); + shader->shader.bc.isa = rctx->isa; - if (dump_shaders) { + if (dump) { fprintf(stderr, "--------------------------------------------------------------\n"); tgsi_dump(sel->tokens, 0); @@ -160,17 +139,58 @@ int r600_pipe_shader_create(struct pipe_context *ctx, R600_ERR("building bytecode failed !\n"); return r; } - if (dump_shaders) { - r600_bytecode_dump(&shader->shader.bc); + if (dump) { + fprintf(stderr, "--------------------------------------------------------------\n"); + r600_bytecode_disasm(&shader->shader.bc); fprintf(stderr, "______________________________________________________________\n"); } - return r600_pipe_shader(ctx, shader); + + + /* Store the shader in a buffer. */ + if (shader->bo == NULL) { + shader->bo = (struct r600_resource*) + pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, shader->shader.bc.ndw * 4); + if (shader->bo == NULL) { + return -ENOMEM; + } + ptr = r600_buffer_mmap_sync_with_rings(rctx, shader->bo, PIPE_TRANSFER_WRITE); + if (R600_BIG_ENDIAN) { + for (i = 0; i < shader->shader.bc.ndw; ++i) { + ptr[i] = bswap_32(shader->shader.bc.bytecode[i]); + } + } else { + memcpy(ptr, shader->shader.bc.bytecode, shader->shader.bc.ndw * sizeof(*ptr)); + } + rctx->ws->buffer_unmap(shader->bo->cs_buf); + } + + /* Build state. */ + switch (shader->shader.processor_type) { + case TGSI_PROCESSOR_VERTEX: + if (rctx->chip_class >= EVERGREEN) { + evergreen_update_vs_state(ctx, shader); + } else { + r600_update_vs_state(ctx, shader); + } + break; + case TGSI_PROCESSOR_FRAGMENT: + if (rctx->chip_class >= EVERGREEN) { + evergreen_update_ps_state(ctx, shader); + } else { + r600_update_ps_state(ctx, shader); + } + break; + default: + return -EINVAL; + } + return 0; } void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader) { pipe_resource_reference((struct pipe_resource**)&shader->bo, NULL); r600_bytecode_clear(&shader->shader.bc); + r600_release_command_buffer(&shader->command_buffer); } /* @@ -219,13 +239,13 @@ struct r600_shader_ctx { struct r600_shader_tgsi_instruction { unsigned tgsi_opcode; unsigned is_op3; - unsigned r600_opcode; + unsigned op; int (*process)(struct r600_shader_ctx *ctx); }; static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[], eg_shader_tgsi_instruction[], cm_shader_tgsi_instruction[]; static int tgsi_helper_tempx_replicate(struct r600_shader_ctx *ctx); -static inline void callstack_check_depth(struct r600_shader_ctx *ctx, unsigned reason, unsigned check_max_only); +static inline void callstack_push(struct r600_shader_ctx *ctx, unsigned reason); static void fc_pushlevel(struct r600_shader_ctx *ctx, int type); static int tgsi_else(struct r600_shader_ctx *ctx); static int tgsi_endif(struct r600_shader_ctx *ctx); @@ -251,24 +271,23 @@ int r600_compute_shader_create(struct pipe_context * ctx, unsigned char * bytes; unsigned byte_count; struct r600_shader_ctx shader_ctx; - unsigned dump = 0; - - if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE)) { - dump = 1; - } + boolean use_kill = false; + bool dump = (r600_ctx->screen->debug_flags & DBG_CS) != 0; - r600_llvm_compile(mod, &bytes, &byte_count, r600_ctx->family , dump); shader_ctx.bc = bytecode; r600_bytecode_init(shader_ctx.bc, r600_ctx->chip_class, r600_ctx->family, r600_ctx->screen->msaa_texture_support); shader_ctx.bc->type = TGSI_PROCESSOR_COMPUTE; + shader_ctx.bc->isa = r600_ctx->isa; + r600_llvm_compile(mod, &bytes, &byte_count, r600_ctx->family, + shader_ctx.bc, &use_kill, dump); r600_bytecode_from_byte_stream(&shader_ctx, bytes, byte_count); if (shader_ctx.bc->chip_class == CAYMAN) { cm_bytecode_add_cf_end(shader_ctx.bc); } r600_bytecode_build(shader_ctx.bc); if (dump) { - r600_bytecode_dump(shader_ctx.bc); + r600_bytecode_disasm(shader_ctx.bc); } free(bytes); return 1; @@ -312,6 +331,7 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx, unsigned src_idx, src_num; struct r600_bytecode_alu alu; unsigned src_use_sel[3]; + const struct alu_op_info *alu_op; unsigned src_sel[3] = {}; uint32_t word0, word1; @@ -335,12 +355,12 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx, switch(ctx->bc->chip_class) { default: case R600: - r600_bytecode_alu_read(&alu, word0, word1); + r600_bytecode_alu_read(ctx->bc, &alu, word0, word1); break; case R700: case EVERGREEN: case CAYMAN: - r700_bytecode_alu_read(&alu, word0, word1); + r700_bytecode_alu_read(ctx->bc, &alu, word0, word1); break; } @@ -362,11 +382,10 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx, } } + alu_op = r600_isa_alu(alu.op); + #if HAVE_LLVM < 0x0302 - if (alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE) || - alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE) || - alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT) || - alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT)) { + if ((alu_op->flags & AF_PRED) && alu_op->src_count == 2) { alu.update_pred = 1; alu.dst.write = 0; alu.src[1].sel = V_SQ_ALU_SRC_0; @@ -375,22 +394,17 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx, } #endif - if (alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT)) { + if (alu_op->flags & AF_MOVA) { ctx->bc->ar_reg = alu.src[0].sel; ctx->bc->ar_chan = alu.src[0].chan; ctx->bc->ar_loaded = 0; return bytes_read; } - if (alu.execute_mask) { - alu.pred_sel = 0; - r600_bytecode_add_alu_type(ctx->bc, &alu, CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE)); - } else { - r600_bytecode_add_alu(ctx->bc, &alu); - } + r600_bytecode_add_alu_type(ctx->bc, &alu, ctx->bc->cf_last->op); /* XXX: Handle other KILL instructions */ - if (alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT)) { + if (alu_op->flags & AF_KILL) { ctx->shader->uses_kill = 1; /* XXX: This should be enforced in the LLVM backend. */ ctx->bc->force_add_cf = 1; @@ -400,9 +414,9 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx, static void llvm_if(struct r600_shader_ctx *ctx) { - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_JUMP); fc_pushlevel(ctx, FC_IF); - callstack_check_depth(ctx, FC_PUSH_VPM, 0); + callstack_push(ctx, FC_PUSH_VPM); } static void r600_break_from_byte_stream(struct r600_shader_ctx *ctx) @@ -472,29 +486,36 @@ static unsigned r600_tex_from_byte_stream(struct r600_shader_ctx *ctx, { struct r600_bytecode_tex tex; - tex.inst = bytes[bytes_read++]; - tex.resource_id = bytes[bytes_read++]; - tex.src_gpr = bytes[bytes_read++]; - tex.src_rel = bytes[bytes_read++]; - tex.dst_gpr = bytes[bytes_read++]; - tex.dst_rel = bytes[bytes_read++]; - tex.dst_sel_x = bytes[bytes_read++]; - tex.dst_sel_y = bytes[bytes_read++]; - tex.dst_sel_z = bytes[bytes_read++]; - tex.dst_sel_w = bytes[bytes_read++]; - tex.lod_bias = bytes[bytes_read++]; - tex.coord_type_x = bytes[bytes_read++]; - tex.coord_type_y = bytes[bytes_read++]; - tex.coord_type_z = bytes[bytes_read++]; - tex.coord_type_w = bytes[bytes_read++]; - tex.offset_x = bytes[bytes_read++]; - tex.offset_y = bytes[bytes_read++]; - tex.offset_z = bytes[bytes_read++]; - tex.sampler_id = bytes[bytes_read++]; - tex.src_sel_x = bytes[bytes_read++]; - tex.src_sel_y = bytes[bytes_read++]; - tex.src_sel_z = bytes[bytes_read++]; - tex.src_sel_w = bytes[bytes_read++]; + uint32_t word0 = i32_from_byte_stream(bytes, &bytes_read); + uint32_t word1 = i32_from_byte_stream(bytes, &bytes_read); + uint32_t word2 = i32_from_byte_stream(bytes, &bytes_read); + + tex.op = r600_isa_fetch_by_opcode(ctx->bc->isa, G_SQ_TEX_WORD0_TEX_INST(word0)); + tex.resource_id = G_SQ_TEX_WORD0_RESOURCE_ID(word0); + tex.src_gpr = G_SQ_TEX_WORD0_SRC_GPR(word0); + tex.src_rel = G_SQ_TEX_WORD0_SRC_REL(word0); + tex.dst_gpr = G_SQ_TEX_WORD1_DST_GPR(word1); + tex.dst_rel = G_SQ_TEX_WORD1_DST_REL(word1); + tex.dst_sel_x = G_SQ_TEX_WORD1_DST_SEL_X(word1); + tex.dst_sel_y = G_SQ_TEX_WORD1_DST_SEL_Y(word1); + tex.dst_sel_z = G_SQ_TEX_WORD1_DST_SEL_Z(word1); + tex.dst_sel_w = G_SQ_TEX_WORD1_DST_SEL_W(word1); + tex.lod_bias = G_SQ_TEX_WORD1_LOD_BIAS(word1); + tex.coord_type_x = G_SQ_TEX_WORD1_COORD_TYPE_X(word1); + tex.coord_type_y = G_SQ_TEX_WORD1_COORD_TYPE_Y(word1); + tex.coord_type_z = G_SQ_TEX_WORD1_COORD_TYPE_Z(word1); + tex.coord_type_w = G_SQ_TEX_WORD1_COORD_TYPE_W(word1); + tex.offset_x = G_SQ_TEX_WORD2_OFFSET_X(word2); + tex.offset_y = G_SQ_TEX_WORD2_OFFSET_Y(word2); + tex.offset_z = G_SQ_TEX_WORD2_OFFSET_Z(word2); + tex.sampler_id = G_SQ_TEX_WORD2_SAMPLER_ID(word2); + tex.src_sel_x = G_SQ_TEX_WORD2_SRC_SEL_X(word2); + tex.src_sel_y = G_SQ_TEX_WORD2_SRC_SEL_Y(word2); + tex.src_sel_z = G_SQ_TEX_WORD2_SRC_SEL_Z(word2); + tex.src_sel_w = G_SQ_TEX_WORD2_SRC_SEL_W(word2); + tex.offset_x <<= 1; + tex.offset_y <<= 1; + tex.offset_z <<= 1; tex.inst_mod = 0; @@ -515,7 +536,8 @@ static int r600_vtx_from_byte_stream(struct r600_shader_ctx *ctx, memset(&vtx, 0, sizeof(vtx)); /* WORD0 */ - vtx.inst = G_SQ_VTX_WORD0_VTX_INST(word0); + vtx.op = r600_isa_fetch_by_opcode(ctx->bc->isa, + G_SQ_VTX_WORD0_VTX_INST(word0)); vtx.fetch_type = G_SQ_VTX_WORD0_FETCH_TYPE(word0); vtx.buffer_id = G_SQ_VTX_WORD0_BUFFER_ID(word0); vtx.src_gpr = G_SQ_VTX_WORD0_SRC_GPR(word0); @@ -545,7 +567,7 @@ static int r600_vtx_from_byte_stream(struct r600_shader_ctx *ctx, /* Use the Texture Cache for compute shaders*/ if (ctx->bc->chip_class >= EVERGREEN && ctx->bc->type == TGSI_PROCESSOR_COMPUTE) { - ctx->bc->cf_last->inst = EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX; + ctx->bc->cf_last->op = CF_OP_TEX; } return bytes_read; } @@ -559,9 +581,9 @@ static int r600_export_from_byte_stream(struct r600_shader_ctx *ctx, word0 = i32_from_byte_stream(bytes, &bytes_read); word1 = i32_from_byte_stream(bytes, &bytes_read); if (ctx->bc->chip_class >= EVERGREEN) - eg_bytecode_export_read(&output, word0,word1); + eg_bytecode_export_read(ctx->bc, &output, word0,word1); else - r600_bytecode_export_read(&output, word0,word1); + r600_bytecode_export_read(ctx->bc, &output, word0,word1); r600_bytecode_add_output(ctx->bc, &output); return bytes_read; } @@ -604,6 +626,20 @@ static void r600_bytecode_from_byte_stream(struct r600_shader_ctx *ctx, bytes_read = r600_export_from_byte_stream(ctx, bytes, bytes_read); break; + case 6: { + int32_t word0 = i32_from_byte_stream(bytes, &bytes_read); + int32_t word1 = i32_from_byte_stream(bytes, &bytes_read); + + r600_bytecode_add_cf(ctx->bc); + ctx->bc->cf_last->op = r600_isa_cf_by_opcode(ctx->bc->isa, G_SQ_CF_ALU_WORD1_CF_INST(word1), 1); + ctx->bc->cf_last->kcache[0].bank = G_SQ_CF_ALU_WORD0_KCACHE_BANK0(word0); + ctx->bc->cf_last->kcache[0].addr = G_SQ_CF_ALU_WORD1_KCACHE_ADDR0(word1); + ctx->bc->cf_last->kcache[0].mode = G_SQ_CF_ALU_WORD0_KCACHE_MODE0(word0); + ctx->bc->cf_last->kcache[1].bank = G_SQ_CF_ALU_WORD0_KCACHE_BANK1(word0); + ctx->bc->cf_last->kcache[1].addr = G_SQ_CF_ALU_WORD1_KCACHE_ADDR1(word1); + ctx->bc->cf_last->kcache[1].mode = G_SQ_CF_ALU_WORD1_KCACHE_MODE1(word1); + break; + } default: /* XXX: Error here */ break; @@ -650,19 +686,15 @@ static int tgsi_is_supported(struct r600_shader_ctx *ctx) return 0; } -static int evergreen_interp_alu(struct r600_shader_ctx *ctx, int input) +static void evergreen_interp_assign_ij_index(struct r600_shader_ctx *ctx, + int input) { - int i, r; - struct r600_bytecode_alu alu; - int gpr = 0, base_chan = 0; int ij_index = 0; if (ctx->shader->input[input].interpolate == TGSI_INTERPOLATE_PERSPECTIVE) { - ij_index = 0; if (ctx->shader->input[input].centroid) ij_index++; } else if (ctx->shader->input[input].interpolate == TGSI_INTERPOLATE_LINEAR) { - ij_index = 0; /* if we have perspective add one */ if (ctx->input_perspective) { ij_index++; @@ -674,6 +706,16 @@ static int evergreen_interp_alu(struct r600_shader_ctx *ctx, int input) ij_index++; } + ctx->shader->input[input].ij_index = ij_index; +} + +static int evergreen_interp_alu(struct r600_shader_ctx *ctx, int input) +{ + int i, r; + struct r600_bytecode_alu alu; + int gpr = 0, base_chan = 0; + int ij_index = ctx->shader->input[input].ij_index; + /* work out gpr and base_chan from index */ gpr = ij_index / 2; base_chan = (2 * (ij_index % 2)) + 1; @@ -682,9 +724,9 @@ static int evergreen_interp_alu(struct r600_shader_ctx *ctx, int input) memset(&alu, 0, sizeof(struct r600_bytecode_alu)); if (i < 4) - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW; + alu.op = ALU_OP2_INTERP_ZW; else - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY; + alu.op = ALU_OP2_INTERP_XY; if ((i > 1) && (i < 6)) { alu.dst.sel = ctx->shader->input[input].gpr; @@ -716,7 +758,7 @@ static int evergreen_interp_flat(struct r600_shader_ctx *ctx, int input) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0; + alu.op = ALU_OP1_INTERP_LOAD_P0; alu.dst.sel = ctx->shader->input[input].gpr; alu.dst.write = 1; @@ -806,12 +848,13 @@ static int evergreen_interp_input(struct r600_shader_ctx *ctx, int index) if (ctx->shader->input[index].spi_sid) { ctx->shader->input[index].lds_pos = ctx->shader->nlds++; - if (!ctx->use_llvm) { - if (ctx->shader->input[index].interpolate > 0) { + if (ctx->shader->input[index].interpolate > 0) { + evergreen_interp_assign_ij_index(ctx, index); + if (!ctx->use_llvm) r = evergreen_interp_alu(ctx, index); - } else { + } else { + if (!ctx->use_llvm) r = evergreen_interp_flat(ctx, index); - } } } return r; @@ -826,7 +869,7 @@ static int select_twoside_color(struct r600_shader_ctx *ctx, int front, int back for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT); + alu.op = ALU_OP3_CNDGT; alu.is_op3 = 1; alu.dst.write = 1; alu.dst.sel = gpr_front; @@ -849,19 +892,19 @@ static int select_twoside_color(struct r600_shader_ctx *ctx, int front, int back static int tgsi_declaration(struct r600_shader_ctx *ctx) { struct tgsi_full_declaration *d = &ctx->parse.FullToken.FullDeclaration; - unsigned i; - int r; + int r, i, j, count = d->Range.Last - d->Range.First + 1; switch (d->Declaration.File) { case TGSI_FILE_INPUT: - i = ctx->shader->ninput++; + i = ctx->shader->ninput; + ctx->shader->ninput += count; ctx->shader->input[i].name = d->Semantic.Name; ctx->shader->input[i].sid = d->Semantic.Index; - ctx->shader->input[i].spi_sid = r600_spi_sid(&ctx->shader->input[i]); ctx->shader->input[i].interpolate = d->Interp.Interpolate; ctx->shader->input[i].centroid = d->Interp.Centroid; ctx->shader->input[i].gpr = ctx->file_offset[TGSI_FILE_INPUT] + d->Range.First; if (ctx->type == TGSI_PROCESSOR_FRAGMENT) { + ctx->shader->input[i].spi_sid = r600_spi_sid(&ctx->shader->input[i]); switch (ctx->shader->input[i].name) { case TGSI_SEMANTIC_FACE: ctx->face_gpr = ctx->shader->input[i].gpr; @@ -878,16 +921,20 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx) return r; } } + for (j = 1; j < count; ++j) { + ctx->shader->input[i + j] = ctx->shader->input[i]; + ctx->shader->input[i + j].gpr += j; + } break; case TGSI_FILE_OUTPUT: i = ctx->shader->noutput++; ctx->shader->output[i].name = d->Semantic.Name; ctx->shader->output[i].sid = d->Semantic.Index; - ctx->shader->output[i].spi_sid = r600_spi_sid(&ctx->shader->output[i]); ctx->shader->output[i].gpr = ctx->file_offset[TGSI_FILE_OUTPUT] + d->Range.First; ctx->shader->output[i].interpolate = d->Interp.Interpolate; ctx->shader->output[i].write_mask = d->Declaration.UsageMask; if (ctx->type == TGSI_PROCESSOR_VERTEX) { + ctx->shader->output[i].spi_sid = r600_spi_sid(&ctx->shader->output[i]); switch (d->Semantic.Name) { case TGSI_SEMANTIC_CLIPDIST: ctx->shader->clip_dist_write |= d->Declaration.UsageMask << (d->Semantic.Index << 2); @@ -921,7 +968,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx) struct r600_bytecode_alu alu; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT); + alu.op = ALU_OP1_INT_TO_FLT; alu.src[0].sel = 0; alu.src[0].chan = 3; @@ -1059,7 +1106,7 @@ static int tgsi_fetch_rel_const(struct r600_shader_ctx *ctx, unsigned int cb_idx memset(&alu, 0, sizeof(alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT); + alu.op = ALU_OP2_ADD_INT; alu.src[0].sel = ctx->bc->ar_reg; alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; @@ -1129,7 +1176,7 @@ static int tgsi_split_constant(struct r600_shader_ctx *ctx) int treg = r600_get_temp(ctx); for (k = 0; k < 4; k++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = ctx->src[i].sel; alu.src[0].chan = k; alu.src[0].rel = ctx->src[i].rel; @@ -1167,7 +1214,7 @@ static int tgsi_split_literal_constant(struct r600_shader_ctx *ctx) int treg = r600_get_temp(ctx); for (k = 0; k < 4; k++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = ctx->src[i].sel; alu.src[0].chan = k; alu.src[0].value = ctx->src[i].value[k]; @@ -1193,17 +1240,9 @@ static int process_twoside_color_inputs(struct r600_shader_ctx *ctx) for (i = 0; i < count; i++) { if (ctx->shader->input[i].name == TGSI_SEMANTIC_COLOR) { - unsigned back_facing_reg = ctx->shader->input[i].potential_back_facing_reg; - if (ctx->bc->chip_class >= EVERGREEN) { - if ((r = evergreen_interp_input(ctx, back_facing_reg))) - return r; - } - - if (!ctx->use_llvm) { - r = select_twoside_color(ctx, i, back_facing_reg); - if (r) - return r; - } + r = select_twoside_color(ctx, i, ctx->shader->input[i].back_color_input); + if (r) + return r; } } return 0; @@ -1230,7 +1269,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, unsigned inst_byte_count = 0; #ifdef R600_USE_LLVM - use_llvm = debug_get_bool_option("R600_LLVM", TRUE); + use_llvm = !(rscreen->debug_flags & DBG_NO_LLVM); #endif ctx.bc = &shader->bc; ctx.shader = shader; @@ -1281,11 +1320,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, } if (ctx.type == TGSI_PROCESSOR_VERTEX) { ctx.file_offset[TGSI_FILE_INPUT] = 1; - if (ctx.bc->chip_class >= EVERGREEN) { - r600_bytecode_add_cfinst(ctx.bc, EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS); - } else { - r600_bytecode_add_cfinst(ctx.bc, V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS); - } + r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS); } if (ctx.type == TGSI_PROCESSOR_FRAGMENT && ctx.bc->chip_class >= EVERGREEN) { ctx.file_offset[TGSI_FILE_INPUT] = evergreen_gpr_count(&ctx); @@ -1396,7 +1431,11 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, // TGSI to LLVM needs to know the lds position of inputs. // Non LLVM path computes it later (in process_twoside_color) ctx.shader->input[ni].lds_pos = next_lds_loc++; - ctx.shader->input[i].potential_back_facing_reg = ni; + ctx.shader->input[i].back_color_input = ni; + if (ctx.bc->chip_class >= EVERGREEN) { + if ((r = evergreen_interp_input(&ctx, ni))) + return r; + } } } } @@ -1406,12 +1445,13 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, if (use_llvm) { struct radeon_llvm_context radeon_llvm_ctx; LLVMModuleRef mod; - unsigned dump = 0; + bool dump = r600_can_dump_shader(rscreen, ctx.type); + boolean use_kill = false; + memset(&radeon_llvm_ctx, 0, sizeof(radeon_llvm_ctx)); - radeon_llvm_ctx.reserved_reg_count = ctx.file_offset[TGSI_FILE_INPUT]; radeon_llvm_ctx.type = ctx.type; radeon_llvm_ctx.two_side = shader->two_side; - radeon_llvm_ctx.face_input = ctx.face_gpr; + radeon_llvm_ctx.face_gpr = ctx.face_gpr; radeon_llvm_ctx.r600_inputs = ctx.shader->input; radeon_llvm_ctx.r600_outputs = ctx.shader->output; radeon_llvm_ctx.color_buffer_count = MAX2(key.nr_cbufs , 1); @@ -1419,12 +1459,11 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, radeon_llvm_ctx.fs_color_all = shader->fs_write_all && (rscreen->chip_class >= EVERGREEN); radeon_llvm_ctx.stream_outputs = &so; radeon_llvm_ctx.clip_vertex = ctx.cv_output; + radeon_llvm_ctx.alpha_to_one = key.alpha_to_one; mod = r600_tgsi_llvm(&radeon_llvm_ctx, tokens); - if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE)) { - dump = 1; - } + if (r600_llvm_compile(mod, &inst_bytes, &inst_byte_count, - rscreen->family, dump)) { + rscreen->family, ctx.bc, &use_kill, dump)) { FREE(inst_bytes); radeon_llvm_dispose(&radeon_llvm_ctx); use_llvm = 0; @@ -1434,6 +1473,8 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, ctx.file_offset[TGSI_FILE_OUTPUT] = ctx.file_offset[TGSI_FILE_INPUT]; } + if (use_kill) + ctx.shader->uses_kill = use_kill; radeon_llvm_dispose(&radeon_llvm_ctx); } #endif @@ -1442,75 +1483,74 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, if (shader->fs_write_all && rscreen->chip_class >= EVERGREEN) shader->nr_ps_max_color_exports = 8; - if (ctx.fragcoord_input >= 0 && !use_llvm) { - if (ctx.bc->chip_class == CAYMAN) { - for (j = 0 ; j < 4; j++) { + if (!use_llvm) { + if (ctx.fragcoord_input >= 0) { + if (ctx.bc->chip_class == CAYMAN) { + for (j = 0 ; j < 4; j++) { + struct r600_bytecode_alu alu; + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP1_RECIP_IEEE; + alu.src[0].sel = shader->input[ctx.fragcoord_input].gpr; + alu.src[0].chan = 3; + + alu.dst.sel = shader->input[ctx.fragcoord_input].gpr; + alu.dst.chan = j; + alu.dst.write = (j == 3); + alu.last = 1; + if ((r = r600_bytecode_add_alu(ctx.bc, &alu))) + return r; + } + } else { struct r600_bytecode_alu alu; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; alu.src[0].sel = shader->input[ctx.fragcoord_input].gpr; alu.src[0].chan = 3; alu.dst.sel = shader->input[ctx.fragcoord_input].gpr; - alu.dst.chan = j; - alu.dst.write = (j == 3); + alu.dst.chan = 3; + alu.dst.write = 1; alu.last = 1; if ((r = r600_bytecode_add_alu(ctx.bc, &alu))) return r; } - } else { - struct r600_bytecode_alu alu; - memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); - alu.src[0].sel = shader->input[ctx.fragcoord_input].gpr; - alu.src[0].chan = 3; + } - alu.dst.sel = shader->input[ctx.fragcoord_input].gpr; - alu.dst.chan = 3; - alu.dst.write = 1; - alu.last = 1; - if ((r = r600_bytecode_add_alu(ctx.bc, &alu))) + if (shader->two_side && ctx.colors_used) { + if ((r = process_twoside_color_inputs(&ctx))) return r; } - } - - if (shader->two_side && ctx.colors_used) { - if ((r = process_twoside_color_inputs(&ctx))) - return r; - } - tgsi_parse_init(&ctx.parse, tokens); - while (!tgsi_parse_end_of_tokens(&ctx.parse)) { - tgsi_parse_token(&ctx.parse); - switch (ctx.parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_INSTRUCTION: - if (use_llvm) { - continue; + tgsi_parse_init(&ctx.parse, tokens); + while (!tgsi_parse_end_of_tokens(&ctx.parse)) { + tgsi_parse_token(&ctx.parse); + switch (ctx.parse.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_INSTRUCTION: + r = tgsi_is_supported(&ctx); + if (r) + goto out_err; + ctx.max_driver_temp_used = 0; + /* reserve first tmp for everyone */ + r600_get_temp(&ctx); + + opcode = ctx.parse.FullToken.FullInstruction.Instruction.Opcode; + if ((r = tgsi_split_constant(&ctx))) + goto out_err; + if ((r = tgsi_split_literal_constant(&ctx))) + goto out_err; + if (ctx.bc->chip_class == CAYMAN) + ctx.inst_info = &cm_shader_tgsi_instruction[opcode]; + else if (ctx.bc->chip_class >= EVERGREEN) + ctx.inst_info = &eg_shader_tgsi_instruction[opcode]; + else + ctx.inst_info = &r600_shader_tgsi_instruction[opcode]; + r = ctx.inst_info->process(&ctx); + if (r) + goto out_err; + break; + default: + break; } - r = tgsi_is_supported(&ctx); - if (r) - goto out_err; - ctx.max_driver_temp_used = 0; - /* reserve first tmp for everyone */ - r600_get_temp(&ctx); - - opcode = ctx.parse.FullToken.FullInstruction.Instruction.Opcode; - if ((r = tgsi_split_constant(&ctx))) - goto out_err; - if ((r = tgsi_split_literal_constant(&ctx))) - goto out_err; - if (ctx.bc->chip_class == CAYMAN) - ctx.inst_info = &cm_shader_tgsi_instruction[opcode]; - else if (ctx.bc->chip_class >= EVERGREEN) - ctx.inst_info = &eg_shader_tgsi_instruction[opcode]; - else - ctx.inst_info = &r600_shader_tgsi_instruction[opcode]; - r = ctx.inst_info->process(&ctx); - if (r) - goto out_err; - break; - default: - break; } } @@ -1554,7 +1594,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, for (j = 0; j < 4; j++) { struct r600_bytecode_alu alu; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4); + alu.op = ALU_OP2_DOT4; alu.src[0].sel = shader->output[ctx.cv_output].gpr; alu.src[0].chan = j; @@ -1610,7 +1650,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, for (j = 0; j < so.output[i].num_components; j++) { struct r600_bytecode_alu alu; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = so_gpr[i]; alu.src[0].chan = so.output[i].start_component + j; @@ -1646,31 +1686,31 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, if (ctx.bc->chip_class >= EVERGREEN) { switch (so.output[i].output_buffer) { case 0: - output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0; + output.op = CF_OP_MEM_STREAM0_BUF0; break; case 1: - output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF1; + output.op = CF_OP_MEM_STREAM0_BUF1; break; case 2: - output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF2; + output.op = CF_OP_MEM_STREAM0_BUF2; break; case 3: - output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF3; + output.op = CF_OP_MEM_STREAM0_BUF3; break; } } else { switch (so.output[i].output_buffer) { case 0: - output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0; + output.op = CF_OP_MEM_STREAM0; break; case 1: - output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1; + output.op = CF_OP_MEM_STREAM1; break; case 2: - output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2; + output.op = CF_OP_MEM_STREAM2; break; case 3: - output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3; + output.op = CF_OP_MEM_STREAM3; break; } } @@ -1692,7 +1732,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, output[j].burst_count = 1; output[j].barrier = 1; output[j].type = -1; - output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT); + output[j].op = CF_OP_EXPORT; switch (ctx.type) { case TGSI_PROCESSOR_VERTEX: switch (shader->output[i].name) { @@ -1753,7 +1793,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, output[j].burst_count = 1; output[j].barrier = 1; output[j].array_base = next_pixel_base++; - output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT); + output[j].op = CF_OP_EXPORT; output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL; shader->nr_ps_color_exports++; } @@ -1801,7 +1841,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, output[j].barrier = 1; output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS; output[j].array_base = next_pos_base; - output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT); + output[j].op = CF_OP_EXPORT; j++; } @@ -1818,7 +1858,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, output[j].barrier = 1; output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM; output[j].array_base = 0; - output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT); + output[j].op = CF_OP_EXPORT; j++; } @@ -1835,7 +1875,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, output[j].barrier = 1; output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL; output[j].array_base = 0; - output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT); + output[j].op = CF_OP_EXPORT; j++; } @@ -1850,7 +1890,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, } if (!(output_done & (1 << output[i].type))) { output_done |= (1 << output[i].type); - output[i].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE); + output[i].op = CF_OP_EXPORT_DONE; } } /* add output to bytecode */ @@ -1862,7 +1902,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, } } /* add program end */ - if (ctx.bc->chip_class == CAYMAN) + if (!use_llvm && ctx.bc->chip_class == CAYMAN) cm_bytecode_add_cf_end(ctx.bc); /* check GPR limit - we have 124 = 128 - 4 @@ -1962,7 +2002,7 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap, int trans_only) memset(&alu, 0, sizeof(struct r600_bytecode_alu)); tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; if (!swap) { for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { r600_bytecode_src(&alu.src[j], &ctx->src[j], i); @@ -2019,7 +2059,7 @@ static int tgsi_ineg(struct r600_shader_ctx *ctx) if (!(inst->Dst[0].Register.WriteMask & (1 << i))) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; alu.src[0].sel = V_SQ_ALU_SRC_0; @@ -2047,7 +2087,7 @@ static int cayman_emit_float_instr(struct r600_shader_ctx *ctx) for (i = 0 ; i < last_slot; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { r600_bytecode_src(&alu.src[j], &ctx->src[j], 0); @@ -2080,7 +2120,7 @@ static int cayman_mul_int_instr(struct r600_shader_ctx *ctx) for (i = 0 ; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { r600_bytecode_src(&alu.src[j], &ctx->src[j], k); } @@ -2111,7 +2151,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx) struct r600_bytecode_alu alu; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; alu.is_op3 = 1; alu.dst.chan = 0; @@ -2131,7 +2171,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx) return r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT); + alu.op = ALU_OP1_FRACT; alu.dst.chan = 0; alu.dst.sel = ctx->temp_reg; @@ -2145,7 +2185,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx) return r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; alu.is_op3 = 1; alu.dst.chan = 0; @@ -2190,7 +2230,7 @@ static int cayman_trig(struct r600_shader_ctx *ctx) for (i = 0; i < last_slot; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; alu.dst.chan = i; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -2219,7 +2259,7 @@ static int tgsi_trig(struct r600_shader_ctx *ctx) return r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; alu.dst.chan = 0; alu.dst.sel = ctx->temp_reg; alu.dst.write = 1; @@ -2237,7 +2277,7 @@ static int tgsi_trig(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = ctx->temp_reg; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -2270,7 +2310,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0 ; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS); + alu.op = ALU_OP1_COS; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); if (i == 0) @@ -2287,7 +2327,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS); + alu.op = ALU_OP1_COS; tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst); alu.src[0].sel = ctx->temp_reg; @@ -2304,7 +2344,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0 ; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN); + alu.op = ALU_OP1_SIN; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); if (i == 1) alu.dst.write = 1; @@ -2320,7 +2360,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN); + alu.op = ALU_OP1_SIN; tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst); alu.src[0].sel = ctx->temp_reg; @@ -2336,7 +2376,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx) if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; tgsi_dst(ctx, &inst->Dst[0], 2, &alu.dst); @@ -2354,7 +2394,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx) if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; tgsi_dst(ctx, &inst->Dst[0], 3, &alu.dst); @@ -2378,7 +2418,7 @@ static int tgsi_kill(struct r600_shader_ctx *ctx) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; alu.dst.chan = i; @@ -2412,7 +2452,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) /* tmp.x = max(src.y, 0.0) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX); + alu.op = ALU_OP2_MAX; r600_bytecode_src(&alu.src[0], &ctx->src[0], 1); alu.src[1].sel = V_SQ_ALU_SRC_0; /*0.0*/ alu.src[1].chan = 1; @@ -2436,7 +2476,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { /* tmp.z = log(tmp.x) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED); + alu.op = ALU_OP1_LOG_CLAMPED; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; alu.dst.sel = ctx->temp_reg; @@ -2454,7 +2494,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) } else { /* tmp.z = log(tmp.x) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED); + alu.op = ALU_OP1_LOG_CLAMPED; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; alu.dst.sel = ctx->temp_reg; @@ -2471,7 +2511,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) /* tmp.x = amd MUL_LIT(tmp.z, src.w, src.x ) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT); + alu.op = ALU_OP3_MUL_LIT; alu.src[0].sel = sel; alu.src[0].chan = chan; r600_bytecode_src(&alu.src[1], &ctx->src[0], 3); @@ -2489,7 +2529,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { /* dst.z = exp(tmp.x) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -2505,7 +2545,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) } else { /* dst.z = exp(tmp.x) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; tgsi_dst(ctx, &inst->Dst[0], 2, &alu.dst); @@ -2518,7 +2558,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) /* dst.x, <- 1.0 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = V_SQ_ALU_SRC_1; /*1.0*/ alu.src[0].chan = 0; tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst); @@ -2529,7 +2569,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) /* dst.y = max(src.x, 0.0) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX); + alu.op = ALU_OP2_MAX; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.src[1].sel = V_SQ_ALU_SRC_0; /*0.0*/ alu.src[1].chan = 0; @@ -2541,7 +2581,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx) /* dst.w, <- 1.0 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = V_SQ_ALU_SRC_1; alu.src[0].chan = 0; tgsi_dst(ctx, &inst->Dst[0], 3, &alu.dst); @@ -2566,7 +2606,7 @@ static int tgsi_rsq(struct r600_shader_ctx *ctx) * For state trackers other than OpenGL, we'll want to use * _RECIPSQRT_IEEE instead. */ - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED); + alu.op = ALU_OP1_RECIPSQRT_CLAMPED; for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { r600_bytecode_src(&alu.src[i], &ctx->src[i], 0); @@ -2591,7 +2631,7 @@ static int tgsi_helper_tempx_replicate(struct r600_shader_ctx *ctx) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); alu.src[0].sel = ctx->temp_reg; - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.dst.chan = i; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1; @@ -2611,7 +2651,7 @@ static int tgsi_trans_srcx_replicate(struct r600_shader_ctx *ctx) int i, r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { r600_bytecode_src(&alu.src[i], &ctx->src[i], 0); } @@ -2634,7 +2674,7 @@ static int cayman_pow(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->temp_reg; alu.dst.chan = i; @@ -2648,7 +2688,7 @@ static int cayman_pow(struct r600_shader_ctx *ctx) /* b * LOG2(a) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; r600_bytecode_src(&alu.src[0], &ctx->src[1], 0); alu.src[1].sel = ctx->temp_reg; alu.dst.sel = ctx->temp_reg; @@ -2661,7 +2701,7 @@ static int cayman_pow(struct r600_shader_ctx *ctx) for (i = 0; i < last_slot; i++) { /* POW(a,b) = EXP2(b * LOG2(a))*/ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -2682,7 +2722,7 @@ static int tgsi_pow(struct r600_shader_ctx *ctx) /* LOG2(a) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->temp_reg; alu.dst.write = 1; @@ -2692,7 +2732,7 @@ static int tgsi_pow(struct r600_shader_ctx *ctx) return r; /* b * LOG2(a) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; r600_bytecode_src(&alu.src[0], &ctx->src[1], 0); alu.src[1].sel = ctx->temp_reg; alu.dst.sel = ctx->temp_reg; @@ -2703,7 +2743,7 @@ static int tgsi_pow(struct r600_shader_ctx *ctx) return r; /* POW(a,b) = EXP2(b * LOG2(a))*/ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.dst.sel = ctx->temp_reg; alu.dst.write = 1; @@ -2778,7 +2818,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp2.x = -src0 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp2; alu.dst.chan = 0; @@ -2794,7 +2834,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp2.y = -src1 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp2; alu.dst.chan = 1; @@ -2813,7 +2853,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (!mod) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT); + alu.op = ALU_OP2_XOR_INT; alu.dst.sel = tmp2; alu.dst.chan = 2; @@ -2829,7 +2869,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp2.x = |src0| */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; alu.is_op3 = 1; alu.dst.sel = tmp2; @@ -2847,7 +2887,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp2.y = |src1| */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; alu.is_op3 = 1; alu.dst.sel = tmp2; @@ -2869,7 +2909,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (ctx->bc->chip_class == CAYMAN) { /* tmp3.x = u2f(src2) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT); + alu.op = ALU_OP1_UINT_TO_FLT; alu.dst.sel = tmp3; alu.dst.chan = 0; @@ -2889,7 +2929,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp0.x = recip(tmp3.x) */ for (j = 0 ; j < 3; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE; + alu.op = ALU_OP1_RECIP_IEEE; alu.dst.sel = tmp0; alu.dst.chan = j; @@ -2905,7 +2945,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; alu.src[0].sel = tmp0; alu.src[0].chan = 0; @@ -2921,7 +2961,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) return r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT); + alu.op = ALU_OP1_FLT_TO_UINT; alu.dst.sel = tmp0; alu.dst.chan = 0; @@ -2936,7 +2976,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT); + alu.op = ALU_OP1_RECIP_UINT; alu.dst.sel = tmp0; alu.dst.chan = 0; @@ -2958,7 +2998,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (ctx->bc->chip_class == CAYMAN) { for (j = 0 ; j < 4; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); + alu.op = ALU_OP2_MULLO_UINT; alu.dst.sel = tmp0; alu.dst.chan = j; @@ -2979,7 +3019,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); + alu.op = ALU_OP2_MULLO_UINT; alu.dst.sel = tmp0; alu.dst.chan = 2; @@ -3001,7 +3041,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 3. tmp0.w = -tmp0.z */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp0; alu.dst.chan = 3; @@ -3019,7 +3059,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (ctx->bc->chip_class == CAYMAN) { for (j = 0 ; j < 4; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); + alu.op = ALU_OP2_MULHI_UINT; alu.dst.sel = tmp0; alu.dst.chan = j; @@ -3040,7 +3080,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); + alu.op = ALU_OP2_MULHI_UINT; alu.dst.sel = tmp0; alu.dst.chan = 1; @@ -3063,7 +3103,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 5. tmp0.z = (tmp0.y == 0 ? tmp0.w : tmp0.z) = abs(lo(rcp*src)) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT); + alu.op = ALU_OP3_CNDE_INT; alu.is_op3 = 1; alu.dst.sel = tmp0; @@ -3085,7 +3125,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (ctx->bc->chip_class == CAYMAN) { for (j = 0 ; j < 4; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); + alu.op = ALU_OP2_MULHI_UINT; alu.dst.sel = tmp0; alu.dst.chan = j; @@ -3103,7 +3143,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); + alu.op = ALU_OP2_MULHI_UINT; alu.dst.sel = tmp0; alu.dst.chan = 3; @@ -3122,7 +3162,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 7. tmp1.x = tmp0.x - tmp0.w */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp1; alu.dst.chan = 0; @@ -3139,7 +3179,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 8. tmp1.y = tmp0.x + tmp0.w */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT); + alu.op = ALU_OP2_ADD_INT; alu.dst.sel = tmp1; alu.dst.chan = 1; @@ -3156,7 +3196,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 9. tmp0.x = (tmp0.y == 0 ? tmp1.y : tmp1.x) */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT); + alu.op = ALU_OP3_CNDE_INT; alu.is_op3 = 1; alu.dst.sel = tmp0; @@ -3178,7 +3218,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (ctx->bc->chip_class == CAYMAN) { for (j = 0 ; j < 4; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); + alu.op = ALU_OP2_MULHI_UINT; alu.dst.sel = tmp0; alu.dst.chan = j; @@ -3200,7 +3240,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT); + alu.op = ALU_OP2_MULHI_UINT; alu.dst.sel = tmp0; alu.dst.chan = 2; @@ -3225,7 +3265,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) if (ctx->bc->chip_class == CAYMAN) { for (j = 0 ; j < 4; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); + alu.op = ALU_OP2_MULLO_UINT; alu.dst.sel = tmp0; alu.dst.chan = j; @@ -3247,7 +3287,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); + alu.op = ALU_OP2_MULLO_UINT; alu.dst.sel = tmp0; alu.dst.chan = 1; @@ -3270,7 +3310,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 12. tmp0.w = src1 - tmp0.y = r */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp0; alu.dst.chan = 3; @@ -3292,7 +3332,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 13. tmp1.x = tmp0.w >= src2 = r >= src2 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT); + alu.op = ALU_OP2_SETGE_UINT; alu.dst.sel = tmp1; alu.dst.chan = 0; @@ -3313,7 +3353,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 14. tmp1.y = src1 >= tmp0.y = r >= 0 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT); + alu.op = ALU_OP2_SETGE_UINT; alu.dst.sel = tmp1; alu.dst.chan = 1; @@ -3337,7 +3377,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 15. tmp1.z = tmp0.w - src2 = r - src2 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp1; alu.dst.chan = 2; @@ -3359,7 +3399,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 16. tmp1.w = tmp0.w + src2 = r + src2 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT); + alu.op = ALU_OP2_ADD_INT; alu.dst.sel = tmp1; alu.dst.chan = 3; @@ -3382,7 +3422,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 15. tmp1.z = tmp0.z + 1 = q + 1 DIV */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT); + alu.op = ALU_OP2_ADD_INT; alu.dst.sel = tmp1; alu.dst.chan = 2; @@ -3398,7 +3438,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 16. tmp1.w = tmp0.z - 1 = q - 1 */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT); + alu.op = ALU_OP2_ADD_INT; alu.dst.sel = tmp1; alu.dst.chan = 3; @@ -3416,7 +3456,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 17. tmp1.x = tmp1.x & tmp1.y */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT); + alu.op = ALU_OP2_AND_INT; alu.dst.sel = tmp1; alu.dst.chan = 0; @@ -3434,7 +3474,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 18. tmp0.z = tmp1.x==0 ? tmp0.z : tmp1.z DIV */ /* 18. tmp0.z = tmp1.x==0 ? tmp0.w : tmp1.z MOD */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT); + alu.op = ALU_OP3_CNDE_INT; alu.is_op3 = 1; alu.dst.sel = tmp0; @@ -3454,7 +3494,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* 19. tmp0.z = tmp1.y==0 ? tmp1.w : tmp0.z */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT); + alu.op = ALU_OP3_CNDE_INT; alu.is_op3 = 1; if (signed_op) { @@ -3484,7 +3524,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp0.x = -tmp0.z */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp0; alu.dst.chan = 0; @@ -3501,7 +3541,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* sign of the remainder is the same as the sign of src0 */ /* tmp0.x = src0>=0 ? tmp0.z : tmp0.x */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; alu.is_op3 = 1; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -3520,7 +3560,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* tmp0.x = -tmp0.z */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = tmp0; alu.dst.chan = 0; @@ -3537,7 +3577,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op) /* fix the quotient sign (same as the sign of src0*src1) */ /* tmp0.x = tmp2.z>=0 ? tmp0.z : tmp0.x */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; alu.is_op3 = 1; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -3592,7 +3632,7 @@ static int tgsi_f2i(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC); + alu.op = ALU_OP1_TRUNC; alu.dst.sel = ctx->temp_reg; alu.dst.chan = i; @@ -3611,14 +3651,14 @@ static int tgsi_f2i(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = i; - if (i == last_inst || alu.inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT) + if (i == last_inst || alu.op == ALU_OP1_FLT_TO_UINT) alu.last = 1; r = r600_bytecode_add_alu(ctx->bc, &alu); if (r) @@ -3642,7 +3682,7 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT); + alu.op = ALU_OP2_SUB_INT; alu.dst.sel = ctx->temp_reg; alu.dst.chan = i; @@ -3664,7 +3704,7 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; alu.is_op3 = 1; alu.dst.write = 1; @@ -3698,7 +3738,7 @@ static int tgsi_issg(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; alu.is_op3 = 1; alu.dst.sel = ctx->temp_reg; @@ -3722,7 +3762,7 @@ static int tgsi_issg(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT); + alu.op = ALU_OP3_CNDGT_INT; alu.is_op3 = 1; alu.dst.write = 1; @@ -3756,7 +3796,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx) /* tmp = (src > 0 ? 1 : src) */ for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT); + alu.op = ALU_OP3_CNDGT; alu.is_op3 = 1; alu.dst.sel = ctx->temp_reg; @@ -3776,7 +3816,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx) /* dst = (-tmp > 0 ? -1 : tmp) */ for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT); + alu.op = ALU_OP3_CNDGT; alu.is_op3 = 1; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); @@ -3807,10 +3847,10 @@ static int tgsi_helper_copy(struct r600_shader_ctx *ctx, struct tgsi_full_instru for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); if (!(inst->Dst[0].Register.WriteMask & (1 << i))) { - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP); + alu.op = ALU_OP0_NOP; alu.dst.chan = i; } else { - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = i; @@ -3837,7 +3877,7 @@ static int tgsi_op3(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { r600_bytecode_src(&alu.src[j], &ctx->src[j], i); } @@ -3864,7 +3904,7 @@ static int tgsi_dp(struct r600_shader_ctx *ctx) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ctx->inst_info->op; for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { r600_bytecode_src(&alu.src[j], &ctx->src[j], i); } @@ -3935,7 +3975,7 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx *ctx, boolean src_requires_l if (src_requires_loading) { for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; r600_bytecode_src(&alu.src[0], &ctx->src[0], i); alu.dst.sel = ctx->temp_reg; alu.dst.chan = i; @@ -3950,7 +3990,7 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx *ctx, boolean src_requires_l } memset(&vtx, 0, sizeof(vtx)); - vtx.inst = 0; + vtx.op = FETCH_OP_VFETCH; vtx.buffer_id = id + R600_MAX_CONST_BUFFERS; vtx.fetch_type = 2; /* VTX_FETCH_NO_INDEX_OFFSET */ vtx.src_gpr = src_gpr; @@ -3975,7 +4015,7 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx *ctx, boolean src_requires_l continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT); + alu.op = ALU_OP2_AND_INT; alu.dst.chan = i; alu.dst.sel = vtx.dst_gpr; @@ -3997,7 +4037,7 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx *ctx, boolean src_requires_l if (inst->Dst[0].Register.WriteMask & 3) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT); + alu.op = ALU_OP2_OR_INT; alu.dst.chan = 3; alu.dst.sel = vtx.dst_gpr; @@ -4026,7 +4066,7 @@ static int r600_do_buffer_txq(struct r600_shader_ctx *ctx) int id = tgsi_tex_get_src_gpr(ctx, 1); memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; if (ctx->bc->chip_class >= EVERGREEN) { alu.src[0].sel = 512 + (id / 4); @@ -4111,8 +4151,8 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) for (i = 1; i < 3; i++) { /* set gradients h/v */ memset(&tex, 0, sizeof(struct r600_bytecode_tex)); - tex.inst = (i == 1) ? SQ_TEX_INST_SET_GRADIENTS_H : - SQ_TEX_INST_SET_GRADIENTS_V; + tex.op = (i == 1) ? FETCH_OP_SET_GRADIENTS_H : + FETCH_OP_SET_GRADIENTS_V; tex.sampler_id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg); tex.resource_id = tex.sampler_id + R600_MAX_CONST_BUFFERS; @@ -4125,7 +4165,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) for (j = 0; j < 4; j++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; r600_bytecode_src(&alu.src[0], &ctx->src[i], j); alu.dst.sel = tex.src_gpr; alu.dst.chan = j; @@ -4164,7 +4204,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) out_chan = 2; for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 3); alu.dst.sel = ctx->temp_reg; @@ -4181,7 +4221,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) } else { out_chan = 3; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 3); alu.dst.sel = ctx->temp_reg; @@ -4195,7 +4235,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = out_chan; r600_bytecode_src(&alu.src[1], &ctx->src[0], i); @@ -4207,7 +4247,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) return r; } memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = V_SQ_ALU_SRC_1; alu.src[0].chan = 0; alu.dst.sel = ctx->temp_reg; @@ -4234,7 +4274,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) /* tmp1.xyzw = CUBE(R0.zzxy, R0.yxzz) */ for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE); + alu.op = ALU_OP2_CUBE; r600_bytecode_src(&alu.src[0], &ctx->src[0], src0_swizzle[i]); r600_bytecode_src(&alu.src[1], &ctx->src[0], src1_swizzle[i]); alu.dst.sel = ctx->temp_reg; @@ -4251,7 +4291,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 2; alu.src[0].abs = 1; @@ -4267,7 +4307,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 2; alu.src[0].abs = 1; @@ -4285,7 +4325,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) * muladd has no writemask, have to use another temp */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; alu.is_op3 = 1; alu.src[0].sel = ctx->temp_reg; @@ -4306,7 +4346,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) return r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; alu.is_op3 = 1; alu.src[0].sel = ctx->temp_reg; @@ -4332,7 +4372,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) if (inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE || inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE_ARRAY) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; if (inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE_ARRAY) r600_bytecode_src(&alu.src[0], &ctx->src[1], 0); else @@ -4352,7 +4392,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) int mytmp = r600_get_temp(ctx); static const float eight = 8.0f; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 3; alu.dst.sel = mytmp; @@ -4365,7 +4405,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) /* have to multiply original layer by 8 and add to face id (temp.w) in Z */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; alu.is_op3 = 1; r600_bytecode_src(&alu.src[0], &ctx->src[0], 3); alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; @@ -4382,7 +4422,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) return r; } else if (ctx->bc->chip_class < EVERGREEN) { memset(&tex, 0, sizeof(struct r600_bytecode_tex)); - tex.inst = SQ_TEX_INST_SET_CUBEMAP_INDEX; + tex.op = FETCH_OP_SET_CUBEMAP_INDEX; tex.sampler_id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg); tex.resource_id = tex.sampler_id + R600_MAX_CONST_BUFFERS; tex.src_gpr = r600_get_temp(ctx); @@ -4396,7 +4436,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) tex.coord_type_z = 1; tex.coord_type_w = 1; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; r600_bytecode_src(&alu.src[0], &ctx->src[0], 3); alu.dst.sel = tex.src_gpr; alu.dst.chan = 0; @@ -4419,7 +4459,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) inst->Instruction.Opcode == TGSI_OPCODE_TXB2 || inst->Instruction.Opcode == TGSI_OPCODE_TXL2) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; if (inst->Instruction.Opcode == TGSI_OPCODE_TXB2 || inst->Instruction.Opcode == TGSI_OPCODE_TXL2) r600_bytecode_src(&alu.src[0], &ctx->src[1], 0); @@ -4441,7 +4481,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) if (src_requires_loading && !src_loaded) { for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; r600_bytecode_src(&alu.src[0], &ctx->src[0], i); alu.dst.sel = ctx->temp_reg; alu.dst.chan = i; @@ -4468,13 +4508,13 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) * Then fetch the texel with src. */ if (read_compressed_msaa) { - unsigned sample_chan = inst->Texture.Texture == TGSI_TEXTURE_2D_MSAA ? 3 : 4; + unsigned sample_chan = 3; unsigned temp = r600_get_temp(ctx); assert(src_loaded); /* temp.w = ldfptr() */ memset(&tex, 0, sizeof(struct r600_bytecode_tex)); - tex.inst = SQ_TEX_INST_LD; + tex.op = FETCH_OP_LD; tex.inst_mod = 1; /* to indicate this is ldfptr */ tex.sampler_id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg); tex.resource_id = tex.sampler_id + R600_MAX_CONST_BUFFERS; @@ -4499,7 +4539,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0 ; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = ctx->inst_info->r600_opcode; + alu.op = ALU_OP2_MULLO_INT; alu.src[0].sel = src_gpr; alu.src[0].chan = sample_chan; alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; @@ -4515,7 +4555,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT); + alu.op = ALU_OP2_MULLO_INT; alu.src[0].sel = src_gpr; alu.src[0].chan = sample_chan; alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; @@ -4531,7 +4571,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) /* sample_index = temp.w >> temp.x */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT); + alu.op = ALU_OP2_LSHR_INT; alu.src[0].sel = temp; alu.src[0].chan = 3; alu.src[1].sel = temp; @@ -4546,7 +4586,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) /* sample_index & 0xF */ memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT); + alu.op = ALU_OP2_AND_INT; alu.src[0].sel = src_gpr; alu.src[0].chan = sample_chan; alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; @@ -4562,7 +4602,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) /* visualize the FMASK */ for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT); + alu.op = ALU_OP1_INT_TO_FLT; alu.src[0].sel = src_gpr; alu.src[0].chan = sample_chan; alu.dst.sel = ctx->file_offset[inst->Dst[0].Register.File] + inst->Dst[0].Register.Index; @@ -4582,7 +4622,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) int id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg); memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = 512 + (id / 4); alu.src[0].kc_bank = R600_TXQ_CONST_BUFFER; @@ -4596,7 +4636,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) inst->Dst[0].Register.WriteMask &= ~4; } - opcode = ctx->inst_info->r600_opcode; + opcode = ctx->inst_info->op; if (inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D || inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D || inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT || @@ -4605,23 +4645,23 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D_ARRAY || inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE_ARRAY) { switch (opcode) { - case SQ_TEX_INST_SAMPLE: - opcode = SQ_TEX_INST_SAMPLE_C; + case FETCH_OP_SAMPLE: + opcode = FETCH_OP_SAMPLE_C; break; - case SQ_TEX_INST_SAMPLE_L: - opcode = SQ_TEX_INST_SAMPLE_C_L; + case FETCH_OP_SAMPLE_L: + opcode = FETCH_OP_SAMPLE_C_L; break; - case SQ_TEX_INST_SAMPLE_LB: - opcode = SQ_TEX_INST_SAMPLE_C_LB; + case FETCH_OP_SAMPLE_LB: + opcode = FETCH_OP_SAMPLE_C_LB; break; - case SQ_TEX_INST_SAMPLE_G: - opcode = SQ_TEX_INST_SAMPLE_C_G; + case FETCH_OP_SAMPLE_G: + opcode = FETCH_OP_SAMPLE_C_G; break; } } memset(&tex, 0, sizeof(struct r600_bytecode_tex)); - tex.inst = opcode; + tex.op = opcode; tex.sampler_id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg); tex.resource_id = tex.sampler_id + R600_MAX_CONST_BUFFERS; @@ -4679,15 +4719,15 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D || inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT || inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D_ARRAY) && - opcode != SQ_TEX_INST_SAMPLE_C_L && - opcode != SQ_TEX_INST_SAMPLE_C_LB) { + opcode != FETCH_OP_SAMPLE_C_L && + opcode != FETCH_OP_SAMPLE_C_LB) { tex.src_sel_w = tex.src_sel_z; } if (inst->Texture.Texture == TGSI_TEXTURE_1D_ARRAY || inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D_ARRAY) { - if (opcode == SQ_TEX_INST_SAMPLE_C_L || - opcode == SQ_TEX_INST_SAMPLE_C_LB) { + if (opcode == FETCH_OP_SAMPLE_C_L || + opcode == FETCH_OP_SAMPLE_C_LB) { /* the array index is read from Y */ tex.coord_type_y = 0; } else { @@ -4703,6 +4743,26 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) /* the array index is read from Z */ tex.coord_type_z = 0; + /* mask unused source components */ + if (opcode == FETCH_OP_SAMPLE) { + switch (inst->Texture.Texture) { + case TGSI_TEXTURE_2D: + case TGSI_TEXTURE_RECT: + tex.src_sel_z = 7; + tex.src_sel_w = 7; + break; + case TGSI_TEXTURE_1D_ARRAY: + tex.src_sel_y = 7; + tex.src_sel_w = 7; + break; + case TGSI_TEXTURE_1D: + tex.src_sel_y = 7; + tex.src_sel_z = 7; + tex.src_sel_w = 7; + break; + } + } + r = r600_bytecode_add_tex(ctx->bc, &tex); if (r) return r; @@ -4726,7 +4786,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD); + alu.op = ALU_OP2_ADD; r600_bytecode_src(&alu.src[0], &ctx->src[1], i); r600_bytecode_src(&alu.src[1], &ctx->src[2], i); alu.omod = 3; @@ -4748,7 +4808,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD); + alu.op = ALU_OP2_ADD; alu.src[0].sel = V_SQ_ALU_SRC_1; alu.src[0].chan = 0; r600_bytecode_src(&alu.src[1], &ctx->src[0], i); @@ -4770,7 +4830,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = i; r600_bytecode_src(&alu.src[1], &ctx->src[2], i); @@ -4791,7 +4851,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; alu.is_op3 = 1; r600_bytecode_src(&alu.src[0], &ctx->src[0], i); r600_bytecode_src(&alu.src[1], &ctx->src[1], i); @@ -4822,7 +4882,7 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE); + alu.op = ALU_OP3_CNDGE; r600_bytecode_src(&alu.src[0], &ctx->src[0], i); r600_bytecode_src(&alu.src[1], &ctx->src[2], i); r600_bytecode_src(&alu.src[2], &ctx->src[1], i); @@ -4851,7 +4911,7 @@ static int tgsi_ucmp(struct r600_shader_ctx *ctx) continue; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT); + alu.op = ALU_OP3_CNDGE_INT; r600_bytecode_src(&alu.src[0], &ctx->src[0], i); r600_bytecode_src(&alu.src[1], &ctx->src[2], i); r600_bytecode_src(&alu.src[2], &ctx->src[1], i); @@ -4882,7 +4942,7 @@ static int tgsi_xpd(struct r600_shader_ctx *ctx) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; if (i < 3) { r600_bytecode_src(&alu.src[0], &ctx->src[0], src0_swizzle[i]); r600_bytecode_src(&alu.src[1], &ctx->src[1], src1_swizzle[i]); @@ -4906,7 +4966,7 @@ static int tgsi_xpd(struct r600_shader_ctx *ctx) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD); + alu.op = ALU_OP3_MULADD; if (i < 3) { r600_bytecode_src(&alu.src[0], &ctx->src[0], src1_swizzle[i]); @@ -4951,7 +5011,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) if (inst->Dst[0].Register.WriteMask & 1) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR); + alu.op = ALU_OP1_FLOOR; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->temp_reg; @@ -4964,7 +5024,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0; i < 3; i++) { - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; @@ -4977,7 +5037,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) return r; } } else { - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; @@ -4995,7 +5055,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) if ((inst->Dst[0].Register.WriteMask >> 1) & 1) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT); + alu.op = ALU_OP1_FRACT; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->temp_reg; @@ -5019,7 +5079,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->temp_reg; @@ -5035,7 +5095,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->temp_reg; @@ -5054,7 +5114,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx) if ((inst->Dst[0].Register.WriteMask >> 3) & 0x1) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = V_SQ_ALU_SRC_1; alu.src[0].chan = 0; @@ -5082,7 +5142,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5100,7 +5160,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5113,7 +5173,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) return r; } - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR); + alu.op = ALU_OP1_FLOOR; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 0; @@ -5134,7 +5194,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5152,7 +5212,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5168,7 +5228,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR); + alu.op = ALU_OP1_FLOOR; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 1; @@ -5184,7 +5244,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 1; @@ -5201,7 +5261,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE); + alu.op = ALU_OP1_EXP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 1; @@ -5218,7 +5278,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) if (ctx->bc->chip_class == CAYMAN) { for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 1; @@ -5235,7 +5295,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) } } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE); + alu.op = ALU_OP1_RECIP_IEEE; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = 1; @@ -5251,7 +5311,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5275,7 +5335,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) for (i = 0; i < 3; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5293,7 +5353,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) } else { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE); + alu.op = ALU_OP1_LOG_IEEE; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); r600_bytecode_src_set_abs(&alu.src[0]); @@ -5312,7 +5372,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx) if ((inst->Dst[0].Register.WriteMask >> 3) & 1) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV); + alu.op = ALU_OP1_MOV; alu.src[0].sel = V_SQ_ALU_SRC_1; alu.src[0].chan = 0; @@ -5339,13 +5399,13 @@ static int tgsi_eg_arl(struct r600_shader_ctx *ctx) switch (inst->Instruction.Opcode) { case TGSI_OPCODE_ARL: - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR; + alu.op = ALU_OP1_FLT_TO_INT_FLOOR; break; case TGSI_OPCODE_ARR: - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT; + alu.op = ALU_OP1_FLT_TO_INT; break; case TGSI_OPCODE_UARL: - alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV; + alu.op = ALU_OP1_MOV; break; default: assert(0); @@ -5372,7 +5432,7 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx) switch (inst->Instruction.Opcode) { case TGSI_OPCODE_ARL: memset(&alu, 0, sizeof(alu)); - alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR; + alu.op = ALU_OP1_FLOOR; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->bc->ar_reg; alu.dst.write = 1; @@ -5382,7 +5442,7 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx) return r; memset(&alu, 0, sizeof(alu)); - alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT; + alu.op = ALU_OP1_FLT_TO_INT; alu.src[0].sel = ctx->bc->ar_reg; alu.dst.sel = ctx->bc->ar_reg; alu.dst.write = 1; @@ -5393,7 +5453,7 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx) break; case TGSI_OPCODE_ARR: memset(&alu, 0, sizeof(alu)); - alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT; + alu.op = ALU_OP1_FLT_TO_INT; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->bc->ar_reg; alu.dst.write = 1; @@ -5404,7 +5464,7 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx) break; case TGSI_OPCODE_UARL: memset(&alu, 0, sizeof(alu)); - alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV; + alu.op = ALU_OP1_MOV; r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); alu.dst.sel = ctx->bc->ar_reg; alu.dst.write = 1; @@ -5431,7 +5491,7 @@ static int tgsi_opdst(struct r600_shader_ctx *ctx) for (i = 0; i < 4; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL); + alu.op = ALU_OP2_MUL; tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); if (i == 0 || i == 3) { @@ -5454,13 +5514,13 @@ static int tgsi_opdst(struct r600_shader_ctx *ctx) return 0; } -static int emit_logic_pred(struct r600_shader_ctx *ctx, int opcode) +static int emit_logic_pred(struct r600_shader_ctx *ctx, int opcode, int alu_type) { struct r600_bytecode_alu alu; int r; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = opcode; + alu.op = opcode; alu.execute_mask = 1; alu.update_pred = 1; @@ -5474,7 +5534,7 @@ static int emit_logic_pred(struct r600_shader_ctx *ctx, int opcode) alu.last = 1; - r = r600_bytecode_add_alu_type(ctx->bc, &alu, CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE)); + r = r600_bytecode_add_alu_type(ctx->bc, &alu, alu_type); if (r) return r; return 0; @@ -5487,17 +5547,17 @@ static int pops(struct r600_shader_ctx *ctx, int pops) if (!force_pop) { int alu_pop = 3; if (ctx->bc->cf_last) { - if (ctx->bc->cf_last->inst == CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU)) + if (ctx->bc->cf_last->op == CF_OP_ALU) alu_pop = 0; - else if (ctx->bc->cf_last->inst == CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER)) + else if (ctx->bc->cf_last->op == CF_OP_ALU_POP_AFTER) alu_pop = 1; } alu_pop += pops; if (alu_pop == 1) { - ctx->bc->cf_last->inst = CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER); + ctx->bc->cf_last->op = CF_OP_ALU_POP_AFTER; ctx->bc->force_add_cf = 1; } else if (alu_pop == 2) { - ctx->bc->cf_last->inst = CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER); + ctx->bc->cf_last->op = CF_OP_ALU_POP2_AFTER; ctx->bc->force_add_cf = 1; } else { force_pop = 1; @@ -5505,7 +5565,7 @@ static int pops(struct r600_shader_ctx *ctx, int pops) } if (force_pop) { - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_POP)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_POP); ctx->bc->cf_last->pop_count = pops; ctx->bc->cf_last->cf_addr = ctx->bc->cf_last->id + 2; } @@ -5513,63 +5573,107 @@ static int pops(struct r600_shader_ctx *ctx, int pops) return 0; } -static inline void callstack_decrease_current(struct r600_shader_ctx *ctx, unsigned reason) +static inline void callstack_update_max_depth(struct r600_shader_ctx *ctx, + unsigned reason) +{ + struct r600_stack_info *stack = &ctx->bc->stack; + unsigned elements, entries; + + unsigned entry_size = stack->entry_size; + + elements = (stack->loop + stack->push_wqm ) * entry_size; + elements += stack->push; + + switch (ctx->bc->chip_class) { + case R600: + case R700: + /* pre-r8xx: if any non-WQM PUSH instruction is invoked, 2 elements on + * the stack must be reserved to hold the current active/continue + * masks */ + if (reason == FC_PUSH_VPM) { + elements += 2; + } + break; + + case CAYMAN: + /* r9xx: any stack operation on empty stack consumes 2 additional + * elements */ + elements += 2; + + /* fallthrough */ + /* FIXME: do the two elements added above cover the cases for the + * r8xx+ below? */ + + case EVERGREEN: + /* r8xx+: 2 extra elements are not always required, but one extra + * element must be added for each of the following cases: + * 1. There is an ALU_ELSE_AFTER instruction at the point of greatest + * stack usage. + * (Currently we don't use ALU_ELSE_AFTER.) + * 2. There are LOOP/WQM frames on the stack when any flavor of non-WQM + * PUSH instruction executed. + * + * NOTE: it seems we also need to reserve additional element in some + * other cases, e.g. when we have 4 levels of PUSH_VPM in the shader, + * then STACK_SIZE should be 2 instead of 1 */ + if (reason == FC_PUSH_VPM) { + elements += 1; + } + break; + + default: + assert(0); + break; + } + + /* NOTE: it seems STACK_SIZE is interpreted by hw as if entry_size is 4 + * for all chips, so we use 4 in the final formula, not the real entry_size + * for the chip */ + entry_size = 4; + + entries = (elements + (entry_size - 1)) / entry_size; + + if (entries > stack->max_entries) + stack->max_entries = entries; +} + +static inline void callstack_pop(struct r600_shader_ctx *ctx, unsigned reason) { switch(reason) { case FC_PUSH_VPM: - ctx->bc->callstack[ctx->bc->call_sp].current--; + --ctx->bc->stack.push; + assert(ctx->bc->stack.push >= 0); break; case FC_PUSH_WQM: + --ctx->bc->stack.push_wqm; + assert(ctx->bc->stack.push_wqm >= 0); + break; case FC_LOOP: - ctx->bc->callstack[ctx->bc->call_sp].current -= 4; + --ctx->bc->stack.loop; + assert(ctx->bc->stack.loop >= 0); break; - case FC_REP: - /* TOODO : for 16 vp asic should -= 2; */ - ctx->bc->callstack[ctx->bc->call_sp].current --; + default: + assert(0); break; } } -static inline void callstack_check_depth(struct r600_shader_ctx *ctx, unsigned reason, unsigned check_max_only) +static inline void callstack_push(struct r600_shader_ctx *ctx, unsigned reason) { - if (check_max_only) { - int diff; - switch (reason) { - case FC_PUSH_VPM: - diff = 1; - break; - case FC_PUSH_WQM: - diff = 4; - break; - default: - assert(0); - diff = 0; - } - if ((ctx->bc->callstack[ctx->bc->call_sp].current + diff) > - ctx->bc->callstack[ctx->bc->call_sp].max) { - ctx->bc->callstack[ctx->bc->call_sp].max = - ctx->bc->callstack[ctx->bc->call_sp].current + diff; - } - return; - } switch (reason) { case FC_PUSH_VPM: - ctx->bc->callstack[ctx->bc->call_sp].current++; + ++ctx->bc->stack.push; break; case FC_PUSH_WQM: + ++ctx->bc->stack.push_wqm; case FC_LOOP: - ctx->bc->callstack[ctx->bc->call_sp].current += 4; - break; - case FC_REP: - ctx->bc->callstack[ctx->bc->call_sp].current++; + ++ctx->bc->stack.loop; break; + default: + assert(0); } - if ((ctx->bc->callstack[ctx->bc->call_sp].current) > - ctx->bc->callstack[ctx->bc->call_sp].max) { - ctx->bc->callstack[ctx->bc->call_sp].max = - ctx->bc->callstack[ctx->bc->call_sp].current; - } + callstack_update_max_depth(ctx, reason); } static void fc_set_mid(struct r600_shader_ctx *ctx, int fc_sp) @@ -5603,14 +5707,14 @@ static void fc_poplevel(struct r600_shader_ctx *ctx) #if 0 static int emit_return(struct r600_shader_ctx *ctx) { - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_RETURN)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_RETURN)); return 0; } static int emit_jump_to_offset(struct r600_shader_ctx *ctx, int pops, int offset) { - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_JUMP)); ctx->bc->cf_last->pop_count = pops; /* XXX work out offset */ return 0; @@ -5639,7 +5743,7 @@ static void break_loop_on_flag(struct r600_shader_ctx *ctx, unsigned fc_sp) { emit_testflag(ctx); - r600_bytecode_add_cfinst(ctx->bc, ctx->inst_info->r600_opcode); + r600_bytecode_add_cfinst(ctx->bc, ctx->inst_info->op); ctx->bc->cf_last->pop_count = 1; fc_set_mid(ctx, fc_sp); @@ -5648,21 +5752,43 @@ static void break_loop_on_flag(struct r600_shader_ctx *ctx, unsigned fc_sp) } #endif -static int tgsi_if(struct r600_shader_ctx *ctx) +static int emit_if(struct r600_shader_ctx *ctx, int opcode) { - emit_logic_pred(ctx, CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT)); + int alu_type = CF_OP_ALU_PUSH_BEFORE; + + /* There is a hardware bug on Cayman where a BREAK/CONTINUE followed by + * LOOP_STARTxxx for nested loops may put the branch stack into a state + * such that ALU_PUSH_BEFORE doesn't work as expected. Workaround this + * by replacing the ALU_PUSH_BEFORE with a PUSH + ALU */ + if (ctx->bc->chip_class == CAYMAN && ctx->bc->stack.loop > 1) { + r600_bytecode_add_cfinst(ctx->bc, CF_OP_PUSH); + ctx->bc->cf_last->cf_addr = ctx->bc->cf_last->id + 2; + alu_type = CF_OP_ALU; + } + + emit_logic_pred(ctx, opcode, alu_type); - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_JUMP); fc_pushlevel(ctx, FC_IF); - callstack_check_depth(ctx, FC_PUSH_VPM, 0); + callstack_push(ctx, FC_PUSH_VPM); return 0; } +static int tgsi_if(struct r600_shader_ctx *ctx) +{ + return emit_if(ctx, ALU_OP2_PRED_SETNE); +} + +static int tgsi_uif(struct r600_shader_ctx *ctx) +{ + return emit_if(ctx, ALU_OP2_PRED_SETNE_INT); +} + static int tgsi_else(struct r600_shader_ctx *ctx) { - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_ELSE)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_ELSE); ctx->bc->cf_last->pop_count = 1; fc_set_mid(ctx, ctx->bc->fc_sp); @@ -5686,7 +5812,7 @@ static int tgsi_endif(struct r600_shader_ctx *ctx) } fc_poplevel(ctx); - callstack_decrease_current(ctx, FC_PUSH_VPM); + callstack_pop(ctx, FC_PUSH_VPM); return 0; } @@ -5694,12 +5820,12 @@ static int tgsi_bgnloop(struct r600_shader_ctx *ctx) { /* LOOP_START_DX10 ignores the LOOP_CONFIG* registers, so it is not * limited to 4096 iterations, like the other LOOP_* instructions. */ - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_LOOP_START_DX10); fc_pushlevel(ctx, FC_LOOP); /* check stack depth */ - callstack_check_depth(ctx, FC_LOOP, 0); + callstack_push(ctx, FC_LOOP); return 0; } @@ -5707,7 +5833,7 @@ static int tgsi_endloop(struct r600_shader_ctx *ctx) { int i; - r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END)); + r600_bytecode_add_cfinst(ctx->bc, CF_OP_LOOP_END); if (ctx->bc->fc_stack[ctx->bc->fc_sp].type != FC_LOOP) { R600_ERR("loop/endloop in shader code are not paired.\n"); @@ -5728,7 +5854,7 @@ static int tgsi_endloop(struct r600_shader_ctx *ctx) } /* XXX add LOOPRET support */ fc_poplevel(ctx); - callstack_decrease_current(ctx, FC_LOOP); + callstack_pop(ctx, FC_LOOP); return 0; } @@ -5747,11 +5873,10 @@ static int tgsi_loop_brk_cont(struct r600_shader_ctx *ctx) return -EINVAL; } - r600_bytecode_add_cfinst(ctx->bc, ctx->inst_info->r600_opcode); + r600_bytecode_add_cfinst(ctx->bc, ctx->inst_info->op); fc_set_mid(ctx, fscp); - callstack_check_depth(ctx, FC_PUSH_VPM, 1); return 0; } @@ -5759,7 +5884,7 @@ static int tgsi_umad(struct r600_shader_ctx *ctx) { struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; struct r600_bytecode_alu alu; - int i, j, r; + int i, j, k, r; int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); /* src0 * src1 */ @@ -5767,21 +5892,40 @@ static int tgsi_umad(struct r600_shader_ctx *ctx) if (!(inst->Dst[0].Register.WriteMask & (1 << i))) continue; - memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + if (ctx->bc->chip_class == CAYMAN) { + for (j = 0 ; j < 4; j++) { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.dst.chan = i; - alu.dst.sel = ctx->temp_reg; - alu.dst.write = 1; + alu.op = ALU_OP2_MULLO_UINT; + for (k = 0; k < inst->Instruction.NumSrcRegs; k++) { + r600_bytecode_src(&alu.src[k], &ctx->src[k], i); + } + tgsi_dst(ctx, &inst->Dst[0], j, &alu.dst); + alu.dst.sel = ctx->temp_reg; + alu.dst.write = (j == i); + if (j == 3) + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } + } else { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); - for (j = 0; j < 2; j++) { - r600_bytecode_src(&alu.src[j], &ctx->src[j], i); - } + alu.dst.chan = i; + alu.dst.sel = ctx->temp_reg; + alu.dst.write = 1; - alu.last = 1; - r = r600_bytecode_add_alu(ctx->bc, &alu); - if (r) - return r; + alu.op = ALU_OP2_MULLO_UINT; + for (j = 0; j < 2; j++) { + r600_bytecode_src(&alu.src[j], &ctx->src[j], i); + } + + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } } @@ -5792,7 +5936,7 @@ static int tgsi_umad(struct r600_shader_ctx *ctx) memset(&alu, 0, sizeof(struct r600_bytecode_alu)); tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT); + alu.op = ALU_OP2_ADD_INT; alu.src[0].sel = ctx->temp_reg; alu.src[0].chan = i; @@ -5809,166 +5953,166 @@ static int tgsi_umad(struct r600_shader_ctx *ctx) } static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { - {TGSI_OPCODE_ARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_r600_arl}, - {TGSI_OPCODE_MOV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, - {TGSI_OPCODE_LIT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lit}, + {TGSI_OPCODE_ARL, 0, ALU_OP0_NOP, tgsi_r600_arl}, + {TGSI_OPCODE_MOV, 0, ALU_OP1_MOV, tgsi_op2}, + {TGSI_OPCODE_LIT, 0, ALU_OP0_NOP, tgsi_lit}, /* XXX: * For state trackers other than OpenGL, we'll want to use * _RECIP_IEEE instead. */ - {TGSI_OPCODE_RCP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED, tgsi_trans_srcx_replicate}, - - {TGSI_OPCODE_RSQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_rsq}, - {TGSI_OPCODE_EXP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_exp}, - {TGSI_OPCODE_LOG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_log}, - {TGSI_OPCODE_MUL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL, tgsi_op2}, - {TGSI_OPCODE_ADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, tgsi_op2}, - {TGSI_OPCODE_DP3, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_DP4, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_DST, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_opdst}, - {TGSI_OPCODE_MIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN, tgsi_op2}, - {TGSI_OPCODE_MAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX, tgsi_op2}, - {TGSI_OPCODE_SLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2_swap}, - {TGSI_OPCODE_SGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_op2}, - {TGSI_OPCODE_MAD, 1, V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, tgsi_op3}, - {TGSI_OPCODE_SUB, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, tgsi_op2}, - {TGSI_OPCODE_LRP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lrp}, - {TGSI_OPCODE_CND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RCP, 0, ALU_OP1_RECIP_CLAMPED, tgsi_trans_srcx_replicate}, + + {TGSI_OPCODE_RSQ, 0, ALU_OP0_NOP, tgsi_rsq}, + {TGSI_OPCODE_EXP, 0, ALU_OP0_NOP, tgsi_exp}, + {TGSI_OPCODE_LOG, 0, ALU_OP0_NOP, tgsi_log}, + {TGSI_OPCODE_MUL, 0, ALU_OP2_MUL, tgsi_op2}, + {TGSI_OPCODE_ADD, 0, ALU_OP2_ADD, tgsi_op2}, + {TGSI_OPCODE_DP3, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_DP4, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_DST, 0, ALU_OP0_NOP, tgsi_opdst}, + {TGSI_OPCODE_MIN, 0, ALU_OP2_MIN, tgsi_op2}, + {TGSI_OPCODE_MAX, 0, ALU_OP2_MAX, tgsi_op2}, + {TGSI_OPCODE_SLT, 0, ALU_OP2_SETGT, tgsi_op2_swap}, + {TGSI_OPCODE_SGE, 0, ALU_OP2_SETGE, tgsi_op2}, + {TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3}, + {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, + {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, + {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {20, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DP2A, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {20, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {22, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {23, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_FRC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT, tgsi_op2}, - {TGSI_OPCODE_CLAMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_FLR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR, tgsi_op2}, - {TGSI_OPCODE_ROUND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2}, - {TGSI_OPCODE_EX2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, tgsi_trans_srcx_replicate}, - {TGSI_OPCODE_LG2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE, tgsi_trans_srcx_replicate}, - {TGSI_OPCODE_POW, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_pow}, - {TGSI_OPCODE_XPD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_xpd}, + {22, 0, ALU_OP0_NOP, tgsi_unsupported}, + {23, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FRC, 0, ALU_OP1_FRACT, tgsi_op2}, + {TGSI_OPCODE_CLAMP, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FLR, 0, ALU_OP1_FLOOR, tgsi_op2}, + {TGSI_OPCODE_ROUND, 0, ALU_OP1_RNDNE, tgsi_op2}, + {TGSI_OPCODE_EX2, 0, ALU_OP1_EXP_IEEE, tgsi_trans_srcx_replicate}, + {TGSI_OPCODE_LG2, 0, ALU_OP1_LOG_IEEE, tgsi_trans_srcx_replicate}, + {TGSI_OPCODE_POW, 0, ALU_OP0_NOP, tgsi_pow}, + {TGSI_OPCODE_XPD, 0, ALU_OP0_NOP, tgsi_xpd}, /* gap */ - {32, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ABS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, - {TGSI_OPCODE_RCC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DPH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_COS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS, tgsi_trig}, - {TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex}, - {TGSI_OPCODE_DDY, 0, SQ_TEX_INST_GET_GRADIENTS_V, tgsi_tex}, - {TGSI_OPCODE_KILP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT, tgsi_kill}, /* predicated kill */ - {TGSI_OPCODE_PK2H, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK2US, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK4B, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK4UB, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_RFL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2}, - {TGSI_OPCODE_SFL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SGT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2}, - {TGSI_OPCODE_SIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN, tgsi_trig}, - {TGSI_OPCODE_SLE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_op2_swap}, - {TGSI_OPCODE_SNE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE, tgsi_op2}, - {TGSI_OPCODE_STR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TEX, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_TXD, 0, SQ_TEX_INST_SAMPLE_G, tgsi_tex}, - {TGSI_OPCODE_TXP, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_UP2H, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP2US, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP4B, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP4UB, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_X2D, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ARA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ARR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_r600_arl}, - {TGSI_OPCODE_BRA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CAL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_RET, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SSG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg}, - {TGSI_OPCODE_CMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_cmp}, - {TGSI_OPCODE_SCS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_scs}, - {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex}, - {TGSI_OPCODE_NRM, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DP2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_TXL, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_BRK, 0, V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK, tgsi_loop_brk_cont}, - {TGSI_OPCODE_IF, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_if}, + {32, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ABS, 0, ALU_OP1_MOV, tgsi_op2}, + {TGSI_OPCODE_RCC, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DPH, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_COS, 0, ALU_OP1_COS, tgsi_trig}, + {TGSI_OPCODE_DDX, 0, FETCH_OP_GET_GRADIENTS_H, tgsi_tex}, + {TGSI_OPCODE_DDY, 0, FETCH_OP_GET_GRADIENTS_V, tgsi_tex}, + {TGSI_OPCODE_KILP, 0, ALU_OP2_KILLGT, tgsi_kill}, /* predicated kill */ + {TGSI_OPCODE_PK2H, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK2US, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK4B, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK4UB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RFL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SEQ, 0, ALU_OP2_SETE, tgsi_op2}, + {TGSI_OPCODE_SFL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SGT, 0, ALU_OP2_SETGT, tgsi_op2}, + {TGSI_OPCODE_SIN, 0, ALU_OP1_SIN, tgsi_trig}, + {TGSI_OPCODE_SLE, 0, ALU_OP2_SETGE, tgsi_op2_swap}, + {TGSI_OPCODE_SNE, 0, ALU_OP2_SETNE, tgsi_op2}, + {TGSI_OPCODE_STR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TEX, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_TXD, 0, FETCH_OP_SAMPLE_G, tgsi_tex}, + {TGSI_OPCODE_TXP, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_UP2H, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP2US, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_r600_arl}, + {TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RET, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SSG, 0, ALU_OP0_NOP, tgsi_ssg}, + {TGSI_OPCODE_CMP, 0, ALU_OP0_NOP, tgsi_cmp}, + {TGSI_OPCODE_SCS, 0, ALU_OP0_NOP, tgsi_scs}, + {TGSI_OPCODE_TXB, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, + {TGSI_OPCODE_NRM, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DIV, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DP2, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_TXL, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, + {TGSI_OPCODE_BRK, 0, CF_OP_LOOP_BREAK, tgsi_loop_brk_cont}, + {TGSI_OPCODE_IF, 0, ALU_OP0_NOP, tgsi_if}, + {TGSI_OPCODE_UIF, 0, ALU_OP0_NOP, tgsi_uif}, + {76, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ELSE, 0, ALU_OP0_NOP, tgsi_else}, + {TGSI_OPCODE_ENDIF, 0, ALU_OP0_NOP, tgsi_endif}, /* gap */ - {75, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {76, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ELSE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_else}, - {TGSI_OPCODE_ENDIF, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_endif}, + {79, 0, ALU_OP0_NOP, tgsi_unsupported}, + {80, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PUSHA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_POPA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CEIL, 0, ALU_OP1_CEIL, tgsi_op2}, + {TGSI_OPCODE_I2F, 0, ALU_OP1_INT_TO_FLT, tgsi_op2_trans}, + {TGSI_OPCODE_NOT, 0, ALU_OP1_NOT_INT, tgsi_op2}, + {TGSI_OPCODE_TRUNC, 0, ALU_OP1_TRUNC, tgsi_op2}, + {TGSI_OPCODE_SHL, 0, ALU_OP2_LSHL_INT, tgsi_op2_trans}, /* gap */ - {79, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {80, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PUSHA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_POPA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CEIL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL, tgsi_op2}, - {TGSI_OPCODE_I2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2_trans}, - {TGSI_OPCODE_NOT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2}, - {TGSI_OPCODE_TRUNC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2}, - {TGSI_OPCODE_SHL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT, tgsi_op2_trans}, + {88, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_AND, 0, ALU_OP2_AND_INT, tgsi_op2}, + {TGSI_OPCODE_OR, 0, ALU_OP2_OR_INT, tgsi_op2}, + {TGSI_OPCODE_MOD, 0, ALU_OP0_NOP, tgsi_imod}, + {TGSI_OPCODE_XOR, 0, ALU_OP2_XOR_INT, tgsi_op2}, + {TGSI_OPCODE_SAD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TXF, 0, FETCH_OP_LD, tgsi_tex}, + {TGSI_OPCODE_TXQ, 0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, + {TGSI_OPCODE_CONT, 0, CF_OP_LOOP_CONTINUE, tgsi_loop_brk_cont}, + {TGSI_OPCODE_EMIT, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDPRIM, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BGNLOOP, 0, ALU_OP0_NOP, tgsi_bgnloop}, + {TGSI_OPCODE_BGNSUB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDLOOP, 0, ALU_OP0_NOP, tgsi_endloop}, + {TGSI_OPCODE_ENDSUB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TXQ_LZ, 0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, /* gap */ - {88, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_AND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2}, - {TGSI_OPCODE_OR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT, tgsi_op2}, - {TGSI_OPCODE_MOD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_imod}, - {TGSI_OPCODE_XOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2}, - {TGSI_OPCODE_SAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TXF, 0, SQ_TEX_INST_LD, tgsi_tex}, - {TGSI_OPCODE_TXQ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex}, - {TGSI_OPCODE_CONT, 0, V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE, tgsi_loop_brk_cont}, - {TGSI_OPCODE_EMIT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDPRIM, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BGNLOOP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_bgnloop}, - {TGSI_OPCODE_BGNSUB, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDLOOP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_endloop}, - {TGSI_OPCODE_ENDSUB, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TXQ_LZ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex}, + {104, 0, ALU_OP0_NOP, tgsi_unsupported}, + {105, 0, ALU_OP0_NOP, tgsi_unsupported}, + {106, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_NOP, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {104, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {105, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {106, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_NOP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {108, 0, ALU_OP0_NOP, tgsi_unsupported}, + {109, 0, ALU_OP0_NOP, tgsi_unsupported}, + {110, 0, ALU_OP0_NOP, tgsi_unsupported}, + {111, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_NRM4, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CALLNZ, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {108, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {109, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {110, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {111, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_NRM4, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CALLNZ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_IFC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BREAKC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_KIL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT, tgsi_kill}, /* conditional kill */ - {TGSI_OPCODE_END, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end}, /* aka HALT */ + {114, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BREAKC, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_KIL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */ + {TGSI_OPCODE_END, 0, ALU_OP0_NOP, tgsi_end}, /* aka HALT */ /* gap */ - {118, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_F2I, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2_trans}, - {TGSI_OPCODE_IDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv}, - {TGSI_OPCODE_IMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2}, - {TGSI_OPCODE_IMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2}, - {TGSI_OPCODE_INEG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT, tgsi_ineg}, - {TGSI_OPCODE_ISGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2}, - {TGSI_OPCODE_ISHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2_trans}, - {TGSI_OPCODE_ISLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap}, - {TGSI_OPCODE_F2U, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2_trans}, - {TGSI_OPCODE_U2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans}, - {TGSI_OPCODE_UADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2}, - {TGSI_OPCODE_UDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv}, - {TGSI_OPCODE_UMAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umad}, - {TGSI_OPCODE_UMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT, tgsi_op2}, - {TGSI_OPCODE_UMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT, tgsi_op2}, - {TGSI_OPCODE_UMOD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umod}, - {TGSI_OPCODE_UMUL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT, tgsi_op2_trans}, - {TGSI_OPCODE_USEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT, tgsi_op2}, - {TGSI_OPCODE_USGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT, tgsi_op2}, - {TGSI_OPCODE_USHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT, tgsi_op2_trans}, - {TGSI_OPCODE_USLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT, tgsi_op2_swap}, - {TGSI_OPCODE_USNE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT, tgsi_op2_swap}, - {TGSI_OPCODE_SWITCH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CASE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DEFAULT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDSWITCH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {118, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_F2I, 0, ALU_OP1_FLT_TO_INT, tgsi_op2_trans}, + {TGSI_OPCODE_IDIV, 0, ALU_OP0_NOP, tgsi_idiv}, + {TGSI_OPCODE_IMAX, 0, ALU_OP2_MAX_INT, tgsi_op2}, + {TGSI_OPCODE_IMIN, 0, ALU_OP2_MIN_INT, tgsi_op2}, + {TGSI_OPCODE_INEG, 0, ALU_OP2_SUB_INT, tgsi_ineg}, + {TGSI_OPCODE_ISGE, 0, ALU_OP2_SETGE_INT, tgsi_op2}, + {TGSI_OPCODE_ISHR, 0, ALU_OP2_ASHR_INT, tgsi_op2_trans}, + {TGSI_OPCODE_ISLT, 0, ALU_OP2_SETGT_INT, tgsi_op2_swap}, + {TGSI_OPCODE_F2U, 0, ALU_OP1_FLT_TO_UINT, tgsi_op2_trans}, + {TGSI_OPCODE_U2F, 0, ALU_OP1_UINT_TO_FLT, tgsi_op2_trans}, + {TGSI_OPCODE_UADD, 0, ALU_OP2_ADD_INT, tgsi_op2}, + {TGSI_OPCODE_UDIV, 0, ALU_OP0_NOP, tgsi_udiv}, + {TGSI_OPCODE_UMAD, 0, ALU_OP0_NOP, tgsi_umad}, + {TGSI_OPCODE_UMAX, 0, ALU_OP2_MAX_UINT, tgsi_op2}, + {TGSI_OPCODE_UMIN, 0, ALU_OP2_MIN_UINT, tgsi_op2}, + {TGSI_OPCODE_UMOD, 0, ALU_OP0_NOP, tgsi_umod}, + {TGSI_OPCODE_UMUL, 0, ALU_OP2_MULLO_UINT, tgsi_op2_trans}, + {TGSI_OPCODE_USEQ, 0, ALU_OP2_SETE_INT, tgsi_op2}, + {TGSI_OPCODE_USGE, 0, ALU_OP2_SETGE_UINT, tgsi_op2}, + {TGSI_OPCODE_USHR, 0, ALU_OP2_LSHR_INT, tgsi_op2_trans}, + {TGSI_OPCODE_USLT, 0, ALU_OP2_SETGT_UINT, tgsi_op2_swap}, + {TGSI_OPCODE_USNE, 0, ALU_OP2_SETNE_INT, tgsi_op2_swap}, + {TGSI_OPCODE_SWITCH, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CASE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DEFAULT, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDSWITCH, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_I, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported}, @@ -5981,187 +6125,187 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {TGSI_OPCODE_SVIEWINFO, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported}, - {TGSI_OPCODE_UARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_r600_arl}, - {TGSI_OPCODE_UCMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ucmp}, + {TGSI_OPCODE_UARL, 0, ALU_OP1_MOVA_INT, tgsi_r600_arl}, + {TGSI_OPCODE_UCMP, 0, ALU_OP0_NOP, tgsi_ucmp}, {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs}, {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg}, - {TGSI_OPCODE_LOAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_STORE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_MFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_LFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BARRIER, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMXCHG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMCAS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMAND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMXOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMIMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMIMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TEX2, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_TXB2, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex}, - {TGSI_OPCODE_TXL2, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_LAST, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_LOAD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_STORE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_MFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_LFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BARRIER, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUADD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMXCHG, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMCAS, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMAND, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMOR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMXOR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUMIN, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUMAX, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMIMIN, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMIMAX, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, + {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, + {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported}, }; static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = { - {TGSI_OPCODE_ARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_eg_arl}, - {TGSI_OPCODE_MOV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, - {TGSI_OPCODE_LIT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lit}, - {TGSI_OPCODE_RCP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE, tgsi_trans_srcx_replicate}, - {TGSI_OPCODE_RSQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE, tgsi_rsq}, - {TGSI_OPCODE_EXP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_exp}, - {TGSI_OPCODE_LOG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_log}, - {TGSI_OPCODE_MUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL, tgsi_op2}, - {TGSI_OPCODE_ADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, tgsi_op2}, - {TGSI_OPCODE_DP3, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_DP4, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_DST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_opdst}, - {TGSI_OPCODE_MIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN, tgsi_op2}, - {TGSI_OPCODE_MAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX, tgsi_op2}, - {TGSI_OPCODE_SLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2_swap}, - {TGSI_OPCODE_SGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_op2}, - {TGSI_OPCODE_MAD, 1, EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, tgsi_op3}, - {TGSI_OPCODE_SUB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, tgsi_op2}, - {TGSI_OPCODE_LRP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lrp}, - {TGSI_OPCODE_CND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARL, 0, ALU_OP0_NOP, tgsi_eg_arl}, + {TGSI_OPCODE_MOV, 0, ALU_OP1_MOV, tgsi_op2}, + {TGSI_OPCODE_LIT, 0, ALU_OP0_NOP, tgsi_lit}, + {TGSI_OPCODE_RCP, 0, ALU_OP1_RECIP_IEEE, tgsi_trans_srcx_replicate}, + {TGSI_OPCODE_RSQ, 0, ALU_OP1_RECIPSQRT_IEEE, tgsi_rsq}, + {TGSI_OPCODE_EXP, 0, ALU_OP0_NOP, tgsi_exp}, + {TGSI_OPCODE_LOG, 0, ALU_OP0_NOP, tgsi_log}, + {TGSI_OPCODE_MUL, 0, ALU_OP2_MUL, tgsi_op2}, + {TGSI_OPCODE_ADD, 0, ALU_OP2_ADD, tgsi_op2}, + {TGSI_OPCODE_DP3, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_DP4, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_DST, 0, ALU_OP0_NOP, tgsi_opdst}, + {TGSI_OPCODE_MIN, 0, ALU_OP2_MIN, tgsi_op2}, + {TGSI_OPCODE_MAX, 0, ALU_OP2_MAX, tgsi_op2}, + {TGSI_OPCODE_SLT, 0, ALU_OP2_SETGT, tgsi_op2_swap}, + {TGSI_OPCODE_SGE, 0, ALU_OP2_SETGE, tgsi_op2}, + {TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3}, + {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, + {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, + {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {20, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DP2A, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {20, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {22, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {23, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_FRC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT, tgsi_op2}, - {TGSI_OPCODE_CLAMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_FLR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR, tgsi_op2}, - {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2}, - {TGSI_OPCODE_EX2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, tgsi_trans_srcx_replicate}, - {TGSI_OPCODE_LG2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE, tgsi_trans_srcx_replicate}, - {TGSI_OPCODE_POW, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_pow}, - {TGSI_OPCODE_XPD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_xpd}, + {22, 0, ALU_OP0_NOP, tgsi_unsupported}, + {23, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FRC, 0, ALU_OP1_FRACT, tgsi_op2}, + {TGSI_OPCODE_CLAMP, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FLR, 0, ALU_OP1_FLOOR, tgsi_op2}, + {TGSI_OPCODE_ROUND, 0, ALU_OP1_RNDNE, tgsi_op2}, + {TGSI_OPCODE_EX2, 0, ALU_OP1_EXP_IEEE, tgsi_trans_srcx_replicate}, + {TGSI_OPCODE_LG2, 0, ALU_OP1_LOG_IEEE, tgsi_trans_srcx_replicate}, + {TGSI_OPCODE_POW, 0, ALU_OP0_NOP, tgsi_pow}, + {TGSI_OPCODE_XPD, 0, ALU_OP0_NOP, tgsi_xpd}, /* gap */ - {32, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ABS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, - {TGSI_OPCODE_RCC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DPH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_COS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS, tgsi_trig}, - {TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex}, - {TGSI_OPCODE_DDY, 0, SQ_TEX_INST_GET_GRADIENTS_V, tgsi_tex}, - {TGSI_OPCODE_KILP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT, tgsi_kill}, /* predicated kill */ - {TGSI_OPCODE_PK2H, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK2US, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK4B, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK4UB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_RFL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2}, - {TGSI_OPCODE_SFL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SGT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2}, - {TGSI_OPCODE_SIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN, tgsi_trig}, - {TGSI_OPCODE_SLE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_op2_swap}, - {TGSI_OPCODE_SNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE, tgsi_op2}, - {TGSI_OPCODE_STR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TEX, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_TXD, 0, SQ_TEX_INST_SAMPLE_G, tgsi_tex}, - {TGSI_OPCODE_TXP, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_UP2H, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP2US, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP4B, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP4UB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_X2D, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ARA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ARR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_eg_arl}, - {TGSI_OPCODE_BRA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CAL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_RET, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SSG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg}, - {TGSI_OPCODE_CMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_cmp}, - {TGSI_OPCODE_SCS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_scs}, - {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex}, - {TGSI_OPCODE_NRM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DP2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_TXL, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_BRK, 0, EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK, tgsi_loop_brk_cont}, - {TGSI_OPCODE_IF, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_if}, + {32, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ABS, 0, ALU_OP1_MOV, tgsi_op2}, + {TGSI_OPCODE_RCC, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DPH, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_COS, 0, ALU_OP1_COS, tgsi_trig}, + {TGSI_OPCODE_DDX, 0, FETCH_OP_GET_GRADIENTS_H, tgsi_tex}, + {TGSI_OPCODE_DDY, 0, FETCH_OP_GET_GRADIENTS_V, tgsi_tex}, + {TGSI_OPCODE_KILP, 0, ALU_OP2_KILLGT, tgsi_kill}, /* predicated kill */ + {TGSI_OPCODE_PK2H, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK2US, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK4B, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK4UB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RFL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SEQ, 0, ALU_OP2_SETE, tgsi_op2}, + {TGSI_OPCODE_SFL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SGT, 0, ALU_OP2_SETGT, tgsi_op2}, + {TGSI_OPCODE_SIN, 0, ALU_OP1_SIN, tgsi_trig}, + {TGSI_OPCODE_SLE, 0, ALU_OP2_SETGE, tgsi_op2_swap}, + {TGSI_OPCODE_SNE, 0, ALU_OP2_SETNE, tgsi_op2}, + {TGSI_OPCODE_STR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TEX, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_TXD, 0, FETCH_OP_SAMPLE_G, tgsi_tex}, + {TGSI_OPCODE_TXP, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_UP2H, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP2US, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl}, + {TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RET, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SSG, 0, ALU_OP0_NOP, tgsi_ssg}, + {TGSI_OPCODE_CMP, 0, ALU_OP0_NOP, tgsi_cmp}, + {TGSI_OPCODE_SCS, 0, ALU_OP0_NOP, tgsi_scs}, + {TGSI_OPCODE_TXB, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, + {TGSI_OPCODE_NRM, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DIV, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DP2, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_TXL, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, + {TGSI_OPCODE_BRK, 0, CF_OP_LOOP_BREAK, tgsi_loop_brk_cont}, + {TGSI_OPCODE_IF, 0, ALU_OP0_NOP, tgsi_if}, + {TGSI_OPCODE_UIF, 0, ALU_OP0_NOP, tgsi_uif}, + {76, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ELSE, 0, ALU_OP0_NOP, tgsi_else}, + {TGSI_OPCODE_ENDIF, 0, ALU_OP0_NOP, tgsi_endif}, /* gap */ - {75, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {76, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ELSE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_else}, - {TGSI_OPCODE_ENDIF, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_endif}, + {79, 0, ALU_OP0_NOP, tgsi_unsupported}, + {80, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PUSHA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_POPA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CEIL, 0, ALU_OP1_CEIL, tgsi_op2}, + {TGSI_OPCODE_I2F, 0, ALU_OP1_INT_TO_FLT, tgsi_op2_trans}, + {TGSI_OPCODE_NOT, 0, ALU_OP1_NOT_INT, tgsi_op2}, + {TGSI_OPCODE_TRUNC, 0, ALU_OP1_TRUNC, tgsi_op2}, + {TGSI_OPCODE_SHL, 0, ALU_OP2_LSHL_INT, tgsi_op2}, /* gap */ - {79, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {80, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PUSHA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_POPA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL, tgsi_op2}, - {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2_trans}, - {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2}, - {TGSI_OPCODE_TRUNC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2}, - {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT, tgsi_op2}, + {88, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_AND, 0, ALU_OP2_AND_INT, tgsi_op2}, + {TGSI_OPCODE_OR, 0, ALU_OP2_OR_INT, tgsi_op2}, + {TGSI_OPCODE_MOD, 0, ALU_OP0_NOP, tgsi_imod}, + {TGSI_OPCODE_XOR, 0, ALU_OP2_XOR_INT, tgsi_op2}, + {TGSI_OPCODE_SAD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TXF, 0, FETCH_OP_LD, tgsi_tex}, + {TGSI_OPCODE_TXQ, 0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, + {TGSI_OPCODE_CONT, 0, CF_OP_LOOP_CONTINUE, tgsi_loop_brk_cont}, + {TGSI_OPCODE_EMIT, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDPRIM, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BGNLOOP, 0, ALU_OP0_NOP, tgsi_bgnloop}, + {TGSI_OPCODE_BGNSUB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDLOOP, 0, ALU_OP0_NOP, tgsi_endloop}, + {TGSI_OPCODE_ENDSUB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TXQ_LZ, 0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, /* gap */ - {88, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2}, - {TGSI_OPCODE_OR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT, tgsi_op2}, - {TGSI_OPCODE_MOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_imod}, - {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2}, - {TGSI_OPCODE_SAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TXF, 0, SQ_TEX_INST_LD, tgsi_tex}, - {TGSI_OPCODE_TXQ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex}, - {TGSI_OPCODE_CONT, 0, EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE, tgsi_loop_brk_cont}, - {TGSI_OPCODE_EMIT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDPRIM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BGNLOOP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_bgnloop}, - {TGSI_OPCODE_BGNSUB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDLOOP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_endloop}, - {TGSI_OPCODE_ENDSUB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TXQ_LZ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex}, + {104, 0, ALU_OP0_NOP, tgsi_unsupported}, + {105, 0, ALU_OP0_NOP, tgsi_unsupported}, + {106, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_NOP, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {104, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {105, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {106, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_NOP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {108, 0, ALU_OP0_NOP, tgsi_unsupported}, + {109, 0, ALU_OP0_NOP, tgsi_unsupported}, + {110, 0, ALU_OP0_NOP, tgsi_unsupported}, + {111, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_NRM4, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CALLNZ, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {108, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {109, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {110, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {111, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_NRM4, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CALLNZ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_IFC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BREAKC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_KIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT, tgsi_kill}, /* conditional kill */ - {TGSI_OPCODE_END, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end}, /* aka HALT */ + {114, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BREAKC, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_KIL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */ + {TGSI_OPCODE_END, 0, ALU_OP0_NOP, tgsi_end}, /* aka HALT */ /* gap */ - {118, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_F2I, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_f2i}, - {TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv}, - {TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2}, - {TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2}, - {TGSI_OPCODE_INEG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT, tgsi_ineg}, - {TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2}, - {TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2}, - {TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap}, - {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_f2i}, - {TGSI_OPCODE_U2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans}, - {TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2}, - {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv}, - {TGSI_OPCODE_UMAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umad}, - {TGSI_OPCODE_UMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT, tgsi_op2}, - {TGSI_OPCODE_UMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT, tgsi_op2}, - {TGSI_OPCODE_UMOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umod}, - {TGSI_OPCODE_UMUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT, tgsi_op2_trans}, - {TGSI_OPCODE_USEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT, tgsi_op2}, - {TGSI_OPCODE_USGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT, tgsi_op2}, - {TGSI_OPCODE_USHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT, tgsi_op2}, - {TGSI_OPCODE_USLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT, tgsi_op2_swap}, - {TGSI_OPCODE_USNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT, tgsi_op2}, - {TGSI_OPCODE_SWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CASE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DEFAULT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDSWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {118, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_F2I, 0, ALU_OP1_FLT_TO_INT, tgsi_f2i}, + {TGSI_OPCODE_IDIV, 0, ALU_OP0_NOP, tgsi_idiv}, + {TGSI_OPCODE_IMAX, 0, ALU_OP2_MAX_INT, tgsi_op2}, + {TGSI_OPCODE_IMIN, 0, ALU_OP2_MIN_INT, tgsi_op2}, + {TGSI_OPCODE_INEG, 0, ALU_OP2_SUB_INT, tgsi_ineg}, + {TGSI_OPCODE_ISGE, 0, ALU_OP2_SETGE_INT, tgsi_op2}, + {TGSI_OPCODE_ISHR, 0, ALU_OP2_ASHR_INT, tgsi_op2}, + {TGSI_OPCODE_ISLT, 0, ALU_OP2_SETGT_INT, tgsi_op2_swap}, + {TGSI_OPCODE_F2U, 0, ALU_OP1_FLT_TO_UINT, tgsi_f2i}, + {TGSI_OPCODE_U2F, 0, ALU_OP1_UINT_TO_FLT, tgsi_op2_trans}, + {TGSI_OPCODE_UADD, 0, ALU_OP2_ADD_INT, tgsi_op2}, + {TGSI_OPCODE_UDIV, 0, ALU_OP0_NOP, tgsi_udiv}, + {TGSI_OPCODE_UMAD, 0, ALU_OP0_NOP, tgsi_umad}, + {TGSI_OPCODE_UMAX, 0, ALU_OP2_MAX_UINT, tgsi_op2}, + {TGSI_OPCODE_UMIN, 0, ALU_OP2_MIN_UINT, tgsi_op2}, + {TGSI_OPCODE_UMOD, 0, ALU_OP0_NOP, tgsi_umod}, + {TGSI_OPCODE_UMUL, 0, ALU_OP2_MULLO_UINT, tgsi_op2_trans}, + {TGSI_OPCODE_USEQ, 0, ALU_OP2_SETE_INT, tgsi_op2}, + {TGSI_OPCODE_USGE, 0, ALU_OP2_SETGE_UINT, tgsi_op2}, + {TGSI_OPCODE_USHR, 0, ALU_OP2_LSHR_INT, tgsi_op2}, + {TGSI_OPCODE_USLT, 0, ALU_OP2_SETGT_UINT, tgsi_op2_swap}, + {TGSI_OPCODE_USNE, 0, ALU_OP2_SETNE_INT, tgsi_op2}, + {TGSI_OPCODE_SWITCH, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CASE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DEFAULT, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDSWITCH, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_I, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported}, @@ -6174,187 +6318,187 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = { {TGSI_OPCODE_SVIEWINFO, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported}, - {TGSI_OPCODE_UARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_eg_arl}, - {TGSI_OPCODE_UCMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ucmp}, + {TGSI_OPCODE_UARL, 0, ALU_OP1_MOVA_INT, tgsi_eg_arl}, + {TGSI_OPCODE_UCMP, 0, ALU_OP0_NOP, tgsi_ucmp}, {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs}, {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg}, - {TGSI_OPCODE_LOAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_STORE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_MFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_LFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BARRIER, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMXCHG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMCAS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMAND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMXOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMIMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMIMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TEX2, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_TXB2, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex}, - {TGSI_OPCODE_TXL2, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_LOAD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_STORE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_MFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_LFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BARRIER, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUADD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMXCHG, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMCAS, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMAND, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMOR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMXOR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUMIN, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUMAX, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMIMIN, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMIMAX, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, + {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, + {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported}, }; static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = { - {TGSI_OPCODE_ARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_eg_arl}, - {TGSI_OPCODE_MOV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, - {TGSI_OPCODE_LIT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lit}, - {TGSI_OPCODE_RCP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE, cayman_emit_float_instr}, - {TGSI_OPCODE_RSQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE, cayman_emit_float_instr}, - {TGSI_OPCODE_EXP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_exp}, - {TGSI_OPCODE_LOG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_log}, - {TGSI_OPCODE_MUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL, tgsi_op2}, - {TGSI_OPCODE_ADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, tgsi_op2}, - {TGSI_OPCODE_DP3, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_DP4, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_DST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_opdst}, - {TGSI_OPCODE_MIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN, tgsi_op2}, - {TGSI_OPCODE_MAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX, tgsi_op2}, - {TGSI_OPCODE_SLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2_swap}, - {TGSI_OPCODE_SGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_op2}, - {TGSI_OPCODE_MAD, 1, EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, tgsi_op3}, - {TGSI_OPCODE_SUB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, tgsi_op2}, - {TGSI_OPCODE_LRP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lrp}, - {TGSI_OPCODE_CND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARL, 0, ALU_OP0_NOP, tgsi_eg_arl}, + {TGSI_OPCODE_MOV, 0, ALU_OP1_MOV, tgsi_op2}, + {TGSI_OPCODE_LIT, 0, ALU_OP0_NOP, tgsi_lit}, + {TGSI_OPCODE_RCP, 0, ALU_OP1_RECIP_IEEE, cayman_emit_float_instr}, + {TGSI_OPCODE_RSQ, 0, ALU_OP1_RECIPSQRT_IEEE, cayman_emit_float_instr}, + {TGSI_OPCODE_EXP, 0, ALU_OP0_NOP, tgsi_exp}, + {TGSI_OPCODE_LOG, 0, ALU_OP0_NOP, tgsi_log}, + {TGSI_OPCODE_MUL, 0, ALU_OP2_MUL, tgsi_op2}, + {TGSI_OPCODE_ADD, 0, ALU_OP2_ADD, tgsi_op2}, + {TGSI_OPCODE_DP3, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_DP4, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_DST, 0, ALU_OP0_NOP, tgsi_opdst}, + {TGSI_OPCODE_MIN, 0, ALU_OP2_MIN, tgsi_op2}, + {TGSI_OPCODE_MAX, 0, ALU_OP2_MAX, tgsi_op2}, + {TGSI_OPCODE_SLT, 0, ALU_OP2_SETGT, tgsi_op2_swap}, + {TGSI_OPCODE_SGE, 0, ALU_OP2_SETGE, tgsi_op2}, + {TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3}, + {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, + {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, + {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {20, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DP2A, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {20, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {22, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {23, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_FRC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT, tgsi_op2}, - {TGSI_OPCODE_CLAMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_FLR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR, tgsi_op2}, - {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2}, - {TGSI_OPCODE_EX2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, cayman_emit_float_instr}, - {TGSI_OPCODE_LG2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE, cayman_emit_float_instr}, - {TGSI_OPCODE_POW, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, cayman_pow}, - {TGSI_OPCODE_XPD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_xpd}, + {22, 0, ALU_OP0_NOP, tgsi_unsupported}, + {23, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FRC, 0, ALU_OP1_FRACT, tgsi_op2}, + {TGSI_OPCODE_CLAMP, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FLR, 0, ALU_OP1_FLOOR, tgsi_op2}, + {TGSI_OPCODE_ROUND, 0, ALU_OP1_RNDNE, tgsi_op2}, + {TGSI_OPCODE_EX2, 0, ALU_OP1_EXP_IEEE, cayman_emit_float_instr}, + {TGSI_OPCODE_LG2, 0, ALU_OP1_LOG_IEEE, cayman_emit_float_instr}, + {TGSI_OPCODE_POW, 0, ALU_OP0_NOP, cayman_pow}, + {TGSI_OPCODE_XPD, 0, ALU_OP0_NOP, tgsi_xpd}, /* gap */ - {32, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ABS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, - {TGSI_OPCODE_RCC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DPH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_COS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS, cayman_trig}, - {TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex}, - {TGSI_OPCODE_DDY, 0, SQ_TEX_INST_GET_GRADIENTS_V, tgsi_tex}, - {TGSI_OPCODE_KILP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT, tgsi_kill}, /* predicated kill */ - {TGSI_OPCODE_PK2H, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK2US, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK4B, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PK4UB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_RFL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2}, - {TGSI_OPCODE_SFL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SGT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2}, - {TGSI_OPCODE_SIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN, cayman_trig}, - {TGSI_OPCODE_SLE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_op2_swap}, - {TGSI_OPCODE_SNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE, tgsi_op2}, - {TGSI_OPCODE_STR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TEX, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_TXD, 0, SQ_TEX_INST_SAMPLE_G, tgsi_tex}, - {TGSI_OPCODE_TXP, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_UP2H, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP2US, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP4B, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UP4UB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_X2D, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ARA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ARR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_eg_arl}, - {TGSI_OPCODE_BRA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CAL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_RET, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SSG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg}, - {TGSI_OPCODE_CMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_cmp}, - {TGSI_OPCODE_SCS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_scs}, - {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex}, - {TGSI_OPCODE_NRM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DP2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp}, - {TGSI_OPCODE_TXL, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_BRK, 0, EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK, tgsi_loop_brk_cont}, - {TGSI_OPCODE_IF, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_if}, + {32, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ABS, 0, ALU_OP1_MOV, tgsi_op2}, + {TGSI_OPCODE_RCC, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DPH, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_COS, 0, ALU_OP1_COS, cayman_trig}, + {TGSI_OPCODE_DDX, 0, FETCH_OP_GET_GRADIENTS_H, tgsi_tex}, + {TGSI_OPCODE_DDY, 0, FETCH_OP_GET_GRADIENTS_V, tgsi_tex}, + {TGSI_OPCODE_KILP, 0, ALU_OP2_KILLGT, tgsi_kill}, /* predicated kill */ + {TGSI_OPCODE_PK2H, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK2US, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK4B, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PK4UB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RFL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SEQ, 0, ALU_OP2_SETE, tgsi_op2}, + {TGSI_OPCODE_SFL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SGT, 0, ALU_OP2_SETGT, tgsi_op2}, + {TGSI_OPCODE_SIN, 0, ALU_OP1_SIN, cayman_trig}, + {TGSI_OPCODE_SLE, 0, ALU_OP2_SETGE, tgsi_op2_swap}, + {TGSI_OPCODE_SNE, 0, ALU_OP2_SETNE, tgsi_op2}, + {TGSI_OPCODE_STR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TEX, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_TXD, 0, FETCH_OP_SAMPLE_G, tgsi_tex}, + {TGSI_OPCODE_TXP, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_UP2H, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP2US, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl}, + {TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_RET, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SSG, 0, ALU_OP0_NOP, tgsi_ssg}, + {TGSI_OPCODE_CMP, 0, ALU_OP0_NOP, tgsi_cmp}, + {TGSI_OPCODE_SCS, 0, ALU_OP0_NOP, tgsi_scs}, + {TGSI_OPCODE_TXB, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, + {TGSI_OPCODE_NRM, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DIV, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DP2, 0, ALU_OP2_DOT4, tgsi_dp}, + {TGSI_OPCODE_TXL, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, + {TGSI_OPCODE_BRK, 0, CF_OP_LOOP_BREAK, tgsi_loop_brk_cont}, + {TGSI_OPCODE_IF, 0, ALU_OP0_NOP, tgsi_if}, + {TGSI_OPCODE_UIF, 0, ALU_OP0_NOP, tgsi_uif}, + {76, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ELSE, 0, ALU_OP0_NOP, tgsi_else}, + {TGSI_OPCODE_ENDIF, 0, ALU_OP0_NOP, tgsi_endif}, /* gap */ - {75, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {76, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ELSE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_else}, - {TGSI_OPCODE_ENDIF, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_endif}, + {79, 0, ALU_OP0_NOP, tgsi_unsupported}, + {80, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_PUSHA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_POPA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CEIL, 0, ALU_OP1_CEIL, tgsi_op2}, + {TGSI_OPCODE_I2F, 0, ALU_OP1_INT_TO_FLT, tgsi_op2}, + {TGSI_OPCODE_NOT, 0, ALU_OP1_NOT_INT, tgsi_op2}, + {TGSI_OPCODE_TRUNC, 0, ALU_OP1_TRUNC, tgsi_op2}, + {TGSI_OPCODE_SHL, 0, ALU_OP2_LSHL_INT, tgsi_op2}, /* gap */ - {79, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {80, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_PUSHA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_POPA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL, tgsi_op2}, - {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2}, - {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2}, - {TGSI_OPCODE_TRUNC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2}, - {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT, tgsi_op2}, + {88, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_AND, 0, ALU_OP2_AND_INT, tgsi_op2}, + {TGSI_OPCODE_OR, 0, ALU_OP2_OR_INT, tgsi_op2}, + {TGSI_OPCODE_MOD, 0, ALU_OP0_NOP, tgsi_imod}, + {TGSI_OPCODE_XOR, 0, ALU_OP2_XOR_INT, tgsi_op2}, + {TGSI_OPCODE_SAD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TXF, 0, FETCH_OP_LD, tgsi_tex}, + {TGSI_OPCODE_TXQ, 0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, + {TGSI_OPCODE_CONT, 0, CF_OP_LOOP_CONTINUE, tgsi_loop_brk_cont}, + {TGSI_OPCODE_EMIT, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDPRIM, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BGNLOOP, 0, ALU_OP0_NOP, tgsi_bgnloop}, + {TGSI_OPCODE_BGNSUB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDLOOP, 0, ALU_OP0_NOP, tgsi_endloop}, + {TGSI_OPCODE_ENDSUB, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TXQ_LZ, 0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, /* gap */ - {88, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2}, - {TGSI_OPCODE_OR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT, tgsi_op2}, - {TGSI_OPCODE_MOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_imod}, - {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2}, - {TGSI_OPCODE_SAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TXF, 0, SQ_TEX_INST_LD, tgsi_tex}, - {TGSI_OPCODE_TXQ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex}, - {TGSI_OPCODE_CONT, 0, EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE, tgsi_loop_brk_cont}, - {TGSI_OPCODE_EMIT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDPRIM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BGNLOOP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_bgnloop}, - {TGSI_OPCODE_BGNSUB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDLOOP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_endloop}, - {TGSI_OPCODE_ENDSUB, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TXQ_LZ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex}, + {104, 0, ALU_OP0_NOP, tgsi_unsupported}, + {105, 0, ALU_OP0_NOP, tgsi_unsupported}, + {106, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_NOP, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {104, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {105, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {106, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_NOP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {108, 0, ALU_OP0_NOP, tgsi_unsupported}, + {109, 0, ALU_OP0_NOP, tgsi_unsupported}, + {110, 0, ALU_OP0_NOP, tgsi_unsupported}, + {111, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_NRM4, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CALLNZ, 0, ALU_OP0_NOP, tgsi_unsupported}, /* gap */ - {108, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {109, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {110, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {111, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_NRM4, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CALLNZ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_IFC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BREAKC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_KIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT, tgsi_kill}, /* conditional kill */ - {TGSI_OPCODE_END, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end}, /* aka HALT */ + {114, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BREAKC, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_KIL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */ + {TGSI_OPCODE_END, 0, ALU_OP0_NOP, tgsi_end}, /* aka HALT */ /* gap */ - {118, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_F2I, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2}, - {TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv}, - {TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2}, - {TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2}, - {TGSI_OPCODE_INEG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT, tgsi_ineg}, - {TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2}, - {TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2}, - {TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap}, - {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2}, - {TGSI_OPCODE_U2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2}, - {TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2}, - {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv}, - {TGSI_OPCODE_UMAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umad}, - {TGSI_OPCODE_UMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT, tgsi_op2}, - {TGSI_OPCODE_UMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT, tgsi_op2}, - {TGSI_OPCODE_UMOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umod}, - {TGSI_OPCODE_UMUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT, cayman_mul_int_instr}, - {TGSI_OPCODE_USEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT, tgsi_op2}, - {TGSI_OPCODE_USGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT, tgsi_op2}, - {TGSI_OPCODE_USHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT, tgsi_op2}, - {TGSI_OPCODE_USLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT, tgsi_op2_swap}, - {TGSI_OPCODE_USNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT, tgsi_op2}, - {TGSI_OPCODE_SWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_CASE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_DEFAULT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ENDSWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {118, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_F2I, 0, ALU_OP1_FLT_TO_INT, tgsi_op2}, + {TGSI_OPCODE_IDIV, 0, ALU_OP0_NOP, tgsi_idiv}, + {TGSI_OPCODE_IMAX, 0, ALU_OP2_MAX_INT, tgsi_op2}, + {TGSI_OPCODE_IMIN, 0, ALU_OP2_MIN_INT, tgsi_op2}, + {TGSI_OPCODE_INEG, 0, ALU_OP2_SUB_INT, tgsi_ineg}, + {TGSI_OPCODE_ISGE, 0, ALU_OP2_SETGE_INT, tgsi_op2}, + {TGSI_OPCODE_ISHR, 0, ALU_OP2_ASHR_INT, tgsi_op2}, + {TGSI_OPCODE_ISLT, 0, ALU_OP2_SETGT_INT, tgsi_op2_swap}, + {TGSI_OPCODE_F2U, 0, ALU_OP1_FLT_TO_UINT, tgsi_op2}, + {TGSI_OPCODE_U2F, 0, ALU_OP1_UINT_TO_FLT, tgsi_op2}, + {TGSI_OPCODE_UADD, 0, ALU_OP2_ADD_INT, tgsi_op2}, + {TGSI_OPCODE_UDIV, 0, ALU_OP0_NOP, tgsi_udiv}, + {TGSI_OPCODE_UMAD, 0, ALU_OP0_NOP, tgsi_umad}, + {TGSI_OPCODE_UMAX, 0, ALU_OP2_MAX_UINT, tgsi_op2}, + {TGSI_OPCODE_UMIN, 0, ALU_OP2_MIN_UINT, tgsi_op2}, + {TGSI_OPCODE_UMOD, 0, ALU_OP0_NOP, tgsi_umod}, + {TGSI_OPCODE_UMUL, 0, ALU_OP2_MULLO_INT, cayman_mul_int_instr}, + {TGSI_OPCODE_USEQ, 0, ALU_OP2_SETE_INT, tgsi_op2}, + {TGSI_OPCODE_USGE, 0, ALU_OP2_SETGE_UINT, tgsi_op2}, + {TGSI_OPCODE_USHR, 0, ALU_OP2_LSHR_INT, tgsi_op2}, + {TGSI_OPCODE_USLT, 0, ALU_OP2_SETGT_UINT, tgsi_op2_swap}, + {TGSI_OPCODE_USNE, 0, ALU_OP2_SETNE_INT, tgsi_op2}, + {TGSI_OPCODE_SWITCH, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_CASE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_DEFAULT, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ENDSWITCH, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_I, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported}, @@ -6367,28 +6511,28 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = { {TGSI_OPCODE_SVIEWINFO, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported}, {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported}, - {TGSI_OPCODE_UARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_eg_arl}, - {TGSI_OPCODE_UCMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ucmp}, + {TGSI_OPCODE_UARL, 0, ALU_OP1_MOVA_INT, tgsi_eg_arl}, + {TGSI_OPCODE_UCMP, 0, ALU_OP0_NOP, tgsi_ucmp}, {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs}, {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg}, - {TGSI_OPCODE_LOAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_STORE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_MFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_LFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_SFENCE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_BARRIER, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMXCHG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMCAS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMAND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMXOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMUMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMIMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ATOMIMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_TEX2, 0, SQ_TEX_INST_SAMPLE, tgsi_tex}, - {TGSI_OPCODE_TXB2, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex}, - {TGSI_OPCODE_TXL2, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_LOAD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_STORE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_MFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_LFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_SFENCE, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_BARRIER, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUADD, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMXCHG, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMCAS, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMAND, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMOR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMXOR, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUMIN, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMUMAX, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMIMIN, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ATOMIMAX, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex}, + {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, + {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, + {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported}, };