X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fr600%2Fr700_asm.c;h=adf5445a2f52432281dface2d7ccf0dcd9cad649;hb=10cc2518426eccdd2d232af9e2366be013e31af8;hp=04f8c6288f0b681798e05730ebdd5a3eb4b512ba;hpb=acef65503e79ce61a16bdba92462f0ed8a7b52c2;p=mesa.git

diff --git a/src/gallium/drivers/r600/r700_asm.c b/src/gallium/drivers/r600/r700_asm.c
index 04f8c6288f0..adf5445a2f5 100644
--- a/src/gallium/drivers/r600/r700_asm.c
+++ b/src/gallium/drivers/r600/r700_asm.c
@@ -30,7 +30,8 @@ void r700_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_c
 	*bytecode++ = S_SQ_CF_WORD1_CF_INST(r600_isa_cf_opcode(ISA_CC_R700, cf->op)) |
 			S_SQ_CF_WORD1_BARRIER(1) |
 			S_SQ_CF_WORD1_COUNT(count) |
-			S_SQ_CF_WORD1_COUNT_3(count >> 3);
+			S_SQ_CF_WORD1_COUNT_3(count >> 3)|
+			S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program);
 }
 
 int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
@@ -123,3 +124,42 @@ void r700_bytecode_alu_read(struct r600_bytecode *bc,
 			G_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(word1);
 	}
 }
+
+int r700_bytecode_fetch_mem_build(struct r600_bytecode *bc, struct r600_bytecode_vtx *mem, unsigned id)
+{
+	unsigned opcode = r600_isa_fetch_opcode(bc->isa->hw_class, mem->op) >> 8;
+
+	bc->bytecode[id++] = S_SQ_MEM_RD_WORD0_MEM_INST(2) |
+		S_SQ_MEM_RD_WORD0_ELEM_SIZE(mem->elem_size) |
+		S_SQ_MEM_RD_WORD0_FETCH_WHOLE_QUAD(0) |
+		S_SQ_MEM_RD_WORD0_MEM_OP(opcode) |
+		S_SQ_MEM_RD_WORD0_UNCACHED(mem->uncached) |
+		S_SQ_MEM_RD_WORD0_INDEXED(mem->indexed) |
+		S_SQ_MEM_RD_WORD0_SRC_SEL_Y(mem->src_sel_y) |
+		S_SQ_MEM_RD_WORD0_SRC_GPR(mem->src_gpr) |
+		S_SQ_MEM_RD_WORD0_SRC_REL(mem->src_rel) |
+		S_SQ_MEM_RD_WORD0_SRC_SEL_X(mem->src_sel_x) |
+		S_SQ_MEM_RD_WORD0_BURST_COUNT(mem->burst_count) |
+		S_SQ_MEM_RD_WORD0_LDS_REQ(0) |
+		S_SQ_MEM_RD_WORD0_COALESCED_READ(0);
+
+	bc->bytecode[id++] = S_SQ_MEM_RD_WORD1_DST_GPR(mem->dst_gpr) |
+		S_SQ_MEM_RD_WORD1_DST_REL(mem->dst_rel) |
+		S_SQ_MEM_RD_WORD1_DST_SEL_X(mem->dst_sel_x) |
+		S_SQ_MEM_RD_WORD1_DST_SEL_Y(mem->dst_sel_y) |
+		S_SQ_MEM_RD_WORD1_DST_SEL_W(mem->dst_sel_w) |
+		S_SQ_MEM_RD_WORD1_DST_SEL_Z(mem->dst_sel_z) |
+		S_SQ_MEM_RD_WORD1_DATA_FORMAT(mem->data_format) |
+		S_SQ_MEM_RD_WORD1_NUM_FORMAT_ALL(mem->num_format_all) |
+		S_SQ_MEM_RD_WORD1_FORMAT_COMP_ALL(mem->format_comp_all) |
+		S_SQ_MEM_RD_WORD1_SRF_MODE_ALL(mem->srf_mode_all);
+
+	bc->bytecode[id++] = S_SQ_MEM_RD_WORD2_ARRAY_BASE(mem->array_base) |
+		S_SQ_MEM_RD_WORD2_ENDIAN_SWAP(0) |
+		S_SQ_MEM_RD_WORD2_ARRAY_SIZE(mem->array_size);
+
+
+	bc->bytecode[id++] = 0; /* MEM ops are 4 word aligned */
+
+	return 0;
+}