X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fradeon%2Fradeon_llvm.h;h=ec16def204da2f7a681cc4086461eb65b9a02635;hb=d794072b3e1f27b96aaf2c476fcd5dcc5fd9d445;hp=9e05c2447eec4ac9b79c018376350699d334e21e;hpb=b9dad585e66b1031bdcbb148a19524ee2705baf7;p=mesa.git

diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h
index 9e05c2447ee..ec16def204d 100644
--- a/src/gallium/drivers/radeon/radeon_llvm.h
+++ b/src/gallium/drivers/radeon/radeon_llvm.h
@@ -51,42 +51,10 @@ struct radeon_llvm_loop {
 };
 
 struct radeon_llvm_context {
-
 	struct lp_build_tgsi_soa_context soa;
 
-	unsigned chip_class;
-	unsigned type;
-	unsigned face_gpr;
-	unsigned two_side;
-	unsigned clip_vertex;
-	unsigned inputs_count;
-	struct r600_shader_io * r600_inputs;
-	struct r600_shader_io * r600_outputs;
-	struct pipe_stream_output_info *stream_outputs;
-	unsigned color_buffer_count;
-	unsigned fs_color_all;
-	unsigned alpha_to_one;
-	unsigned has_txq_cube_array_z_comp;
-	unsigned uses_tex_buffers;
-	unsigned has_compressed_msaa_texturing;
-
 	/*=== Front end configuration ===*/
 
-	/* Special Intrinsics */
-
-	/** Write to an output register: float store_output(float, i32) */
-	const char * store_output_intr;
-
-	/** Swizzle a vector value: <4 x float> swizzle(<4 x float>, i32)
-	 * The swizzle is an unsigned integer that encodes a TGSI_SWIZZLE_* value
-	 * in 2-bits.
-	 * Swizzle{0-1} = X Channel
-	 * Swizzle{2-3} = Y Channel
-	 * Swizzle{4-5} = Z Channel
-	 * Swizzle{6-7} = W Channel
-	 */
-	const char * swizzle_intr;
-
 	/* Instructions that are not described by any of the TGSI opcodes. */
 
 	/** This function is responsible for initilizing the inputs array and will be
@@ -100,8 +68,8 @@ struct radeon_llvm_context {
 			unsigned index,
 			const struct tgsi_full_declaration *decl);
 
-	/** User data to use with the callbacks */
-	void * userdata;
+	void (*declare_memory_region)(struct radeon_llvm_context *,
+			const struct tgsi_full_declaration *decl);
 
 	/** This array contains the input values for the shader.  Typically these
 	  * values will be in the form of a target intrinsic that will inform the
@@ -109,7 +77,6 @@ struct radeon_llvm_context {
 	  */
 	LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
 	LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
-	unsigned output_reg_count;
 
 	/** This pointer is used to contain the temporary values.
 	  * The amount of temporary used in tgsi can't be bound to a max value and
@@ -132,6 +99,7 @@ struct radeon_llvm_context {
 	struct tgsi_declaration_range *arrays;
 
 	LLVMValueRef main_fn;
+	LLVMTypeRef return_type;
 
 	struct gallivm_state gallivm;
 };
@@ -177,10 +145,12 @@ void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context * bld_bas
 					  LLVMValueRef *coords_arg,
 					  LLVMValueRef *derivs_arg);
 
-void radeon_llvm_context_init(struct radeon_llvm_context * ctx);
+void radeon_llvm_context_init(struct radeon_llvm_context * ctx,
+                              const char *triple);
 
 void radeon_llvm_create_func(struct radeon_llvm_context * ctx,
-                             LLVMTypeRef *ParamTypes, unsigned ParamCount);
+			     LLVMTypeRef *return_types, unsigned num_return_elems,
+			     LLVMTypeRef *ParamTypes, unsigned ParamCount);
 
 void radeon_llvm_dispose(struct radeon_llvm_context * ctx);
 
@@ -201,9 +171,10 @@ build_tgsi_intrinsic_nomem(
 		struct lp_build_emit_data * emit_data);
 
 LLVMValueRef
-radeon_llvm_emit_fetch_double(struct lp_build_tgsi_context *bld_base,
-			      LLVMValueRef ptr,
-			      LLVMValueRef ptr2);
+radeon_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
+			     enum tgsi_opcode_type type,
+			     LLVMValueRef ptr,
+			     LLVMValueRef ptr2);
 
 LLVMValueRef radeon_llvm_saturate(struct lp_build_tgsi_context *bld_base,
                                   LLVMValueRef value);