X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fradeon%2Fradeon_setup_tgsi_llvm.c;h=18afbcb0a2e9f300010f72676764208b33a2a711;hb=413bc0a618d39873336cbfaf8fb5e43217f66ccf;hp=1690194a41763efa71fb60a6d4e4c9e7c4868b26;hpb=a984abdad39df2d8ceb4c46e11f4ce1344c36c86;p=mesa.git

diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 1690194a417..18afbcb0a2e 100644
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -637,6 +637,34 @@ static void uif_emit(
 	if_cond_emit(action, bld_base, emit_data, cond);
 }
 
+static void kill_if_fetch_args(
+	struct lp_build_tgsi_context * bld_base,
+	struct lp_build_emit_data * emit_data)
+{
+	const struct tgsi_full_instruction * inst = emit_data->inst;
+	struct gallivm_state *gallivm = bld_base->base.gallivm;
+	LLVMBuilderRef builder = gallivm->builder;
+	unsigned i;
+	LLVMValueRef conds[TGSI_NUM_CHANNELS];
+
+	for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
+		LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
+		conds[i] = LLVMBuildFCmp(builder, LLVMRealOLT, value,
+					bld_base->base.zero, "");
+	}
+
+	/* Or the conditions together */
+	for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
+		conds[i - 1] = LLVMBuildOr(builder, conds[i], conds[i - 1], "");
+	}
+
+	emit_data->dst_type = LLVMVoidTypeInContext(gallivm->context);
+	emit_data->arg_count = 1;
+	emit_data->args[0] = LLVMBuildSelect(builder, conds[0],
+					lp_build_const_float(gallivm, -1.0f),
+					bld_base->base.zero, "");
+}
+
 static void kil_emit(
 	const struct lp_build_tgsi_action * action,
 	struct lp_build_tgsi_context * bld_base,
@@ -1467,6 +1495,7 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
 	bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
 	bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
+	bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args;
 	bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
 	bld_base->op_actions[TGSI_OPCODE_KILL_IF].intr_name = "llvm.AMDGPU.kill";
 	bld_base->op_actions[TGSI_OPCODE_KILL].emit = lp_build_tgsi_intrinsic;
@@ -1579,6 +1608,7 @@ void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx)
 	LLVMAddLICMPass(gallivm->passmgr);
 	LLVMAddAggressiveDCEPass(gallivm->passmgr);
 	LLVMAddCFGSimplificationPass(gallivm->passmgr);
+	LLVMAddInstructionCombiningPass(gallivm->passmgr);
 
 	/* Run the pass */
 	LLVMRunFunctionPassManager(gallivm->passmgr, ctx->main_fn);