X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fradeonsi%2Fsi_compute_blit.c;h=958fa6e92994c876a9b38824570608361e2a85a8;hb=62e36ba43860fdbfb1a1058c64d0ec71734f7b0a;hp=ce19c428f1cfa8dfc1eea51eabbba9cdaac9ab2c;hpb=f57276309b14be8a61e1913ab00dd6e4b1e5e8ce;p=mesa.git diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index ce19c428f1c..958fa6e9299 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -435,6 +435,29 @@ void si_compute_copy_image(struct si_context *sctx, struct pipe_resource *dst, u assert(util_format_is_subsampled_422(src_format) == util_format_is_subsampled_422(dst_format)); + if (!vi_dcc_enabled((struct si_texture*)src, src_level) && + src_format == dst_format && + util_format_is_float(src_format) && + !util_format_is_compressed(src_format)) { + /* Interpret as integer values to avoid NaN issues */ + switch(util_format_get_blocksizebits(src_format)) { + case 16: + src_format = dst_format = PIPE_FORMAT_R16_UINT; + break; + case 32: + src_format = dst_format = PIPE_FORMAT_R32_UINT; + break; + case 64: + src_format = dst_format = PIPE_FORMAT_R32G32_UINT; + break; + case 128: + src_format = dst_format = PIPE_FORMAT_R32G32B32A32_UINT; + break; + default: + assert(false); + } + } + if (util_format_is_subsampled_422(src_format)) { src_format = dst_format = PIPE_FORMAT_R32_UINT; /* Interpreting 422 subsampled format (16 bpp) as 32 bpp @@ -495,9 +518,6 @@ void si_compute_copy_image(struct si_context *sctx, struct pipe_resource *dst, u image[1].u.tex.last_layer = dst->target == PIPE_TEXTURE_3D ? u_minify(dst->depth0, dst_level) - 1 : (unsigned)(dst->array_size - 1); - if (src->format == PIPE_FORMAT_R9G9B9E5_FLOAT) - image[0].format = image[1].format = PIPE_FORMAT_R32_UINT; - /* SNORM8 blitting has precision issues on some chips. Use the SINT * equivalent instead, which doesn't force DCC decompression. * Note that some chips avoid this issue by using SDMA.