X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fradeonsi%2Fsi_dma.c;h=309ae04424a652638676e1cf0eafa3ace45a6027;hb=aad43f0768edc0711d5f54ea79b052fb4f1d3321;hp=db523eef3185c5e22cd19f928e3c9acf36a488c4;hpb=ae4536b4f71cbe76230ea7edc7eb4d6041e651b4;p=mesa.git diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c index db523eef318..309ae04424a 100644 --- a/src/gallium/drivers/radeonsi/si_dma.c +++ b/src/gallium/drivers/radeonsi/si_dma.c @@ -30,21 +30,6 @@ #include "util/u_format.h" -static unsigned si_array_mode(unsigned mode) -{ - switch (mode) { - case RADEON_SURF_MODE_LINEAR_ALIGNED: - return V_009910_ARRAY_LINEAR_ALIGNED; - case RADEON_SURF_MODE_1D: - return V_009910_ARRAY_1D_TILED_THIN1; - case RADEON_SURF_MODE_2D: - return V_009910_ARRAY_2D_TILED_THIN1; - default: - case RADEON_SURF_MODE_LINEAR: - return V_009910_ARRAY_LINEAR_GENERAL; - } -} - static uint32_t si_micro_tile_mode(struct si_screen *sscreen, unsigned tile_mode) { if (sscreen->b.info.si_tile_mode_array_valid) { @@ -93,16 +78,16 @@ static void si_dma_copy_buffer(struct si_context *ctx, r600_need_dma_space(&ctx->b, ncopy * 5); - r600_context_bo_reloc(&ctx->b, &ctx->b.rings.dma, rsrc, RADEON_USAGE_READ, + radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, rsrc, RADEON_USAGE_READ, RADEON_PRIO_MIN); - r600_context_bo_reloc(&ctx->b, &ctx->b.rings.dma, rdst, RADEON_USAGE_WRITE, + radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, rdst, RADEON_USAGE_WRITE, RADEON_PRIO_MIN); for (i = 0; i < ncopy; i++) { csize = size < max_csize ? size : max_csize; cs->buf[cs->cdw++] = SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, csize); - cs->buf[cs->cdw++] = dst_offset & 0xffffffff; - cs->buf[cs->cdw++] = src_offset & 0xffffffff; + cs->buf[cs->cdw++] = dst_offset; + cs->buf[cs->cdw++] = src_offset; cs->buf[cs->cdw++] = (dst_offset >> 32UL) & 0xff; cs->buf[cs->cdw++] = (src_offset >> 32UL) & 0xff; dst_offset += csize << shift; @@ -192,9 +177,9 @@ static void si_dma_copy_tile(struct si_context *ctx, ncopy = (size / SI_DMA_COPY_MAX_SIZE_DW) + !!(size % SI_DMA_COPY_MAX_SIZE_DW); r600_need_dma_space(&ctx->b, ncopy * 9); - r600_context_bo_reloc(&ctx->b, &ctx->b.rings.dma, &rsrc->resource, + radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, &rsrc->resource, RADEON_USAGE_READ, RADEON_PRIO_MIN); - r600_context_bo_reloc(&ctx->b, &ctx->b.rings.dma, &rdst->resource, + radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, &rdst->resource, RADEON_USAGE_WRITE, RADEON_PRIO_MIN); for (i = 0; i < ncopy; i++) { @@ -240,11 +225,6 @@ void si_dma_copy(struct pipe_context *ctx, goto fallback; } - /* TODO: Implement DMA copy for CIK */ - if (sctx->b.chip_class >= CIK) { - goto fallback; - } - if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { si_dma_copy_buffer(sctx, dst, src, dst_x, src_box->x, src_box->width); return;