X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fradeonsi%2Fsi_shader.c;h=da1f8435da0ddf499411c869c581d24e8bfa1220;hb=b4b323c81ee8ea6e756f4c5110f7ac77545325f1;hp=0558cda194adec35f1098be7252a48c46146c96b;hpb=ed9391df3f6fde4cb0ac85f3fa4d5fc4409555a1;p=mesa.git diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 0558cda194a..da1f8435da0 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -46,8 +46,8 @@ bool si_is_multi_part_shader(struct si_shader *shader) return false; return shader->key.as_ls || shader->key.as_es || - shader->selector->type == PIPE_SHADER_TESS_CTRL || - shader->selector->type == PIPE_SHADER_GEOMETRY; + shader->selector->info.stage == MESA_SHADER_TESS_CTRL || + shader->selector->info.stage == MESA_SHADER_GEOMETRY; } /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */ @@ -159,7 +159,7 @@ static void declare_streamout_params(struct si_shader_context *ctx, struct pipe_stream_output_info *so) { if (ctx->screen->use_ngg_streamout) { - if (ctx->type == PIPE_SHADER_TESS_EVAL) + if (ctx->stage == MESA_SHADER_TESS_EVAL) ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); return; } @@ -168,7 +168,7 @@ static void declare_streamout_params(struct si_shader_context *ctx, if (so->num_outputs) { ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_config); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_write_index); - } else if (ctx->type == PIPE_SHADER_TESS_EVAL) { + } else if (ctx->stage == MESA_SHADER_TESS_EVAL) { ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); } @@ -183,20 +183,20 @@ static void declare_streamout_params(struct si_shader_context *ctx, unsigned si_get_max_workgroup_size(const struct si_shader *shader) { - switch (shader->selector->type) { - case PIPE_SHADER_VERTEX: - case PIPE_SHADER_TESS_EVAL: + switch (shader->selector->info.stage) { + case MESA_SHADER_VERTEX: + case MESA_SHADER_TESS_EVAL: return shader->key.as_ngg ? 128 : 0; - case PIPE_SHADER_TESS_CTRL: + case MESA_SHADER_TESS_CTRL: /* Return this so that LLVM doesn't remove s_barrier * instructions on chips where we use s_barrier. */ return shader->selector->screen->info.chip_class >= GFX7 ? 128 : 0; - case PIPE_SHADER_GEOMETRY: + case MESA_SHADER_GEOMETRY: return shader->selector->screen->info.chip_class >= GFX9 ? 128 : 0; - case PIPE_SHADER_COMPUTE: + case MESA_SHADER_COMPUTE: break; /* see below */ default: @@ -378,21 +378,21 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) unsigned i, num_return_sgprs; unsigned num_returns = 0; unsigned num_prolog_vgprs = 0; - unsigned type = ctx->type; + unsigned stage = ctx->stage; unsigned vs_blit_property = shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]; memset(&ctx->args, 0, sizeof(ctx->args)); /* Set MERGED shaders. */ if (ctx->screen->info.chip_class >= GFX9) { - if (shader->key.as_ls || type == PIPE_SHADER_TESS_CTRL) - type = SI_SHADER_MERGED_VERTEX_TESSCTRL; /* LS or HS */ - else if (shader->key.as_es || shader->key.as_ngg || type == PIPE_SHADER_GEOMETRY) - type = SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY; + if (shader->key.as_ls || stage == MESA_SHADER_TESS_CTRL) + stage = SI_SHADER_MERGED_VERTEX_TESSCTRL; /* LS or HS */ + else if (shader->key.as_es || shader->key.as_ngg || stage == MESA_SHADER_GEOMETRY) + stage = SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY; } - switch (type) { - case PIPE_SHADER_VERTEX: + switch (stage) { + case MESA_SHADER_VERTEX: declare_global_desc_pointers(ctx); if (vs_blit_property) { @@ -427,7 +427,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) } break; - case PIPE_SHADER_TESS_CTRL: /* GFX6-GFX8 */ + case MESA_SHADER_TESS_CTRL: /* GFX6-GFX8 */ declare_global_desc_pointers(ctx); declare_per_stage_desc_pointers(ctx, true); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout); @@ -453,7 +453,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) case SI_SHADER_MERGED_VERTEX_TESSCTRL: /* Merged stages have 8 system SGPRs at the beginning. */ /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */ - declare_per_stage_desc_pointers(ctx, ctx->type == PIPE_SHADER_TESS_CTRL); + declare_per_stage_desc_pointers(ctx, ctx->stage == MESA_SHADER_TESS_CTRL); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->merged_wave_info); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_factor_offset); @@ -462,7 +462,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused */ declare_global_desc_pointers(ctx); - declare_per_stage_desc_pointers(ctx, ctx->type == PIPE_SHADER_VERTEX); + declare_per_stage_desc_pointers(ctx, ctx->stage == MESA_SHADER_VERTEX); declare_vs_specific_input_sgprs(ctx); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout); @@ -474,7 +474,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_patch_id); ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_rel_ids); - if (ctx->type == PIPE_SHADER_VERTEX) { + if (ctx->stage == MESA_SHADER_VERTEX) { declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader); /* LS return values are inputs to the TCS main shader part. */ @@ -499,7 +499,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY: /* Merged stages have 8 system SGPRs at the beginning. */ /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */ - declare_per_stage_desc_pointers(ctx, ctx->type == PIPE_SHADER_GEOMETRY); + declare_per_stage_desc_pointers(ctx, ctx->stage == MESA_SHADER_GEOMETRY); if (ctx->shader->key.as_ngg) ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs_tg_info); @@ -515,12 +515,12 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) NULL); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */ declare_global_desc_pointers(ctx); - if (ctx->type != PIPE_SHADER_VERTEX || !vs_blit_property) { + if (ctx->stage != MESA_SHADER_VERTEX || !vs_blit_property) { declare_per_stage_desc_pointers( - ctx, (ctx->type == PIPE_SHADER_VERTEX || ctx->type == PIPE_SHADER_TESS_EVAL)); + ctx, (ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL)); } - if (ctx->type == PIPE_SHADER_VERTEX) { + if (ctx->stage == MESA_SHADER_VERTEX) { if (vs_blit_property) declare_vs_blit_inputs(ctx, vs_blit_property); else @@ -532,7 +532,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) /* Declare as many input SGPRs as the VS has. */ } - if (ctx->type == PIPE_SHADER_VERTEX) + if (ctx->stage == MESA_SHADER_VERTEX) declare_vb_descriptor_input_sgprs(ctx); /* VGPRs (first GS, then VS/TES) */ @@ -542,17 +542,17 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_invocation_id); ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx45_offset); - if (ctx->type == PIPE_SHADER_VERTEX) { + if (ctx->stage == MESA_SHADER_VERTEX) { declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader); - } else if (ctx->type == PIPE_SHADER_TESS_EVAL) { + } else if (ctx->stage == MESA_SHADER_TESS_EVAL) { declare_tes_input_vgprs(ctx, ngg_cull_shader); } if ((ctx->shader->key.as_es || ngg_cull_shader) && - (ctx->type == PIPE_SHADER_VERTEX || ctx->type == PIPE_SHADER_TESS_EVAL)) { + (ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL)) { unsigned num_user_sgprs, num_vgprs; - if (ctx->type == PIPE_SHADER_VERTEX) { + if (ctx->stage == MESA_SHADER_VERTEX) { /* For the NGG cull shader, add 1 SGPR to hold * the vertex buffer pointer. */ @@ -582,7 +582,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) } break; - case PIPE_SHADER_TESS_EVAL: + case MESA_SHADER_TESS_EVAL: declare_global_desc_pointers(ctx); declare_per_stage_desc_pointers(ctx, true); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits); @@ -602,7 +602,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) declare_tes_input_vgprs(ctx, ngg_cull_shader); break; - case PIPE_SHADER_GEOMETRY: + case MESA_SHADER_GEOMETRY: declare_global_desc_pointers(ctx); declare_per_stage_desc_pointers(ctx, true); ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs2vs_offset); @@ -619,7 +619,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_invocation_id); break; - case PIPE_SHADER_FRAGMENT: + case MESA_SHADER_FRAGMENT: declare_global_desc_pointers(ctx); declare_per_stage_desc_pointers(ctx, true); si_add_arg_checked(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL, SI_PARAM_ALPHA_REF); @@ -683,7 +683,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) returns[i] = ctx->ac.f32; break; - case PIPE_SHADER_COMPUTE: + case MESA_SHADER_COMPUTE: declare_global_desc_pointers(ctx); declare_per_stage_desc_pointers(ctx, true); if (shader->selector->info.uses_grid_size) @@ -737,7 +737,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) si_get_max_workgroup_size(shader)); /* Reserve register locations for VGPR inputs the PS prolog may need. */ - if (ctx->type == PIPE_SHADER_FRAGMENT && !ctx->shader->is_monolithic) { + if (ctx->stage == MESA_SHADER_FRAGMENT && !ctx->shader->is_monolithic) { ac_llvm_add_target_dep_function_attr( ctx->main_fn, "InitialPSInputAddr", S_0286D0_PERSP_SAMPLE_ENA(1) | S_0286D0_PERSP_CENTER_ENA(1) | @@ -752,7 +752,7 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) assert(shader->info.num_input_vgprs >= num_prolog_vgprs); shader->info.num_input_vgprs -= num_prolog_vgprs; - if (shader->key.as_ls || ctx->type == PIPE_SHADER_TESS_CTRL) { + if (shader->key.as_ls || ctx->stage == MESA_SHADER_TESS_CTRL) { if (USE_LDS_SYMBOLS && LLVM_VERSION_MAJOR >= 9) { /* The LSHS size is not known until draw time, so we append it * at the end of whatever LDS use there may be in the rest of @@ -770,10 +770,10 @@ void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader) /* Unlike radv, we override these arguments in the prolog, so to the * API shader they appear as normal arguments. */ - if (ctx->type == PIPE_SHADER_VERTEX) { + if (ctx->stage == MESA_SHADER_VERTEX) { ctx->abi.vertex_id = ac_get_arg(&ctx->ac, ctx->args.vertex_id); ctx->abi.instance_id = ac_get_arg(&ctx->ac, ctx->args.instance_id); - } else if (ctx->type == PIPE_SHADER_FRAGMENT) { + } else if (ctx->stage == MESA_SHADER_FRAGMENT) { ctx->abi.persp_centroid = ac_get_arg(&ctx->ac, ctx->args.persp_centroid); ctx->abi.linear_centroid = ac_get_arg(&ctx->ac, ctx->args.linear_centroid); } @@ -810,7 +810,7 @@ static bool si_shader_binary_open(struct si_screen *screen, struct si_shader *sh unsigned num_lds_symbols = 0; if (sel && screen->info.chip_class >= GFX9 && !shader->is_gs_copy_shader && - (sel->type == PIPE_SHADER_GEOMETRY || shader->key.as_ngg)) { + (sel->info.stage == MESA_SHADER_GEOMETRY || shader->key.as_ngg)) { /* We add this symbol even on LLVM <= 8 to ensure that * shader->config.lds_size is set correctly below. */ @@ -820,7 +820,7 @@ static bool si_shader_binary_open(struct si_screen *screen, struct si_shader *sh sym->align = 64 * 1024; } - if (shader->key.as_ngg && sel->type == PIPE_SHADER_GEOMETRY) { + if (shader->key.as_ngg && sel->info.stage == MESA_SHADER_GEOMETRY) { struct ac_rtld_symbol *sym = &lds_symbols[num_lds_symbols++]; sym->name = "ngg_emit"; sym->size = shader->ngg.ngg_emit_size * 4; @@ -833,7 +833,7 @@ static bool si_shader_binary_open(struct si_screen *screen, struct si_shader *sh { .halt_at_entry = screen->options.halt_shaders, }, - .shader_type = tgsi_processor_to_shader_stage(sel->type), + .shader_type = sel->info.stage, .wave_size = si_get_shader_wave_size(shader), .num_parts = num_parts, .elf_ptrs = part_elfs, @@ -979,8 +979,8 @@ static void si_calculate_max_simd_waves(struct si_shader *shader) max_simd_waves = sscreen->info.max_wave64_per_simd; /* Compute LDS usage for PS. */ - switch (shader->selector->type) { - case PIPE_SHADER_FRAGMENT: + switch (shader->selector->info.stage) { + case MESA_SHADER_FRAGMENT: /* The minimum usage per wave is (num_inputs * 48). The maximum * usage is (num_inputs * 48 * 16). * We can get anything in between and it varies between waves. @@ -993,7 +993,7 @@ static void si_calculate_max_simd_waves(struct si_shader *shader) */ lds_per_wave = conf->lds_size * lds_increment + align(num_inputs * 48, lds_increment); break; - case PIPE_SHADER_COMPUTE: + case MESA_SHADER_COMPUTE: if (shader->selector) { unsigned max_workgroup_size = si_get_max_workgroup_size(shader); lds_per_wave = (conf->lds_size * lds_increment) / @@ -1047,7 +1047,7 @@ static void si_shader_dump_stats(struct si_screen *sscreen, struct si_shader *sh const struct ac_shader_config *conf = &shader->config; if (!check_debug_option || si_can_dump_shader(sscreen, shader->selector->type)) { - if (shader->selector->type == PIPE_SHADER_FRAGMENT) { + if (shader->selector->info.stage == MESA_SHADER_FRAGMENT) { fprintf(file, "*** SHADER CONFIG ***\n" "SPI_PS_INPUT_ADDR = 0x%04x\n" @@ -1075,8 +1075,8 @@ static void si_shader_dump_stats(struct si_screen *sscreen, struct si_shader *sh const char *si_get_shader_name(const struct si_shader *shader) { - switch (shader->selector->type) { - case PIPE_SHADER_VERTEX: + switch (shader->selector->info.stage) { + case MESA_SHADER_VERTEX: if (shader->key.as_es) return "Vertex Shader as ES"; else if (shader->key.as_ls) @@ -1087,23 +1087,23 @@ const char *si_get_shader_name(const struct si_shader *shader) return "Vertex Shader as ESGS"; else return "Vertex Shader as VS"; - case PIPE_SHADER_TESS_CTRL: + case MESA_SHADER_TESS_CTRL: return "Tessellation Control Shader"; - case PIPE_SHADER_TESS_EVAL: + case MESA_SHADER_TESS_EVAL: if (shader->key.as_es) return "Tessellation Evaluation Shader as ES"; else if (shader->key.as_ngg) return "Tessellation Evaluation Shader as ESGS"; else return "Tessellation Evaluation Shader as VS"; - case PIPE_SHADER_GEOMETRY: + case MESA_SHADER_GEOMETRY: if (shader->is_gs_copy_shader) return "GS Copy Shader as VS"; else return "Geometry Shader"; - case PIPE_SHADER_FRAGMENT: + case MESA_SHADER_FRAGMENT: return "Pixel Shader"; - case PIPE_SHADER_COMPUTE: + case MESA_SHADER_COMPUTE: return "Compute Shader"; default: return "Unknown Shader"; @@ -1185,12 +1185,12 @@ static void si_dump_shader_key_vs(const struct si_shader_key *key, static void si_dump_shader_key(const struct si_shader *shader, FILE *f) { const struct si_shader_key *key = &shader->key; - enum pipe_shader_type shader_type = shader->selector->type; + gl_shader_stage stage = shader->selector->info.stage; fprintf(f, "SHADER KEY\n"); - switch (shader_type) { - case PIPE_SHADER_VERTEX: + switch (stage) { + case MESA_SHADER_VERTEX: si_dump_shader_key_vs(key, &key->part.vs.prolog, "part.vs.prolog", f); fprintf(f, " as_es = %u\n", key->as_es); fprintf(f, " as_ls = %u\n", key->as_ls); @@ -1209,7 +1209,7 @@ static void si_dump_shader_key(const struct si_shader *shader, FILE *f) fprintf(f, " opt.cs_halfz_clip_space = %u\n", key->opt.cs_halfz_clip_space); break; - case PIPE_SHADER_TESS_CTRL: + case MESA_SHADER_TESS_CTRL: if (shader->selector->screen->info.chip_class >= GFX9) { si_dump_shader_key_vs(key, &key->part.tcs.ls_prolog, "part.tcs.ls_prolog", f); } @@ -1218,18 +1218,18 @@ static void si_dump_shader_key(const struct si_shader *shader, FILE *f) key->mono.u.ff_tcs_inputs_to_copy); break; - case PIPE_SHADER_TESS_EVAL: + case MESA_SHADER_TESS_EVAL: fprintf(f, " as_es = %u\n", key->as_es); fprintf(f, " as_ngg = %u\n", key->as_ngg); fprintf(f, " mono.u.vs_export_prim_id = %u\n", key->mono.u.vs_export_prim_id); break; - case PIPE_SHADER_GEOMETRY: + case MESA_SHADER_GEOMETRY: if (shader->is_gs_copy_shader) break; if (shader->selector->screen->info.chip_class >= GFX9 && - key->part.gs.es->type == PIPE_SHADER_VERTEX) { + key->part.gs.es->info.stage == MESA_SHADER_VERTEX) { si_dump_shader_key_vs(key, &key->part.gs.vs_prolog, "part.gs.vs_prolog", f); } fprintf(f, " part.gs.prolog.tri_strip_adj_fix = %u\n", @@ -1238,10 +1238,10 @@ static void si_dump_shader_key(const struct si_shader *shader, FILE *f) fprintf(f, " as_ngg = %u\n", key->as_ngg); break; - case PIPE_SHADER_COMPUTE: + case MESA_SHADER_COMPUTE: break; - case PIPE_SHADER_FRAGMENT: + case MESA_SHADER_FRAGMENT: fprintf(f, " part.ps.prolog.color_two_side = %u\n", key->part.ps.prolog.color_two_side); fprintf(f, " part.ps.prolog.flatshade_colors = %u\n", key->part.ps.prolog.flatshade_colors); fprintf(f, " part.ps.prolog.poly_stipple = %u\n", key->part.ps.prolog.poly_stipple); @@ -1280,12 +1280,12 @@ static void si_dump_shader_key(const struct si_shader *shader, FILE *f) assert(0); } - if ((shader_type == PIPE_SHADER_GEOMETRY || shader_type == PIPE_SHADER_TESS_EVAL || - shader_type == PIPE_SHADER_VERTEX) && + if ((stage == MESA_SHADER_GEOMETRY || stage == MESA_SHADER_TESS_EVAL || + stage == MESA_SHADER_VERTEX) && !key->as_es && !key->as_ls) { fprintf(f, " opt.kill_outputs = 0x%" PRIx64 "\n", key->opt.kill_outputs); fprintf(f, " opt.clip_disable = %u\n", key->opt.clip_disable); - if (shader_type != PIPE_SHADER_GEOMETRY) + if (stage != MESA_SHADER_GEOMETRY) fprintf(f, " opt.ngg_culling = 0x%x\n", key->opt.ngg_culling); } } @@ -1296,7 +1296,7 @@ static void si_optimize_vs_outputs(struct si_shader_context *ctx) struct si_shader_info *info = &shader->selector->info; unsigned skip_vs_optim_mask = 0; - if ((ctx->type != PIPE_SHADER_VERTEX && ctx->type != PIPE_SHADER_TESS_EVAL) || + if ((ctx->stage != MESA_SHADER_VERTEX && ctx->stage != MESA_SHADER_TESS_EVAL) || shader->key.as_ls || shader->key.as_es) return; @@ -1333,6 +1333,7 @@ static bool si_build_main_function(struct si_shader_context *ctx, struct si_shad ctx->shader = shader; ctx->type = sel->type; + ctx->stage = sel->info.stage; ctx->num_const_buffers = util_last_bit(info->const_buffers_declared); ctx->num_shader_buffers = util_last_bit(info->shader_buffers_declared); @@ -1342,23 +1343,23 @@ static bool si_build_main_function(struct si_shader_context *ctx, struct si_shad si_llvm_init_resource_callbacks(ctx); - switch (ctx->type) { - case PIPE_SHADER_VERTEX: + switch (ctx->stage) { + case MESA_SHADER_VERTEX: si_llvm_init_vs_callbacks(ctx, ngg_cull_shader); break; - case PIPE_SHADER_TESS_CTRL: + case MESA_SHADER_TESS_CTRL: si_llvm_init_tcs_callbacks(ctx); break; - case PIPE_SHADER_TESS_EVAL: + case MESA_SHADER_TESS_EVAL: si_llvm_init_tes_callbacks(ctx, ngg_cull_shader); break; - case PIPE_SHADER_GEOMETRY: + case MESA_SHADER_GEOMETRY: si_llvm_init_gs_callbacks(ctx); break; - case PIPE_SHADER_FRAGMENT: + case MESA_SHADER_FRAGMENT: si_llvm_init_ps_callbacks(ctx); break; - case PIPE_SHADER_COMPUTE: + case MESA_SHADER_COMPUTE: ctx->abi.load_local_group_size = si_llvm_get_block_size; break; default: @@ -1368,21 +1369,21 @@ static bool si_build_main_function(struct si_shader_context *ctx, struct si_shad si_create_function(ctx, ngg_cull_shader); - if (ctx->shader->key.as_es || ctx->type == PIPE_SHADER_GEOMETRY) + if (ctx->shader->key.as_es || ctx->stage == MESA_SHADER_GEOMETRY) si_preload_esgs_ring(ctx); - if (ctx->type == PIPE_SHADER_GEOMETRY) + if (ctx->stage == MESA_SHADER_GEOMETRY) si_preload_gs_rings(ctx); - else if (ctx->type == PIPE_SHADER_TESS_EVAL) + else if (ctx->stage == MESA_SHADER_TESS_EVAL) si_llvm_preload_tes_rings(ctx); - if (ctx->type == PIPE_SHADER_TESS_CTRL && sel->info.tessfactors_are_def_in_all_invocs) { + if (ctx->stage == MESA_SHADER_TESS_CTRL && sel->info.tessfactors_are_def_in_all_invocs) { for (unsigned i = 0; i < 6; i++) { ctx->invoc0_tess_factors[i] = ac_build_alloca_undef(&ctx->ac, ctx->ac.i32, ""); } } - if (ctx->type == PIPE_SHADER_GEOMETRY) { + if (ctx->stage == MESA_SHADER_GEOMETRY) { for (unsigned i = 0; i < 4; i++) { ctx->gs_next_vertex[i] = ac_build_alloca(&ctx->ac, ctx->ac.i32, ""); } @@ -1406,7 +1407,7 @@ static bool si_build_main_function(struct si_shader_context *ctx, struct si_shad } } - if (ctx->type != PIPE_SHADER_GEOMETRY && (shader->key.as_ngg && !shader->key.as_es)) { + if (ctx->stage != MESA_SHADER_GEOMETRY && (shader->key.as_ngg && !shader->key.as_es)) { /* Unconditionally declare scratch space base for streamout and * vertex compaction. Whether space is actually allocated is * determined during linking / PM4 creation. @@ -1447,20 +1448,20 @@ static bool si_build_main_function(struct si_shader_context *ctx, struct si_shad */ if (ctx->screen->info.chip_class >= GFX9) { if (!shader->is_monolithic && (shader->key.as_es || shader->key.as_ls) && - (ctx->type == PIPE_SHADER_TESS_EVAL || - (ctx->type == PIPE_SHADER_VERTEX && + (ctx->stage == MESA_SHADER_TESS_EVAL || + (ctx->stage == MESA_SHADER_VERTEX && !si_vs_needs_prolog(sel, &shader->key.part.vs.prolog, &shader->key, ngg_cull_shader)))) { si_init_exec_from_input(ctx, ctx->merged_wave_info, 0); - } else if (ctx->type == PIPE_SHADER_TESS_CTRL || ctx->type == PIPE_SHADER_GEOMETRY || + } else if (ctx->stage == MESA_SHADER_TESS_CTRL || ctx->stage == MESA_SHADER_GEOMETRY || (shader->key.as_ngg && !shader->key.as_es)) { LLVMValueRef thread_enabled; bool nested_barrier; - if (!shader->is_monolithic || (ctx->type == PIPE_SHADER_TESS_EVAL && shader->key.as_ngg && + if (!shader->is_monolithic || (ctx->stage == MESA_SHADER_TESS_EVAL && shader->key.as_ngg && !shader->key.as_es && !shader->key.opt.ngg_culling)) ac_init_exec_full_mask(&ctx->ac); - if ((ctx->type == PIPE_SHADER_VERTEX || ctx->type == PIPE_SHADER_TESS_EVAL) && + if ((ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL) && shader->key.as_ngg && !shader->key.as_es && !shader->key.opt.ngg_culling) { gfx10_ngg_build_sendmsg_gs_alloc_req(ctx); @@ -1471,8 +1472,8 @@ static bool si_build_main_function(struct si_shader_context *ctx, struct si_shad gfx10_ngg_build_export_prim(ctx, NULL, NULL); } - if (ctx->type == PIPE_SHADER_TESS_CTRL || ctx->type == PIPE_SHADER_GEOMETRY) { - if (ctx->type == PIPE_SHADER_GEOMETRY && shader->key.as_ngg) { + if (ctx->stage == MESA_SHADER_TESS_CTRL || ctx->stage == MESA_SHADER_GEOMETRY) { + if (ctx->stage == MESA_SHADER_GEOMETRY && shader->key.as_ngg) { gfx10_ngg_gs_emit_prologue(ctx); nested_barrier = false; } else { @@ -1557,10 +1558,10 @@ static void si_get_vs_prolog_key(const struct si_shader_info *info, unsigned num key->vs_prolog.has_ngg_cull_inputs = !!shader_out->key.opt.ngg_culling; } - if (shader_out->selector->type == PIPE_SHADER_TESS_CTRL) { + if (shader_out->selector->info.stage == MESA_SHADER_TESS_CTRL) { key->vs_prolog.as_ls = 1; key->vs_prolog.num_merged_next_stage_vgprs = 2; - } else if (shader_out->selector->type == PIPE_SHADER_GEOMETRY) { + } else if (shader_out->selector->info.stage == MESA_SHADER_GEOMETRY) { key->vs_prolog.as_es = 1; key->vs_prolog.num_merged_next_stage_vgprs = 5; } else if (shader_out->key.as_ngg) { @@ -1592,7 +1593,7 @@ static bool si_should_optimize_less(struct ac_llvm_compiler *compiler, /* For a crazy dEQP test containing 2597 memory opcodes, mostly * buffer stores. */ - return sel->type == PIPE_SHADER_COMPUTE && sel->info.num_memory_instructions > 1000; + return sel->info.stage == MESA_SHADER_COMPUTE && sel->info.num_memory_instructions > 1000; } static struct nir_shader *get_nir_shader(struct si_shader_selector *sel, bool *free_nir) @@ -1637,7 +1638,7 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com return false; } - if (shader->is_monolithic && ctx.type == PIPE_SHADER_VERTEX) { + if (shader->is_monolithic && ctx.stage == MESA_SHADER_VERTEX) { LLVMValueRef parts[4]; unsigned num_parts = 0; bool has_prolog = false; @@ -1671,14 +1672,14 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com if (ctx.shader->key.opt.vs_as_prim_discard_cs) si_build_prim_discard_compute_shader(&ctx); - } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_TESS_EVAL && ngg_cull_main_fn) { + } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_TESS_EVAL && ngg_cull_main_fn) { LLVMValueRef parts[2]; parts[0] = ngg_cull_main_fn; parts[1] = ctx.main_fn; si_build_wrapper_function(&ctx, parts, 2, 0, 0); - } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_TESS_CTRL) { + } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_TESS_CTRL) { if (sscreen->info.chip_class >= GFX9) { struct si_shader_selector *ls = shader->key.part.tcs.ls; LLVMValueRef parts[4]; @@ -1724,6 +1725,7 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com /* Reset the shader context. */ ctx.shader = shader; ctx.type = PIPE_SHADER_TESS_CTRL; + ctx.stage = MESA_SHADER_TESS_CTRL; si_build_wrapper_function(&ctx, parts + !vs_needs_prolog, 4 - !vs_needs_prolog, vs_needs_prolog, vs_needs_prolog ? 2 : 1); @@ -1740,7 +1742,7 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com si_build_wrapper_function(&ctx, parts, 2, 0, 0); } - } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_GEOMETRY) { + } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_GEOMETRY) { if (ctx.screen->info.chip_class >= GFX9) { struct si_shader_selector *es = shader->key.part.gs.es; LLVMValueRef es_prolog = NULL; @@ -1775,7 +1777,7 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com es_main = ctx.main_fn; /* ES prolog */ - if (es->type == PIPE_SHADER_VERTEX && + if (es->info.stage == MESA_SHADER_VERTEX && si_vs_needs_prolog(es, &shader->key.part.gs.vs_prolog, &shader->key, false)) { union si_shader_part_key vs_prolog_key; si_get_vs_prolog_key(&es->info, shader_es.info.num_input_sgprs, false, @@ -1788,6 +1790,7 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com /* Reset the shader context. */ ctx.shader = shader; ctx.type = PIPE_SHADER_GEOMETRY; + ctx.stage = MESA_SHADER_GEOMETRY; /* Prepare the array of shader parts. */ LLVMValueRef parts[4]; @@ -1814,7 +1817,7 @@ static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_com si_build_wrapper_function(&ctx, parts, 2, 1, 0); } - } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_FRAGMENT) { + } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_FRAGMENT) { si_llvm_build_monolithic_ps(&ctx, shader); } @@ -1872,7 +1875,7 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi /* Validate SGPR and VGPR usage for compute to detect compiler bugs. * LLVM 3.9svn has this bug. */ - if (sel->type == PIPE_SHADER_COMPUTE) { + if (sel->info.stage == MESA_SHADER_COMPUTE) { unsigned wave_size = sscreen->compute_wave_size; unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd * (wave_size == 32 ? 2 : 1); @@ -1906,7 +1909,7 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi shader->info.num_input_sgprs += 1; /* scratch byte offset */ /* Calculate the number of fragment input VGPRs. */ - if (sel->type == PIPE_SHADER_FRAGMENT) { + if (sel->info.stage == MESA_SHADER_FRAGMENT) { shader->info.num_input_vgprs = ac_get_fs_input_vgpr_cnt( &shader->config, &shader->info.face_vgpr_index, &shader->info.ancillary_vgpr_index); } @@ -1988,11 +1991,13 @@ si_get_shader_part(struct si_screen *sscreen, struct si_shader_part **list, struct si_shader_context ctx; si_llvm_context_init(&ctx, sscreen, compiler, - si_get_wave_size(sscreen, type, shader.key.as_ngg, shader.key.as_es, + si_get_wave_size(sscreen, tgsi_processor_to_shader_stage(type), + shader.key.as_ngg, shader.key.as_es, shader.key.opt.ngg_culling & SI_NGG_CULL_GS_FAST_LAUNCH_ALL, shader.key.opt.vs_as_prim_discard_cs)); ctx.shader = &shader; ctx.type = type; + ctx.stage = tgsi_processor_to_shader_stage(type); build(&ctx, key); @@ -2079,14 +2084,13 @@ static bool si_shader_select_gs_parts(struct si_screen *sscreen, struct ac_llvm_ { if (sscreen->info.chip_class >= GFX9) { struct si_shader *es_main_part; - enum pipe_shader_type es_type = shader->key.part.gs.es->type; if (shader->key.as_ngg) es_main_part = shader->key.part.gs.es->main_shader_part_ngg_es; else es_main_part = shader->key.part.gs.es->main_shader_part_es; - if (es_type == PIPE_SHADER_VERTEX && + if (shader->key.part.gs.es->info.stage == MESA_SHADER_VERTEX && !si_get_vs_prolog(sscreen, compiler, shader, debug, es_main_part, &shader->key.part.gs.vs_prolog)) return false; @@ -2374,7 +2378,7 @@ void si_fix_resource_usage(struct si_screen *sscreen, struct si_shader *shader) shader->config.num_sgprs = MAX2(shader->config.num_sgprs, min_sgprs); - if (shader->selector->type == PIPE_SHADER_COMPUTE && + if (shader->selector->info.stage == MESA_SHADER_COMPUTE && si_get_max_workgroup_size(shader) > sscreen->compute_wave_size) { si_multiwave_lds_size_workaround(sscreen, &shader->config.lds_size); } @@ -2435,22 +2439,22 @@ bool si_create_shader_variant(struct si_screen *sscreen, struct ac_llvm_compiler shader->info.nr_param_exports = mainp->info.nr_param_exports; /* Select prologs and/or epilogs. */ - switch (sel->type) { - case PIPE_SHADER_VERTEX: + switch (sel->info.stage) { + case MESA_SHADER_VERTEX: if (!si_shader_select_vs_parts(sscreen, compiler, shader, debug)) return false; break; - case PIPE_SHADER_TESS_CTRL: + case MESA_SHADER_TESS_CTRL: if (!si_shader_select_tcs_parts(sscreen, compiler, shader, debug)) return false; break; - case PIPE_SHADER_TESS_EVAL: + case MESA_SHADER_TESS_EVAL: break; - case PIPE_SHADER_GEOMETRY: + case MESA_SHADER_GEOMETRY: if (!si_shader_select_gs_parts(sscreen, compiler, shader, debug)) return false; break; - case PIPE_SHADER_FRAGMENT: + case MESA_SHADER_FRAGMENT: if (!si_shader_select_ps_parts(sscreen, compiler, shader, debug)) return false; @@ -2506,7 +2510,7 @@ bool si_create_shader_variant(struct si_screen *sscreen, struct ac_llvm_compiler fprintf(stderr, "Failed to compute subgroup info\n"); return false; } - } else if (sscreen->info.chip_class >= GFX9 && sel->type == PIPE_SHADER_GEOMETRY) { + } else if (sscreen->info.chip_class >= GFX9 && sel->info.stage == MESA_SHADER_GEOMETRY) { gfx9_get_gs_info(shader->previous_stage_sel, sel, &shader->gs_info); }