X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fradeonsi%2Fsi_shader_nir.c;h=46dd6e973fb2ac0b83935ff1124642b36d18b4d0;hb=64349a60e17a03de4bb7e03d942bfc1679dfe8ab;hp=65f493227894e5d9a29512cebf669af30070aa66;hpb=07638bea13893f14236f0029d1b13e34e3ecd7b3;p=mesa.git diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index 65f49322789..46dd6e973fb 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -114,7 +114,7 @@ static void scan_io_usage(struct si_shader_info *info, nir_intrinsic_instr *intr /* Never use FRAG_RESULT_COLOR directly. */ if (semantic == FRAG_RESULT_COLOR) { semantic = FRAG_RESULT_DATA0; - info->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] = true; + info->color0_writes_all_cbufs = true; } semantic += nir_intrinsic_io_semantics(intr).dual_source_blend_index; } @@ -230,42 +230,15 @@ static void scan_io_usage(struct si_shader_info *info, nir_intrinsic_instr *intr static void scan_instruction(const struct nir_shader *nir, struct si_shader_info *info, nir_instr *instr) { - if (instr->type == nir_instr_type_alu) { - nir_alu_instr *alu = nir_instr_as_alu(instr); - - switch (alu->op) { - case nir_op_fddx: - case nir_op_fddy: - case nir_op_fddx_fine: - case nir_op_fddy_fine: - case nir_op_fddx_coarse: - case nir_op_fddy_coarse: - info->uses_derivatives = true; - break; - default: - break; - } - } else if (instr->type == nir_instr_type_tex) { + if (instr->type == nir_instr_type_tex) { nir_tex_instr *tex = nir_instr_as_tex(instr); const nir_deref_instr *deref = tex_get_texture_deref(tex); nir_variable *var = deref ? nir_deref_instr_get_variable(deref) : NULL; - if (!var) { - info->samplers_declared |= u_bit_consecutive(tex->sampler_index, 1); - } else { + if (var) { if (deref->mode != nir_var_uniform || var->data.bindless) info->uses_bindless_samplers = true; } - - switch (tex->op) { - case nir_texop_tex: - case nir_texop_txb: - case nir_texop_lod: - info->uses_derivatives = true; - break; - default: - break; - } } else if (instr->type == nir_instr_type_intrinsic) { nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); @@ -305,15 +278,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info } break; } - case nir_intrinsic_load_vertex_id: - info->uses_vertexid = 1; - break; - case nir_intrinsic_load_vertex_id_zero_base: - info->uses_vertexid_nobase = 1; - break; - case nir_intrinsic_load_base_vertex: - info->uses_basevertex = 1; - break; case nir_intrinsic_load_draw_id: info->uses_drawid = 1; break; @@ -334,12 +298,10 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info break; case nir_intrinsic_bindless_image_store: info->uses_bindless_images = true; - info->writes_memory = true; - info->num_memory_instructions++; /* we only care about stores */ + info->num_memory_stores++; break; case nir_intrinsic_image_deref_store: - info->writes_memory = true; - info->num_memory_instructions++; /* we only care about stores */ + info->num_memory_stores++; break; case nir_intrinsic_bindless_image_atomic_add: case nir_intrinsic_bindless_image_atomic_imin: @@ -352,8 +314,7 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info case nir_intrinsic_bindless_image_atomic_exchange: case nir_intrinsic_bindless_image_atomic_comp_swap: info->uses_bindless_images = true; - info->writes_memory = true; - info->num_memory_instructions++; /* we only care about stores */ + info->num_memory_stores++; break; case nir_intrinsic_image_deref_atomic_add: case nir_intrinsic_image_deref_atomic_imin: @@ -367,8 +328,7 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info case nir_intrinsic_image_deref_atomic_comp_swap: case nir_intrinsic_image_deref_atomic_inc_wrap: case nir_intrinsic_image_deref_atomic_dec_wrap: - info->writes_memory = true; - info->num_memory_instructions++; /* we only care about stores */ + info->num_memory_stores++; break; case nir_intrinsic_store_ssbo: case nir_intrinsic_ssbo_atomic_add: @@ -381,8 +341,7 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info case nir_intrinsic_ssbo_atomic_xor: case nir_intrinsic_ssbo_atomic_exchange: case nir_intrinsic_ssbo_atomic_comp_swap: - info->writes_memory = true; - info->num_memory_instructions++; /* we only care about stores */ + info->num_memory_stores++; break; case nir_intrinsic_load_color0: case nir_intrinsic_load_color1: { @@ -408,9 +367,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info info->uses_linear_centroid = true; else info->uses_linear_center = true; - - if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample) - info->uses_linear_opcode_interp_sample = true; } else { if (intr->intrinsic == nir_intrinsic_load_barycentric_sample) info->uses_persp_sample = true; @@ -418,10 +374,9 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info info->uses_persp_centroid = true; else info->uses_persp_center = true; - - if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample) - info->uses_persp_opcode_interp_sample = true; } + if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample) + info->uses_interp_at_sample = true; break; } case nir_intrinsic_load_input: @@ -481,20 +436,6 @@ void si_nir_scan_shader(const struct nir_shader *nir, struct si_shader_info *inf } info->constbuf0_num_slots = nir->num_uniforms; - info->shader_buffers_declared = u_bit_consecutive(0, nir->info.num_ssbos); - info->const_buffers_declared = u_bit_consecutive(0, nir->info.num_ubos); - info->images_declared = u_bit_consecutive(0, nir->info.num_images); - info->msaa_images_declared = nir->info.msaa_images; - info->image_buffers = nir->info.image_buffers; - info->samplers_declared = nir->info.textures_used; - - info->num_written_clipdistance = nir->info.clip_distance_array_size; - info->num_written_culldistance = nir->info.cull_distance_array_size; - info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance); - info->culldist_writemask = u_bit_consecutive(0, info->num_written_culldistance); - - if (info->stage == MESA_SHADER_FRAGMENT) - info->uses_kill = nir->info.fs.uses_discard; if (nir->info.stage == MESA_SHADER_TESS_CTRL) { info->tessfactors_are_def_in_all_invocs = ac_are_tessfactors_def_in_all_invocs(nir);