X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fsoftpipe%2Fsp_tile_cache.h;h=8d0466b8191216a44858fb91be64481556f13fc9;hb=a788be19e5bb65432b7701f6d663501f3484151c;hp=4151a47c3235eb526debe8de4b3305b8ddf24cf5;hpb=dbf3a15313eed930a3d8fdde12e457259c43651b;p=mesa.git diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.h b/src/gallium/drivers/softpipe/sp_tile_cache.h index 4151a47c323..8d0466b8191 100644 --- a/src/gallium/drivers/softpipe/sp_tile_cache.h +++ b/src/gallium/drivers/softpipe/sp_tile_cache.h @@ -30,6 +30,7 @@ #include "pipe/p_compiler.h" +#include "sp_texture.h" struct softpipe_tile_cache; @@ -38,18 +39,22 @@ struct softpipe_tile_cache; /** * Cache tile size (width and height). This needs to be a power of two. */ -#define TILE_SIZE 64 +#define TILE_SIZE_LOG2 6 +#define TILE_SIZE (1 << TILE_SIZE_LOG2) -/* If we need to support > 4096, just expand this to be a 64 bit - * union, or consider tiling in Z as well. +#define TILE_ADDR_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1 - TILE_SIZE_LOG2) + + +/** + * Surface tile address as a union for fast compares. */ union tile_address { struct { - unsigned x:6; /* 4096 / TILE_SIZE */ - unsigned y:6; /* 4096 / TILE_SIZE */ + unsigned x:TILE_ADDR_BITS; /* 16K / TILE_SIZE */ + unsigned y:TILE_ADDR_BITS; /* 16K / TILE_SIZE */ unsigned invalid:1; - unsigned pad:19; + unsigned pad:15; } bits; unsigned value; }; @@ -63,6 +68,9 @@ struct softpipe_cached_tile uint depth32[TILE_SIZE][TILE_SIZE]; ushort depth16[TILE_SIZE][TILE_SIZE]; ubyte stencil8[TILE_SIZE][TILE_SIZE]; + uint colorui128[TILE_SIZE][TILE_SIZE][4]; + int colori128[TILE_SIZE][TILE_SIZE][4]; + uint64_t depth64[TILE_SIZE][TILE_SIZE]; ubyte any[1]; } data; }; @@ -70,11 +78,6 @@ struct softpipe_cached_tile #define NUM_ENTRIES 50 -/** XXX move these */ -#define MAX_WIDTH 4096 -#define MAX_HEIGHT 4096 - - struct softpipe_tile_cache { struct pipe_context *pipe; @@ -85,8 +88,8 @@ struct softpipe_tile_cache union tile_address tile_addrs[NUM_ENTRIES]; struct softpipe_cached_tile *entries[NUM_ENTRIES]; uint clear_flags[(MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32]; - float clear_color[4]; /**< for color bufs */ - uint clear_val; /**< for z+stencil */ + union pipe_color_union clear_color; /**< for color bufs */ + uint64_t clear_val; /**< for z+stencil */ boolean depth_stencil; /**< Is the surface a depth/stencil format? */ struct softpipe_cached_tile *tile; /**< scratch tile for clears */ @@ -109,18 +112,13 @@ sp_tile_cache_set_surface(struct softpipe_tile_cache *tc, extern struct pipe_surface * sp_tile_cache_get_surface(struct softpipe_tile_cache *tc); -extern void -sp_tile_cache_map_transfers(struct softpipe_tile_cache *tc); - -extern void -sp_tile_cache_unmap_transfers(struct softpipe_tile_cache *tc); - extern void sp_flush_tile_cache(struct softpipe_tile_cache *tc); extern void -sp_tile_cache_clear(struct softpipe_tile_cache *tc, const float *rgba, - uint clearValue); +sp_tile_cache_clear(struct softpipe_tile_cache *tc, + const union pipe_color_union *color, + uint64_t clearValue); extern struct softpipe_cached_tile * sp_find_cached_tile(struct softpipe_tile_cache *tc,