X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fsvga%2Fsvga_cmd.c;h=bc4c86c040886f9c5b085f70bb7821c205c3e6fd;hb=25409c6da8163d9acb386511aef0c11577c7aadb;hp=a0da7d7e5d5dd67a8b0e7273376af5a91a27cbf9;hpb=3192633d4abe262d413e41feb871fe8deed409d8;p=mesa.git diff --git a/src/gallium/drivers/svga/svga_cmd.c b/src/gallium/drivers/svga/svga_cmd.c index a0da7d7e5d5..bc4c86c0408 100644 --- a/src/gallium/drivers/svga/svga_cmd.c +++ b/src/gallium/drivers/svga/svga_cmd.c @@ -31,8 +31,9 @@ */ #include "svga_winsys.h" -#include "svga_screen_buffer.h" -#include "svga_screen_texture.h" +#include "svga_resource_buffer.h" +#include "svga_resource_texture.h" +#include "svga_surface.h" #include "svga_cmd.h" /* @@ -45,10 +46,10 @@ * to have allocated the fifo space before converting. * * Results: - * id is filld out. + * id is filled out. * * Side effects: - * One surface relocation is preformed for texture handle. + * One surface relocation is performed for texture handle. * *---------------------------------------------------------------------- */ @@ -66,7 +67,7 @@ void surface_to_surfaceid(struct svga_winsys_context *swc, // IN id->mipmap = s->real_level; } else { - id->sid = SVGA3D_INVALID_ID; + swc->surface_relocation(swc, &id->sid, NULL, flags); id->face = 0; id->mipmap = 0; } @@ -223,7 +224,7 @@ SVGA3D_DestroyContext(struct svga_winsys_context *swc) // IN * containers for host VRAM objects like textures, vertex * buffers, and depth/stencil buffers. * - * Surfaces are hierarchial: + * Surfaces are hierarchical: * * - Surface may have multiple faces (for cube maps) * @@ -279,7 +280,7 @@ SVGA3D_BeginDefineSurface(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - swc->surface_relocation(swc, &cmd->sid, sid, PIPE_BUFFER_USAGE_GPU_WRITE); + swc->surface_relocation(swc, &cmd->sid, sid, SVGA_RELOC_WRITE); cmd->surfaceFlags = flags; cmd->format = format; @@ -365,7 +366,7 @@ SVGA3D_DestroySurface(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - swc->surface_relocation(swc, &cmd->sid, sid, PIPE_BUFFER_USAGE_GPU_READ); + swc->surface_relocation(swc, &cmd->sid, sid, SVGA_RELOC_READ); swc->commit(swc);; return PIPE_OK; @@ -375,11 +376,9 @@ SVGA3D_DestroySurface(struct svga_winsys_context *swc, /* *---------------------------------------------------------------------- * - * SVGA3D_BeginSurfaceDMA-- + * SVGA3D_SurfaceDMA-- * - * Begin a SURFACE_DMA command. This reserves space for it in - * the FIFO, and returns a pointer to the command's box array. - * This function must be paired with SVGA_FIFOCommitAll(). + * Emit a SURFACE_DMA command. * * When the SVGA3D device asynchronously processes this FIFO * command, a DMA operation is performed between host VRAM and @@ -421,9 +420,10 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, struct svga_transfer *st, // IN SVGA3dTransferType transfer, // IN const SVGA3dCopyBox *boxes, // IN - uint32 numBoxes) // IN + uint32 numBoxes, // IN + SVGA3dSurfaceDMAFlags flags) // IN { - struct svga_texture *texture = svga_texture(st->base.texture); + struct svga_texture *texture = svga_texture(st->base.resource); SVGA3dCmdSurfaceDMA *cmd; SVGA3dCmdSurfaceDMASuffix *pSuffix; uint32 boxesSize = sizeof *boxes * numBoxes; @@ -431,12 +431,12 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, unsigned surface_flags; if(transfer == SVGA3D_WRITE_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_READ; - surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; + region_flags = SVGA_RELOC_READ; + surface_flags = SVGA_RELOC_WRITE; } else if(transfer == SVGA3D_READ_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; - surface_flags = PIPE_BUFFER_USAGE_GPU_READ; + region_flags = SVGA_RELOC_WRITE; + surface_flags = SVGA_RELOC_READ; } else { assert(0); @@ -454,7 +454,7 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, cmd->guest.pitch = st->base.stride; swc->surface_relocation(swc, &cmd->host.sid, texture->handle, surface_flags); - cmd->host.face = st->base.face; /* PIPE_TEX_FACE_* and SVGA3D_CUBEFACE_* match */ + cmd->host.face = st->face; /* PIPE_TEX_FACE_* and SVGA3D_CUBEFACE_* match */ cmd->host.mipmap = st->base.level; cmd->transfer = transfer; @@ -464,7 +464,7 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + boxesSize); pSuffix->suffixSize = sizeof *pSuffix; pSuffix->maximumOffset = st->hw_nblocksy*st->base.stride; - memset(&pSuffix->flags, 0, sizeof pSuffix->flags); + pSuffix->flags = flags; swc->commit(swc); @@ -478,7 +478,8 @@ SVGA3D_BufferDMA(struct svga_winsys_context *swc, struct svga_winsys_surface *host, SVGA3dTransferType transfer, // IN uint32 size, // IN - uint32 offset, // IN + uint32 guest_offset, // IN + uint32 host_offset, // IN SVGA3dSurfaceDMAFlags flags) // IN { SVGA3dCmdSurfaceDMA *cmd; @@ -488,12 +489,12 @@ SVGA3D_BufferDMA(struct svga_winsys_context *swc, unsigned surface_flags; if(transfer == SVGA3D_WRITE_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_READ; - surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; + region_flags = SVGA_RELOC_READ; + surface_flags = SVGA_RELOC_WRITE; } else if(transfer == SVGA3D_READ_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; - surface_flags = PIPE_BUFFER_USAGE_GPU_READ; + region_flags = SVGA_RELOC_WRITE; + surface_flags = SVGA_RELOC_READ; } else { assert(0); @@ -517,19 +518,19 @@ SVGA3D_BufferDMA(struct svga_winsys_context *swc, cmd->transfer = transfer; box = (SVGA3dCopyBox *)&cmd[1]; - box->x = offset; + box->x = host_offset; box->y = 0; box->z = 0; box->w = size; box->h = 1; box->d = 1; - box->srcx = offset; + box->srcx = guest_offset; box->srcy = 0; box->srcz = 0; pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + sizeof *box); pSuffix->suffixSize = sizeof *pSuffix; - pSuffix->maximumOffset = offset + size; + pSuffix->maximumOffset = guest_offset + size; pSuffix->flags = flags; swc->commit(swc); @@ -583,7 +584,7 @@ SVGA3D_SetRenderTarget(struct svga_winsys_context *swc, cmd->type = type; - surface_to_surfaceid(swc, surface, &cmd->target, PIPE_BUFFER_USAGE_GPU_WRITE); + surface_to_surfaceid(swc, surface, &cmd->target, SVGA_RELOC_WRITE); swc->commit(swc); @@ -757,6 +758,59 @@ SVGA3D_SetShaderConst(struct svga_winsys_context *swc, } +/* + *---------------------------------------------------------------------- + * + * SVGA3D_SetShaderConsts -- + * + * Set the value of successive shader constants. + * + * Shader constants are analogous to uniform variables in GLSL, + * except that they belong to the render context rather than to + * an individual shader. + * + * Constants may have one of three types: A 4-vector of floats, + * a 4-vector of integers, or a single boolean flag. + * + * Results: + * None. + * + * Side effects: + * None. + * + *---------------------------------------------------------------------- + */ + +enum pipe_error +SVGA3D_SetShaderConsts(struct svga_winsys_context *swc, + uint32 reg, // IN + uint32 numRegs, // IN + SVGA3dShaderType type, // IN + SVGA3dShaderConstType ctype, // IN + const void *values) // IN +{ + SVGA3dCmdSetShaderConst *cmd; + + cmd = SVGA3D_FIFOReserve(swc, + SVGA_3D_CMD_SET_SHADER_CONST, + sizeof *cmd + (numRegs - 1) * sizeof cmd->values, + 0); + if(!cmd) + return PIPE_ERROR_OUT_OF_MEMORY; + + cmd->cid = swc->cid; + cmd->reg = reg; + cmd->type = type; + cmd->ctype = ctype; + + memcpy(&cmd->values, values, numRegs * sizeof cmd->values); + + swc->commit(swc); + + return PIPE_OK; +} + + @@ -999,8 +1053,8 @@ SVGA3D_BeginSurfaceCopy(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - surface_to_surfaceid(swc, src, &cmd->src, PIPE_BUFFER_USAGE_GPU_READ); - surface_to_surfaceid(swc, dest, &cmd->dest, PIPE_BUFFER_USAGE_GPU_WRITE); + surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ); + surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE); *boxes = (SVGA3dCopyBox*) &cmd[1]; memset(*boxes, 0, boxesSize); @@ -1042,8 +1096,8 @@ SVGA3D_SurfaceStretchBlt(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - surface_to_surfaceid(swc, src, &cmd->src, PIPE_BUFFER_USAGE_GPU_READ); - surface_to_surfaceid(swc, dest, &cmd->dest, PIPE_BUFFER_USAGE_GPU_WRITE); + surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ); + surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE); cmd->boxSrc = *boxSrc; cmd->boxDest = *boxDest; cmd->mode = mode; @@ -1147,8 +1201,9 @@ SVGA3D_SetScissorRect(struct svga_winsys_context *swc, *---------------------------------------------------------------------- */ -enum pipe_error SVGA3D_SetClipPlane(struct svga_winsys_context *swc, - uint32 index, const float *plane) +enum pipe_error +SVGA3D_SetClipPlane(struct svga_winsys_context *swc, + uint32 index, const float *plane) { SVGA3dCmdSetClipPlane *cmd; @@ -1372,7 +1427,7 @@ SVGA3D_EndQuery(struct svga_winsys_context *swc, cmd->type = type; swc->region_relocation(swc, &cmd->guestResult, buffer, 0, - PIPE_BUFFER_USAGE_GPU_WRITE); + SVGA_RELOC_WRITE); swc->commit(swc); @@ -1419,7 +1474,7 @@ SVGA3D_WaitForQuery(struct svga_winsys_context *swc, cmd->type = type; swc->region_relocation(swc, &cmd->guestResult, buffer, 0, - PIPE_BUFFER_USAGE_GPU_WRITE); + SVGA_RELOC_WRITE); swc->commit(swc);