X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fv3d%2Fv3d_context.h;h=5822ca9f7f80f8d60720a214fc6b2c207c216d5b;hb=beeb94402f9d33081147c88de2b9d4c4ea24e842;hp=47945f964972f3429880e755ba8cbcf025d99787;hpb=97894b1267923dee25ea5263e547ac8822ef7095;p=mesa.git diff --git a/src/gallium/drivers/v3d/v3d_context.h b/src/gallium/drivers/v3d/v3d_context.h index 47945f96497..5822ca9f7f8 100644 --- a/src/gallium/drivers/v3d/v3d_context.h +++ b/src/gallium/drivers/v3d/v3d_context.h @@ -81,6 +81,7 @@ void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo); #define VC5_DIRTY_STREAMOUT (1 << 27) #define VC5_DIRTY_OQ (1 << 28) #define VC5_DIRTY_CENTROID_FLAGS (1 << 29) +#define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30) #define VC5_MAX_FS_INPUTS 64 @@ -183,12 +184,14 @@ struct v3d_vertex_stateobj { struct pipe_vertex_element pipe[VC5_MAX_ATTRIBUTES]; unsigned num_elements; - uint8_t attrs[12 * VC5_MAX_ATTRIBUTES]; + uint8_t attrs[16 * VC5_MAX_ATTRIBUTES]; struct v3d_bo *default_attribute_values; }; struct v3d_streamout_stateobj { struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS]; + /* Number of vertices we've written into the buffer so far. */ + uint32_t offsets[PIPE_MAX_SO_BUFFERS]; unsigned num_targets; }; @@ -373,7 +376,7 @@ struct v3d_context { /** @{ Current pipeline state objects */ struct pipe_scissor_state scissor; - struct pipe_blend_state *blend; + struct v3d_blend_state *blend; struct v3d_rasterizer_state *rasterizer; struct v3d_depth_stencil_alpha_state *zsa; @@ -424,9 +427,6 @@ struct v3d_context { struct v3d_rasterizer_state { struct pipe_rasterizer_state base; - /* VC5_CONFIGURATION_BITS */ - uint8_t config_bits[3]; - float point_size; /** @@ -434,6 +434,11 @@ struct v3d_rasterizer_state { * VC5_PACKET_DEPTH_OFFSET */ uint16_t offset_units; + /** + * The HW treats polygon offset units based on a Z24 buffer, so we + * need to scale up offset_units if we're only Z16. + */ + uint16_t z16_offset_units; /** * Half-float (1/8/7 bits) value of polygon offset scale for * VC5_PACKET_DEPTH_OFFSET @@ -446,18 +451,17 @@ struct v3d_depth_stencil_alpha_state { enum v3d_ez_state ez_state; - /** Uniforms for stencil state. - * - * Index 0 is either the front config, or the front-and-back config. - * Index 1 is the back config if doing separate back stencil. - * Index 2 is the writemask config if it's not a common mask value. - */ - uint32_t stencil_uniforms[3]; - uint8_t stencil_front[6]; uint8_t stencil_back[6]; }; +struct v3d_blend_state { + struct pipe_blend_state base; + + /* Per-RT mask of whether blending is enabled. */ + uint8_t blend_enables; +}; + #define perf_debug(...) do { \ if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \ fprintf(stderr, __VA_ARGS__); \