X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fvc4%2Fvc4_qpu_defines.h;h=626dc3be6bed7f5c463e13383bb1547f4d75388e;hb=59a692916ca251db995050f7fc0bb7b4e6e4780b;hp=f7ad01c6163f078f9375b54c7fcd10dd02941f83;hpb=4160ac5ee41630a5c9fc4e1f3520f0fabf42cb14;p=mesa.git

diff --git a/src/gallium/drivers/vc4/vc4_qpu_defines.h b/src/gallium/drivers/vc4/vc4_qpu_defines.h
index f7ad01c6163..626dc3be6be 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_defines.h
+++ b/src/gallium/drivers/vc4/vc4_qpu_defines.h
@@ -25,8 +25,7 @@
 #define VC4_QPU_DEFINES_H
 
 #include <assert.h>
-
-#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+#include <util/macros.h>
 
 enum qpu_op_add {
         QPU_A_NOP,
@@ -74,7 +73,7 @@ enum qpu_raddr {
         QPU_R_ELEM_QPU = 38,
         QPU_R_NOP,
         QPU_R_XY_PIXEL_COORD = 41,
-        QPU_R_MS_REV_FLAGS = 41,
+        QPU_R_MS_REV_FLAGS = 42,
         QPU_R_VPM = 48,
         QPU_R_VPM_LD_BUSY,
         QPU_R_VPM_LD_WAIT,
@@ -148,8 +147,11 @@ enum qpu_mux {
         QPU_MUX_A,
         QPU_MUX_B,
 
-        /* non-hardware mux values */
-        QPU_MUX_IMM,
+        /**
+         * Non-hardware mux value, stores a small immediate field to be
+         * programmed into raddr_b in the qpu_reg.index.
+         */
+        QPU_MUX_SMALL_IMM,
 };
 
 enum qpu_cond {
@@ -196,15 +198,15 @@ enum qpu_pack_a {
         QPU_PACK_A_8D_SAT,
 };
 
-enum qpu_unpack_r4 {
-        QPU_UNPACK_R4_NOP,
-        QPU_UNPACK_R4_F16A_TO_F32,
-        QPU_UNPACK_R4_F16B_TO_F32,
-        QPU_UNPACK_R4_8D_REP,
-        QPU_UNPACK_R4_8A,
-        QPU_UNPACK_R4_8B,
-        QPU_UNPACK_R4_8C,
-        QPU_UNPACK_R4_8D,
+enum qpu_unpack {
+        QPU_UNPACK_NOP,
+        QPU_UNPACK_16A,
+        QPU_UNPACK_16B,
+        QPU_UNPACK_8D_REP,
+        QPU_UNPACK_8A,
+        QPU_UNPACK_8B,
+        QPU_UNPACK_8C,
+        QPU_UNPACK_8D,
 };
 
 #define QPU_MASK(high, low) ((((uint64_t)1<<((high)-(low)+1))-1)<<(low))
@@ -218,6 +220,9 @@ enum qpu_unpack_r4 {
 
 #define QPU_GET_FIELD(word, field) ((uint32_t)(((word)  & field ## _MASK) >> field ## _SHIFT))
 
+#define QPU_UPDATE_FIELD(inst, value, field)                              \
+        (((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))
+
 #define QPU_SIG_SHIFT                   60
 #define QPU_SIG_MASK                    QPU_MASK(63, 60)