X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fvc4%2Fvc4_state.c;h=1e4657a79227394084dcc8a13eefb1e75f517cc6;hb=d6d83b34ee3486d2154c1c929900d329448cb6c0;hp=d6d44793e383bdaf400a1178271fb88fb14d5505;hpb=68c91a87d73cfcd947e09803ceb800b50bf9e399;p=mesa.git

diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c
index d6d44793e38..1e4657a7922 100644
--- a/src/gallium/drivers/vc4/vc4_state.c
+++ b/src/gallium/drivers/vc4/vc4_state.c
@@ -23,6 +23,7 @@
  */
 
 #include "pipe/p_state.h"
+#include "util/u_framebuffer.h"
 #include "util/u_inlines.h"
 #include "util/u_math.h"
 #include "util/u_memory.h"
@@ -135,6 +136,18 @@ vc4_create_rasterizer_state(struct pipe_context *pctx,
         V3D21_POINT_SIZE_pack(NULL, so->packed.point_size, &point_size);
         V3D21_LINE_WIDTH_pack(NULL, so->packed.line_width, &line_width);
 
+        if (cso->tile_raster_order_fixed) {
+                so->tile_raster_order_flags |= VC4_SUBMIT_CL_FIXED_RCL_ORDER;
+                if (cso->tile_raster_order_increasing_x) {
+                        so->tile_raster_order_flags |=
+                                VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X;
+                }
+                if (cso->tile_raster_order_increasing_y) {
+                        so->tile_raster_order_flags |=
+                                VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y;
+                }
+        }
+
         return so;
 }
 
@@ -374,8 +387,6 @@ vc4_set_constant_buffer(struct pipe_context *pctx,
         struct vc4_context *vc4 = vc4_context(pctx);
         struct vc4_constbuf_stateobj *so = &vc4->constbuf[shader];
 
-        assert(index == 0);
-
         /* Note that the state tracker can unbind constant buffers by
          * passing NULL here.
          */
@@ -385,7 +396,10 @@ vc4_set_constant_buffer(struct pipe_context *pctx,
                 return;
         }
 
-        assert(!cb->buffer);
+        if (index == 1 && so->cb[index].buffer_size != cb->buffer_size)
+                vc4->dirty |= VC4_DIRTY_UBO_1_SIZE;
+
+        pipe_resource_reference(&so->cb[index].buffer, cb->buffer);
         so->cb[index].buffer_offset = cb->buffer_offset;
         so->cb[index].buffer_size   = cb->buffer_size;
         so->cb[index].user_buffer   = cb->user_buffer;
@@ -401,21 +415,10 @@ vc4_set_framebuffer_state(struct pipe_context *pctx,
 {
         struct vc4_context *vc4 = vc4_context(pctx);
         struct pipe_framebuffer_state *cso = &vc4->framebuffer;
-        unsigned i;
 
         vc4->job = NULL;
 
-        for (i = 0; i < framebuffer->nr_cbufs; i++)
-                pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]);
-        for (; i < vc4->framebuffer.nr_cbufs; i++)
-                pipe_surface_reference(&cso->cbufs[i], NULL);
-
-        cso->nr_cbufs = framebuffer->nr_cbufs;
-
-        pipe_surface_reference(&cso->zsbuf, framebuffer->zsbuf);
-
-        cso->width = framebuffer->width;
-        cso->height = framebuffer->height;
+        util_copy_framebuffer_state(cso, framebuffer);
 
         /* Nonzero texture mipmap levels are laid out as if they were in
          * power-of-two-sized spaces.  The renderbuffer config infers its
@@ -555,8 +558,8 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
 
         so->base = *cso;
 
-        pipe_reference(NULL, &prsc->reference);
-        so->base.texture = prsc;
+        so->base.texture = NULL;
+        pipe_resource_reference(&so->base.texture, prsc);
         so->base.reference.count = 1;
         so->base.context = pctx;
 
@@ -569,14 +572,20 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
          */
         if ((cso->u.tex.first_level &&
              (cso->u.tex.first_level != cso->u.tex.last_level)) ||
-            rsc->vc4_format == VC4_TEXTURE_TYPE_RGBA32R) {
+            rsc->vc4_format == VC4_TEXTURE_TYPE_RGBA32R ||
+            rsc->vc4_format == ~0) {
                 struct vc4_resource *shadow_parent = rsc;
-                struct pipe_resource tmpl = *prsc;
-
-                tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET;
-                tmpl.width0 = u_minify(tmpl.width0, cso->u.tex.first_level);
-                tmpl.height0 = u_minify(tmpl.height0, cso->u.tex.first_level);
-                tmpl.last_level = cso->u.tex.last_level - cso->u.tex.first_level;
+                struct pipe_resource tmpl = {
+                        .target = prsc->target,
+                        .format = prsc->format,
+                        .width0 = u_minify(prsc->width0,
+                                           cso->u.tex.first_level),
+                        .height0 = u_minify(prsc->height0,
+                                            cso->u.tex.first_level),
+                        .bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET,
+                        .last_level = cso->u.tex.last_level - cso->u.tex.first_level,
+                        .nr_samples = prsc->nr_samples,
+                };
 
                 /* Create the shadow texture.  The rest of the texture
                  * parameter setup will use the shadow.
@@ -587,6 +596,9 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
                         return NULL;
                 }
                 rsc = vc4_resource(prsc);
+                vc4_bo_label(vc4_screen(pctx->screen), rsc->bo,
+                            "tiling shadow %dx%d",
+                             tmpl.width0, tmpl.height0);
 
                 /* Flag it as needing update of the contents from the parent. */
                 rsc->writes = shadow_parent->writes - 1;
@@ -602,7 +614,9 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
         }
 
         so->texture_p0 =
-                (VC4_SET_FIELD(rsc->slices[0].offset >> 12, VC4_TEX_P0_OFFSET) |
+                (VC4_SET_FIELD((rsc->slices[0].offset +
+                                cso->u.tex.first_layer *
+                                rsc->cube_map_stride) >> 12, VC4_TEX_P0_OFFSET) |
                  VC4_SET_FIELD(rsc->vc4_format & 15, VC4_TEX_P0_TYPE) |
                  VC4_SET_FIELD(so->force_first_level ?
                                cso->u.tex.last_level :