X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Fdrivers%2Fvirgl%2Fvirgl_screen.c;h=4cbca21ac96b8dd92d304f0ae088441a59f3a228;hb=8c9b9aac7d09e65195dca6681d59c10e4ef713d9;hp=e32d454d19b2e9fcd0345f65239e16f1b1f28a8d;hpb=591b7009440cef9fa0dd3bc09512a7a2906ef33d;p=mesa.git diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c index e32d454d19b..4cbca21ac96 100644 --- a/src/gallium/drivers/virgl/virgl_screen.c +++ b/src/gallium/drivers/virgl/virgl_screen.c @@ -21,10 +21,13 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "util/u_memory.h" -#include "util/u_format.h" -#include "util/u_format_s3tc.h" +#include "util/format/u_format.h" +#include "util/format/u_format_s3tc.h" +#include "util/u_screen.h" #include "util/u_video.h" +#include "util/u_math.h" #include "util/os_time.h" +#include "util/xmlconfig.h" #include "pipe/p_defines.h" #include "pipe/p_screen.h" @@ -34,10 +37,19 @@ #include "virgl_resource.h" #include "virgl_public.h" #include "virgl_context.h" - -#define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */ -#define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */ -#define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */ +#include "virgl_protocol.h" + +int virgl_debug = 0; +static const struct debug_named_value debug_options[] = { + { "verbose", VIRGL_DEBUG_VERBOSE, NULL }, + { "tgsi", VIRGL_DEBUG_TGSI, NULL }, + { "emubgra", VIRGL_DEBUG_EMULATE_BGRA, "Enable tweak to emulate BGRA as RGBA on GLES hosts"}, + { "bgraswz", VIRGL_DEBUG_BGRA_DEST_SWIZZLE, "Enable tweak to swizzle emulated BGRA on GLES hosts" }, + { "sync", VIRGL_DEBUG_SYNC, "Sync after every flush" }, + { "xfer", VIRGL_DEBUG_XFER, "Do not optimize for transfers" }, + DEBUG_NAMED_VALUE_END +}; +DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0) static const char * virgl_get_vendor(struct pipe_screen *screen) @@ -59,7 +71,9 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) switch (param) { case PIPE_CAP_NPOT_TEXTURES: return 1; - case PIPE_CAP_SM3: + case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD: + case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES: + case PIPE_CAP_VERTEX_SHADER_SATURATE: return 1; case PIPE_CAP_ANISOTROPIC_FILTER: return 1; @@ -72,15 +86,22 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_OCCLUSION_QUERY: return vscreen->caps.caps.v1.bset.occlusion_query; case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE: return vscreen->caps.caps.v1.bset.mirror_clamp; case PIPE_CAP_TEXTURE_SWIZZLE: return 1; - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return SP_MAX_TEXTURE_2D_LEVELS; + case PIPE_CAP_MAX_TEXTURE_2D_SIZE: + if (vscreen->caps.caps.v2.max_texture_2d_size) + return vscreen->caps.caps.v2.max_texture_2d_size; + return 16384; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return SP_MAX_TEXTURE_3D_LEVELS; + if (vscreen->caps.caps.v2.max_texture_3d_size) + return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size); + return 9; /* 256 x 256 x 256 */ case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return SP_MAX_TEXTURE_CUBE_LEVELS; + if (vscreen->caps.caps.v2.max_texture_cube_size) + return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size); + return 13; /* 4K x 4K */ case PIPE_CAP_BLEND_EQUATION_SEPARATE: return 1; case PIPE_CAP_INDEP_BLEND_ENABLE: @@ -94,7 +115,11 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: return vscreen->caps.caps.v1.bset.fragment_coord_conventions; case PIPE_CAP_DEPTH_CLIP_DISABLE: - return vscreen->caps.caps.v1.bset.depth_clip_disable; + if (vscreen->caps.caps.v1.bset.depth_clip_disable) + return 1; + if (vscreen->caps.caps.v2.host_feature_check_version >= 3) + return 2; + return 0; case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: return vscreen->caps.caps.v1.max_streamout_buffers; case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: @@ -124,22 +149,24 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_CONDITIONAL_RENDER: return vscreen->caps.caps.v1.bset.conditional_render; case PIPE_CAP_TEXTURE_BARRIER: - return 0; + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER; case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: return 1; case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: case PIPE_CAP_VERTEX_COLOR_CLAMPED: return vscreen->caps.caps.v1.bset.color_clamping; case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: - return 1; + return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS) || + (vscreen->caps.caps.v2.host_feature_check_version < 1); case PIPE_CAP_GLSL_FEATURE_LEVEL: return vscreen->caps.caps.v1.glsl_level; case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY: return MIN2(vscreen->caps.caps.v1.glsl_level, 140); case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: + case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE: return 0; case PIPE_CAP_COMPUTE: - return 0; + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER; case PIPE_CAP_USER_VERTEX_BUFFERS: return 0; case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: @@ -158,7 +185,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_QUERY_TIMESTAMP: return 1; case PIPE_CAP_QUERY_TIME_ELAPSED: - return 0; + return 1; case PIPE_CAP_TGSI_TEXCOORD: return 0; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: @@ -202,7 +229,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_CULL_DISTANCE: return vscreen->caps.caps.v1.bset.has_cull; case PIPE_CAP_MAX_VERTEX_STREAMS: - return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1; + return ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TRANSFORM_FEEDBACK3) || + (vscreen->caps.caps.v2.host_feature_check_version < 2)) ? 4 : 1; case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: return vscreen->caps.caps.v1.bset.conditional_render_inverted; case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: @@ -214,31 +242,62 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: return vscreen->caps.caps.v2.shader_buffer_offset_alignment; case PIPE_CAP_DOUBLES: - return vscreen->caps.caps.v1.bset.has_fp64; + return vscreen->caps.caps.v1.bset.has_fp64 || + (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64); case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: return vscreen->caps.caps.v2.max_shader_patch_varyings; case PIPE_CAP_SAMPLER_VIEW_TARGET: return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW; case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: return vscreen->caps.caps.v2.max_vertex_attrib_stride; + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE; + case PIPE_CAP_TGSI_TXQS: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS; + case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH; + case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS; + case PIPE_CAP_FBFETCH: + return (vscreen->caps.caps.v2.capability_bits & + VIRGL_CAP_TGSI_FBFETCH) ? 1 : 0; + case PIPE_CAP_TGSI_CLOCK: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK; + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS; + case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS: + return vscreen->caps.caps.v2.max_combined_shader_buffers; + case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS: + return vscreen->caps.caps.v2.max_combined_atomic_counters; + case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS: + return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers; + case PIPE_CAP_TEXTURE_FLOAT_LINEAR: + case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: + return 1; /* TODO: need to introduce a hw-cap for this */ + case PIPE_CAP_QUERY_BUFFER_OBJECT: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO; + case PIPE_CAP_MAX_VARYINGS: + if (vscreen->caps.caps.v1.glsl_level < 150) + return vscreen->caps.caps.v2.max_vertex_attribs; + return 32; + case PIPE_CAP_FAKE_SW_MSAA: + /* If the host supports only one sample (e.g., if it is using softpipe), + * fake multisampling to able to advertise higher GL versions. */ + return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0; + case PIPE_CAP_MULTI_DRAW_INDIRECT: + return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT); + case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: + return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_PARAMS); case PIPE_CAP_TEXTURE_GATHER_SM5: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: - case PIPE_CAP_FAKE_SW_MSAA: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: - case PIPE_CAP_MULTI_DRAW_INDIRECT: - case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: - case PIPE_CAP_CLIP_HALFZ: case PIPE_CAP_VERTEXID_NOBASE: case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: - case PIPE_CAP_TEXTURE_FLOAT_LINEAR: - case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: case PIPE_CAP_DEPTH_BOUNDS_TEST: - case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_CLEAR_TEXTURE: case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_TGSI_PACK_HALF_FLOAT: case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: @@ -246,30 +305,23 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_INVALIDATE_BUFFER: case PIPE_CAP_GENERATE_MIPMAP: case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: - case PIPE_CAP_QUERY_BUFFER_OBJECT: - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: case PIPE_CAP_STRING_MARKER: case PIPE_CAP_QUERY_MEMORY_INFO: case PIPE_CAP_PCI_GROUP: case PIPE_CAP_PCI_BUS: case PIPE_CAP_PCI_DEVICE: case PIPE_CAP_PCI_FUNCTION: - case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: - case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: case PIPE_CAP_TGSI_VOTE: case PIPE_CAP_MAX_WINDOW_RECTANGLES: case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: - case PIPE_CAP_TGSI_ARRAY_COMPONENTS: case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: - case PIPE_CAP_TGSI_FS_FBFETCH: case PIPE_CAP_TGSI_MUL_ZERO_WINS: case PIPE_CAP_INT64: case PIPE_CAP_INT64_DIVMOD: case PIPE_CAP_TGSI_TEX_TXF_LZ: - case PIPE_CAP_TGSI_CLOCK: case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE: case PIPE_CAP_TGSI_BALLOT: @@ -284,6 +336,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS: case PIPE_CAP_TILE_RASTER_ORDER: case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES: + case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS: case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET: case PIPE_CAP_CONTEXT_PRIORITY_MASK: case PIPE_CAP_FENCE_SIGNAL: @@ -296,7 +349,16 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE: case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS: case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS: + case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: return 0; + case PIPE_CAP_CLEAR_TEXTURE: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLEAR_TEXTURE; + case PIPE_CAP_CLIP_HALFZ: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLIP_HALFZ; + case PIPE_CAP_MAX_GS_INVOCATIONS: + return 32; + case PIPE_CAP_MAX_SHADER_BUFFER_SIZE: + return 1 << 27; case PIPE_CAP_VENDOR_ID: return 0x1af4; case PIPE_CAP_DEVICE_ID: @@ -307,11 +369,15 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_VIDEO_MEMORY: return 0; case PIPE_CAP_NATIVE_FENCE_FD: - return 0; + return vscreen->vws->supports_fences; + case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL: + return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL) || + (vscreen->caps.caps.v2.host_feature_check_version < 1); + case PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR; + default: + return u_pipe_screen_get_param_defaults(screen, param); } - /* should only get here on unhandled cases */ - debug_printf("Unexpected PIPE_CAP %d query\n", param); - return 0; } static int @@ -325,6 +391,10 @@ virgl_get_shader_param(struct pipe_screen *screen, !vscreen->caps.caps.v1.bset.has_tessellation_shaders) return 0; + if (shader == PIPE_SHADER_COMPUTE && + !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER)) + return 0; + switch(shader) { case PIPE_SHADER_FRAGMENT: @@ -332,6 +402,7 @@ virgl_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_GEOMETRY: case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_TESS_EVAL: + case PIPE_SHADER_COMPUTE: switch (param) { case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: @@ -342,6 +413,9 @@ virgl_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: return 1; + case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: + case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: + return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR; case PIPE_SHADER_CAP_MAX_INPUTS: if (vscreen->caps.caps.v1.glsl_level < 150) return vscreen->caps.caps.v2.max_vertex_attribs; @@ -369,15 +443,27 @@ virgl_get_shader_param(struct pipe_screen *screen, return 32; case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: return 4096 * sizeof(float[4]); + case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: + if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) + return vscreen->caps.caps.v2.max_shader_buffer_frag_compute; + else + return vscreen->caps.caps.v2.max_shader_buffer_other_stages; + case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) + return vscreen->caps.caps.v2.max_shader_image_frag_compute; + else + return vscreen->caps.caps.v2.max_shader_image_other_stages; + case PIPE_SHADER_CAP_SUPPORTED_IRS: + return (1 << PIPE_SHADER_IR_TGSI); + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: + return vscreen->caps.caps.v2.max_atomic_counters[shader]; + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: + return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader]; case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: case PIPE_SHADER_CAP_INT64_ATOMICS: case PIPE_SHADER_CAP_FP16: - case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: - case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: return 0; - case PIPE_SHADER_CAP_SCALAR_ISA: - return 1; default: return 0; } @@ -413,7 +499,73 @@ virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param) return 0.0; } -static boolean +static int +virgl_get_compute_param(struct pipe_screen *screen, + enum pipe_shader_ir ir_type, + enum pipe_compute_cap param, + void *ret) +{ + struct virgl_screen *vscreen = virgl_screen(screen); + if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER)) + return 0; + switch (param) { + case PIPE_COMPUTE_CAP_MAX_GRID_SIZE: + if (ret) { + uint64_t *grid_size = ret; + grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0]; + grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1]; + grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2]; + } + return 3 * sizeof(uint64_t) ; + case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE: + if (ret) { + uint64_t *block_size = ret; + block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0]; + block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1]; + block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2]; + } + return 3 * sizeof(uint64_t); + case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK: + if (ret) { + uint64_t *max_threads_per_block = ret; + *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations; + } + return sizeof(uint64_t); + case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE: + if (ret) { + uint64_t *max_local_size = ret; + /* Value reported by the closed source driver. */ + *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size; + } + return sizeof(uint64_t); + default: + break; + } + return 0; +} + +static bool +has_format_bit(struct virgl_supported_format_mask *mask, + enum virgl_formats fmt) +{ + assert(fmt < VIRGL_FORMAT_MAX); + unsigned val = (unsigned)fmt; + unsigned idx = val / 32; + unsigned bit = val % 32; + assert(idx < ARRAY_SIZE(mask->bitmask)); + return (mask->bitmask[idx] & (1u << bit)) != 0; +} + +bool +virgl_has_readback_format(struct pipe_screen *screen, + enum virgl_formats fmt) +{ + struct virgl_screen *vscreen = virgl_screen(screen); + return has_format_bit(&vscreen->caps.caps.v2.supported_readback_formats, + fmt); +} + +static bool virgl_is_vertex_format_supported(struct pipe_screen *screen, enum pipe_format format) { @@ -423,15 +575,15 @@ virgl_is_vertex_format_supported(struct pipe_screen *screen, format_desc = util_format_description(format); if (!format_desc) - return FALSE; + return false; if (format == PIPE_FORMAT_R11G11B10_FLOAT) { int vformat = VIRGL_FORMAT_R11G11B10_FLOAT; int big = vformat / 32; int small = vformat % 32; if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small))) - return FALSE; - return TRUE; + return false; + return true; } /* Find the first non-VOID channel. */ @@ -442,14 +594,45 @@ virgl_is_vertex_format_supported(struct pipe_screen *screen, } if (i == 4) - return FALSE; + return false; if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) - return FALSE; + return false; if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED) - return FALSE; - return TRUE; + return false; + return true; +} + +static bool +virgl_format_check_bitmask(enum pipe_format format, + uint32_t bitmask[16], + bool may_emulate_bgra) +{ + enum virgl_formats vformat = pipe_to_virgl_format(format); + int big = vformat / 32; + int small = vformat % 32; + if ((bitmask[big] & (1 << small))) + return true; + + /* On GLES hosts we don't advertise BGRx_SRGB, but we may be able + * emulate it by using a swizzled RGBx */ + if (may_emulate_bgra) { + if (format == PIPE_FORMAT_B8G8R8A8_SRGB) + format = PIPE_FORMAT_R8G8B8A8_SRGB; + else if (format == PIPE_FORMAT_B8G8R8X8_SRGB) + format = PIPE_FORMAT_R8G8B8X8_SRGB; + else { + return false; + } + + vformat = pipe_to_virgl_format(format); + big = vformat / 32; + small = vformat % 32; + if (bitmask[big] & (1 << small)) + return true; + } + return false; } /** @@ -457,17 +640,29 @@ virgl_is_vertex_format_supported(struct pipe_screen *screen, * \param format the format to test * \param type one of PIPE_TEXTURE, PIPE_SURFACE */ -static boolean +static bool virgl_is_format_supported( struct pipe_screen *screen, enum pipe_format format, enum pipe_texture_target target, unsigned sample_count, + unsigned storage_sample_count, unsigned bind) { struct virgl_screen *vscreen = virgl_screen(screen); const struct util_format_description *format_desc; int i; + union virgl_caps *caps = &vscreen->caps.caps; + boolean may_emulate_bgra = (caps->v2.capability_bits & + VIRGL_CAP_APP_TWEAK_SUPPORT) && + vscreen->tweak_gles_emulate_bgra; + + if (MAX2(1, sample_count) != MAX2(1, storage_sample_count)) + return false; + + if (!util_is_power_of_two_or_zero(sample_count)) + return false; + assert(target == PIPE_BUFFER || target == PIPE_TEXTURE_1D || target == PIPE_TEXTURE_1D_ARRAY || @@ -480,46 +675,76 @@ virgl_is_format_supported( struct pipe_screen *screen, format_desc = util_format_description(format); if (!format_desc) - return FALSE; + return false; if (util_format_is_intensity(format)) - return FALSE; + return false; if (sample_count > 1) { - if (!vscreen->caps.caps.v1.bset.texture_multisample) - return FALSE; - if (sample_count > vscreen->caps.caps.v1.max_samples) - return FALSE; + if (!caps->v1.bset.texture_multisample) + return false; + + if (bind & PIPE_BIND_SHADER_IMAGE) { + if (sample_count > caps->v2.max_image_samples) + return false; + } + + if (sample_count > caps->v1.max_samples) + return false; } if (bind & PIPE_BIND_VERTEX_BUFFER) { return virgl_is_vertex_format_supported(screen, format); } + if (util_format_is_compressed(format) && target == PIPE_BUFFER) + return false; + + /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */ + if ((format == PIPE_FORMAT_R32G32B32_FLOAT || + format == PIPE_FORMAT_R32G32B32_SINT || + format == PIPE_FORMAT_R32G32B32_UINT) && + target != PIPE_BUFFER) + return false; + + if ((format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC || + format_desc->layout == UTIL_FORMAT_LAYOUT_ETC || + format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) && + target == PIPE_TEXTURE_3D) + return false; + + if (bind & PIPE_BIND_RENDER_TARGET) { + /* For ARB_framebuffer_no_attachments. */ + if (format == PIPE_FORMAT_NONE) + return TRUE; + if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) - return FALSE; + return false; /* * Although possible, it is unnatural to render into compressed or YUV * surfaces. So disable these here to avoid going into weird paths - * inside the state trackers. + * inside gallium frontends. */ if (format_desc->block.width != 1 || format_desc->block.height != 1) - return FALSE; + return false; - { - int big = format / 32; - int small = format % 32; - if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small))) - return FALSE; - } + if (!virgl_format_check_bitmask(format, + caps->v1.render.bitmask, + may_emulate_bgra)) + return false; } if (bind & PIPE_BIND_DEPTH_STENCIL) { if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) - return FALSE; + return false; + } + + if (bind & PIPE_BIND_SCANOUT) { + if (!virgl_format_check_bitmask(format, caps->v2.scanout.bitmask, false)) + return false; } /* @@ -535,6 +760,9 @@ virgl_is_format_supported( struct pipe_screen *screen, if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) { goto out_lookup; } + if (format_desc->layout == UTIL_FORMAT_LAYOUT_ETC) { + goto out_lookup; + } if (format == PIPE_FORMAT_R11G11B10_FLOAT) { goto out_lookup; @@ -550,23 +778,16 @@ virgl_is_format_supported( struct pipe_screen *screen, } if (i == 4) - return FALSE; + return false; /* no L4A4 */ if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4) - return FALSE; + return false; out_lookup: - { - int big = format / 32; - int small = format % 32; - if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small))) - return FALSE; - } - /* - * Everything else should be supported by u_format. - */ - return TRUE; + return virgl_format_check_bitmask(format, + caps->v1.sampler.bitmask, + may_emulate_bgra); } static void virgl_flush_frontbuffer(struct pipe_screen *screen, @@ -593,10 +814,10 @@ static void virgl_fence_reference(struct pipe_screen *screen, vws->fence_reference(vws, ptr, fence); } -static boolean virgl_fence_finish(struct pipe_screen *screen, - struct pipe_context *ctx, - struct pipe_fence_handle *fence, - uint64_t timeout) +static bool virgl_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, + struct pipe_fence_handle *fence, + uint64_t timeout) { struct virgl_screen *vscreen = virgl_screen(screen); struct virgl_winsys *vws = vscreen->vws; @@ -604,6 +825,15 @@ static boolean virgl_fence_finish(struct pipe_screen *screen, return vws->fence_wait(vws, fence, timeout); } +static int virgl_fence_get_fd(struct pipe_screen *screen, + struct pipe_fence_handle *fence) +{ + struct virgl_screen *vscreen = virgl_screen(screen); + struct virgl_winsys *vws = vscreen->vws; + + return vws->fence_get_fd(vws, fence); +} + static uint64_t virgl_get_timestamp(struct pipe_screen *_screen) { @@ -616,26 +846,61 @@ virgl_destroy_screen(struct pipe_screen *screen) struct virgl_screen *vscreen = virgl_screen(screen); struct virgl_winsys *vws = vscreen->vws; - slab_destroy_parent(&vscreen->texture_transfer_pool); + slab_destroy_parent(&vscreen->transfer_pool); if (vws) vws->destroy(vws); FREE(vscreen); } +static void +fixup_formats(union virgl_caps *caps, struct virgl_supported_format_mask *mask) +{ + const size_t size = ARRAY_SIZE(mask->bitmask); + for (int i = 0; i < size; ++i) { + if (mask->bitmask[i] != 0) + return; /* we got some formats, we definately have a new protocol */ + } + + /* old protocol used; fall back to considering all sampleable formats valid + * readback-formats + */ + for (int i = 0; i < size; ++i) + mask->bitmask[i] = caps->v1.sampler.bitmask[i]; +} + struct pipe_screen * -virgl_create_screen(struct virgl_winsys *vws) +virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *config) { struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen); + const char *VIRGL_GLES_EMULATE_BGRA = "gles_emulate_bgra"; + const char *VIRGL_GLES_APPLY_BGRA_DEST_SWIZZLE = "gles_apply_bgra_dest_swizzle"; + const char *VIRGL_GLES_SAMPLES_PASSED_VALUE = "gles_samples_passed_value"; + if (!screen) return NULL; + virgl_debug = debug_get_option_virgl_debug(); + + if (config && config->options) { + screen->tweak_gles_emulate_bgra = + driQueryOptionb(config->options, VIRGL_GLES_EMULATE_BGRA); + screen->tweak_gles_apply_bgra_dest_swizzle = + driQueryOptionb(config->options, VIRGL_GLES_APPLY_BGRA_DEST_SWIZZLE); + screen->tweak_gles_tf3_value = + driQueryOptioni(config->options, VIRGL_GLES_SAMPLES_PASSED_VALUE); + } + + screen->tweak_gles_emulate_bgra |= !!(virgl_debug & VIRGL_DEBUG_EMULATE_BGRA); + screen->tweak_gles_apply_bgra_dest_swizzle |= !!(virgl_debug & VIRGL_DEBUG_BGRA_DEST_SWIZZLE); + screen->vws = vws; screen->base.get_name = virgl_get_name; screen->base.get_vendor = virgl_get_vendor; screen->base.get_param = virgl_get_param; screen->base.get_shader_param = virgl_get_shader_param; + screen->base.get_compute_param = virgl_get_compute_param; screen->base.get_paramf = virgl_get_paramf; screen->base.is_format_supported = virgl_is_format_supported; screen->base.destroy = virgl_destroy_screen; @@ -645,14 +910,18 @@ virgl_create_screen(struct virgl_winsys *vws) screen->base.fence_reference = virgl_fence_reference; //screen->base.fence_signalled = virgl_fence_signalled; screen->base.fence_finish = virgl_fence_finish; + screen->base.fence_get_fd = virgl_fence_get_fd; virgl_init_screen_resource_functions(&screen->base); vws->get_caps(vws, &screen->caps); + fixup_formats(&screen->caps.caps, + &screen->caps.caps.v2.supported_readback_formats); + fixup_formats(&screen->caps.caps, &screen->caps.caps.v2.scanout); screen->refcnt = 1; - slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16); + slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16); return &screen->base; }