X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fgallium%2Finclude%2Fpipe%2Fp_defines.h;h=f60b131f9416b5a016037eca2e8e6dbaaf797d7d;hb=9032d2a13ecd019206a48767d9205c0aafa7cca2;hp=c1e291b9da4518cd6c3edbdba9c032be90b68a61;hpb=4fb2daf42c8171579cdc18605c5ceeb1963f8b31;p=mesa.git diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index c1e291b9da4..f60b131f941 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -28,7 +28,7 @@ #ifndef PIPE_DEFINES_H #define PIPE_DEFINES_H -#include "p_format.h" +#include "p_compiler.h" #ifdef __cplusplus extern "C" { @@ -119,11 +119,11 @@ enum pipe_error { #define PIPE_POLYGON_MODE_LINE 1 #define PIPE_POLYGON_MODE_POINT 2 -/** Polygon front/back window, also for culling */ -#define PIPE_WINDING_NONE 0 -#define PIPE_WINDING_CW 1 -#define PIPE_WINDING_CCW 2 -#define PIPE_WINDING_BOTH (PIPE_WINDING_CW | PIPE_WINDING_CCW) +/** Polygon face specification, eg for culling */ +#define PIPE_FACE_NONE 0 +#define PIPE_FACE_FRONT 1 +#define PIPE_FACE_BACK 2 +#define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK) /** Stencil ops */ #define PIPE_STENCIL_OP_KEEP 0 @@ -135,12 +135,17 @@ enum pipe_error { #define PIPE_STENCIL_OP_DECR_WRAP 6 #define PIPE_STENCIL_OP_INVERT 7 -/** Texture types */ +/** Texture types. + * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D */ enum pipe_texture_target { - PIPE_TEXTURE_1D = 0, - PIPE_TEXTURE_2D = 1, - PIPE_TEXTURE_3D = 2, - PIPE_TEXTURE_CUBE = 3, + PIPE_BUFFER = 0, + PIPE_TEXTURE_1D = 1, + PIPE_TEXTURE_2D = 2, + PIPE_TEXTURE_3D = 3, + PIPE_TEXTURE_CUBE = 4, + PIPE_TEXTURE_RECT = 5, + PIPE_TEXTURE_1D_ARRAY = 6, + PIPE_TEXTURE_2D_ARRAY = 7, PIPE_MAX_TEXTURE_TYPES }; @@ -175,43 +180,37 @@ enum pipe_texture_target { #define PIPE_TEX_COMPARE_NONE 0 #define PIPE_TEX_COMPARE_R_TO_TEXTURE 1 -#define PIPE_TEXTURE_USAGE_RENDER_TARGET 0x1 -#define PIPE_TEXTURE_USAGE_DISPLAY_TARGET 0x2 /* windows presentable buffer, ie a backbuffer */ -#define PIPE_TEXTURE_USAGE_SCANOUT 0x4 /* ie a frontbuffer */ -#define PIPE_TEXTURE_USAGE_DEPTH_STENCIL 0x8 -#define PIPE_TEXTURE_USAGE_SAMPLER 0x10 -#define PIPE_TEXTURE_USAGE_DYNAMIC 0x20 -#define PIPE_TEXTURE_USAGE_SHARED 0x40 -/** Pipe driver custom usage flags should be greater or equal to this value */ -#define PIPE_TEXTURE_USAGE_CUSTOM (1 << 16) - -#define PIPE_TEXTURE_GEOM_NON_SQUARE 0x1 -#define PIPE_TEXTURE_GEOM_NON_POWER_OF_TWO 0x2 - - -/** - * Surface layout - */ -#define PIPE_SURFACE_LAYOUT_LINEAR 0 - - /** * Clear buffer bits */ /** All color buffers currently bound */ #define PIPE_CLEAR_COLOR (1 << 0) +#define PIPE_CLEAR_DEPTH (1 << 1) +#define PIPE_CLEAR_STENCIL (1 << 2) /** Depth/stencil combined */ -#define PIPE_CLEAR_DEPTHSTENCIL (1 << 1) - +#define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL) /** * Transfer object usage flags */ enum pipe_transfer_usage { + /** + * Resource contents read back (or accessed directly) at transfer + * create time. + */ PIPE_TRANSFER_READ = (1 << 0), + + /** + * Resource contents will be written back at transfer_destroy + * time (or modified as a result of being accessed directly). + */ PIPE_TRANSFER_WRITE = (1 << 1), - /** Read/modify/write */ + + /** + * Read/modify/write + */ PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE, + /** * The transfer should map the texture storage directly. The driver may * return NULL if that isn't possible, and the state tracker needs to cope @@ -221,89 +220,116 @@ enum pipe_transfer_usage { * does read/modify/write cycles on them directly, and a more complicated * path which uses minimal read and write transfers. */ - PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2) -}; + PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2), + /** + * Discards the memory within the mapped region. + * + * It should not be used with PIPE_TRANSFER_CPU_READ. + * + * See also: + * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. + * - Direct3D's D3DLOCK_DISCARD flag. + */ + PIPE_TRANSFER_DISCARD = (1 << 8), -/* - * Buffer usage flags - */ + /** + * Fail if the resource cannot be mapped immediately. + * + * See also: + * - Direct3D's D3DLOCK_DONOTWAIT flag. + * - Mesa3D's MESA_MAP_NOWAIT_BIT flag. + * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. + */ + PIPE_TRANSFER_DONTBLOCK = (1 << 9), + + /** + * Do not attempt to synchronize pending operations on the resource when mapping. + * + * It should not be used with PIPE_TRANSFER_CPU_READ. + * + * See also: + * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. + * - Direct3D's D3DLOCK_NOOVERWRITE flag. + * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. + */ + PIPE_TRANSFER_UNSYNCHRONIZED = (1 << 10), + PIPE_TRANSFER_NOOVERWRITE = (1 << 10), /* are these really the same?? */ + + /** + * Written ranges will be notified later with + * pipe_context::transfer_flush_region. + * + * It should not be used with PIPE_TRANSFER_CPU_READ. + * + * See also: + * - pipe_context::transfer_flush_region + * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. + */ + PIPE_TRANSFER_FLUSH_EXPLICIT = (1 << 11) + +}; -#define PIPE_BUFFER_USAGE_CPU_READ (1 << 0) -#define PIPE_BUFFER_USAGE_CPU_WRITE (1 << 1) -#define PIPE_BUFFER_USAGE_GPU_READ (1 << 2) -#define PIPE_BUFFER_USAGE_GPU_WRITE (1 << 3) -#define PIPE_BUFFER_USAGE_PIXEL (1 << 4) -#define PIPE_BUFFER_USAGE_VERTEX (1 << 5) -#define PIPE_BUFFER_USAGE_INDEX (1 << 6) -#define PIPE_BUFFER_USAGE_CONSTANT (1 << 7) /* - * CPU access flags. - * - * These flags should only be used for texture transfers or when mapping - * buffers. - * - * Note that the PIPE_BUFFER_USAGE_CPU_xxx flags above are also used for - * mapping. Either PIPE_BUFFER_USAGE_CPU_READ or PIPE_BUFFER_USAGE_CPU_WRITE - * must be set. + * Resource binding flags -- state tracker must specify in advance all + * the ways a resource might be used. */ - -/** - * Discards the memory within the mapped region. +#define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */ +#define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */ +#define PIPE_BIND_SAMPLER_VIEW (1 << 2) /* create_sampler_view */ +#define PIPE_BIND_VERTEX_BUFFER (1 << 3) /* set_vertex_buffers */ +#define PIPE_BIND_INDEX_BUFFER (1 << 4) /* draw_elements */ +#define PIPE_BIND_CONSTANT_BUFFER (1 << 5) /* set_constant_buffer */ +#define PIPE_BIND_DISPLAY_TARGET (1 << 8) /* flush_front_buffer */ +#define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* get_transfer */ +#define PIPE_BIND_TRANSFER_READ (1 << 10) /* get_transfer */ +#define PIPE_BIND_STREAM_OUTPUT (1 << 11) /* set_stream_output_buffers */ +#define PIPE_BIND_CUSTOM (1 << 16) /* state-tracker/winsys usages */ + +/* The first two flags above were previously part of the amorphous + * TEXTURE_USAGE, most of which are now descriptions of the ways a + * particular texture can be bound to the gallium pipeline. The two flags + * below do not fit within that and probably need to be migrated to some + * other place. * - * It should not be used with PIPE_BUFFER_USAGE_CPU_READ. + * It seems like scanout is used by the Xorg state tracker to ask for + * a texture suitable for actual scanout (hence the name), which + * implies extra layout constraints on some hardware. It may also + * have some special meaning regarding mouse cursor images. * - * See also: - * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. - * - Direct3D's D3DLOCK_DISCARD flag. + * The shared flag is quite underspecified, but certainly isn't a + * binding flag - it seems more like a message to the winsys to create + * a shareable allocation. */ -#define PIPE_BUFFER_USAGE_DISCARD (1 << 8) +#define PIPE_BIND_SCANOUT (1 << 14) /* */ +#define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */ -/** - * Fail if the resource cannot be mapped immediately. - * - * See also: - * - Direct3D's D3DLOCK_DONOTWAIT flag. - * - Mesa3D's MESA_MAP_NOWAIT_BIT flag. - * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. - */ -#define PIPE_BUFFER_USAGE_DONTBLOCK (1 << 9) -/** - * Do not attempt to synchronize pending operations on the resource when mapping. - * - * It should not be used with PIPE_BUFFER_USAGE_CPU_READ. - * - * See also: - * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. - * - Direct3D's D3DLOCK_NOOVERWRITE flag. - * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. +/* Flags for the driver about resource behaviour: */ -#define PIPE_BUFFER_USAGE_UNSYNCHRONIZED (1 << 10) +#define PIPE_RESOURCE_FLAG_GEN_MIPS (1 << 0) /* Driver performs autogen mips */ +#define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */ +#define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */ -/** - * Written ranges will be notified later with - * pipe_screen::buffer_flush_mapped_range. - * - * It should not be used with PIPE_BUFFER_USAGE_CPU_READ. - * - * See also: - * - pipe_screen::buffer_flush_mapped_range - * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. +/* Hint about the expected lifecycle of a resource. */ -#define PIPE_BUFFER_USAGE_FLUSH_EXPLICIT (1 << 11) +#define PIPE_USAGE_DEFAULT 0 /* many uploads, draws intermixed */ +#define PIPE_USAGE_DYNAMIC 1 /* many uploads, draws intermixed */ +#define PIPE_USAGE_STATIC 2 /* same as immutable?? */ +#define PIPE_USAGE_IMMUTABLE 3 /* no change after first upload */ +#define PIPE_USAGE_STREAM 4 /* upload, draw, upload, draw */ +#define PIPE_USAGE_STAGING 5 /* supports data transfers from the GPU to the CPU */ -/** Pipe driver custom usage flags should be greater or equal to this value */ -#define PIPE_BUFFER_USAGE_CUSTOM (1 << 16) -/* Convenient shortcuts */ -#define PIPE_BUFFER_USAGE_CPU_READ_WRITE \ - ( PIPE_BUFFER_USAGE_CPU_READ | PIPE_BUFFER_USAGE_CPU_WRITE ) -#define PIPE_BUFFER_USAGE_GPU_READ_WRITE \ - ( PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE ) -#define PIPE_BUFFER_USAGE_WRITE \ - ( PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_GPU_WRITE ) +/* These are intended to be used in calls to is_format_supported, but + * no driver actually uses these flags, and only the glx/xlib state + * tracker issues them. + * + * Deprecate? + */ +#define PIPE_TEXTURE_GEOM_NON_SQUARE 0x1 +#define PIPE_TEXTURE_GEOM_NON_POWER_OF_TWO 0x2 /** @@ -350,7 +376,11 @@ enum pipe_transfer_usage { #define PIPE_QUERY_OCCLUSION_COUNTER 0 #define PIPE_QUERY_PRIMITIVES_GENERATED 1 #define PIPE_QUERY_PRIMITIVES_EMITTED 2 -#define PIPE_QUERY_TYPES 3 +#define PIPE_QUERY_TIME_ELAPSED 3 +#define PIPE_QUERY_SO_STATISTICS 5 +#define PIPE_QUERY_GPU_FINISHED 6 +#define PIPE_QUERY_TIMESTAMP_DISJOINT 7 +#define PIPE_QUERY_TYPES 8 /** @@ -384,47 +414,78 @@ enum pipe_transfer_usage { * Implementation capabilities/limits which are queried through * pipe_screen::get_param() and pipe_screen::get_paramf(). */ -#define PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS 1 -#define PIPE_CAP_NPOT_TEXTURES 2 -#define PIPE_CAP_TWO_SIDED_STENCIL 3 -#define PIPE_CAP_GLSL 4 /* XXX need something better */ -#define PIPE_CAP_DUAL_SOURCE_BLEND 5 -#define PIPE_CAP_ANISOTROPIC_FILTER 6 -#define PIPE_CAP_POINT_SPRITE 7 -#define PIPE_CAP_MAX_RENDER_TARGETS 8 -#define PIPE_CAP_OCCLUSION_QUERY 9 -#define PIPE_CAP_TEXTURE_SHADOW_MAP 10 -#define PIPE_CAP_MAX_TEXTURE_2D_LEVELS 11 -#define PIPE_CAP_MAX_TEXTURE_3D_LEVELS 12 -#define PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS 13 -#define PIPE_CAP_MAX_LINE_WIDTH 14 -#define PIPE_CAP_MAX_LINE_WIDTH_AA 15 -#define PIPE_CAP_MAX_POINT_WIDTH 16 -#define PIPE_CAP_MAX_POINT_WIDTH_AA 17 -#define PIPE_CAP_MAX_TEXTURE_ANISOTROPY 18 -#define PIPE_CAP_MAX_TEXTURE_LOD_BIAS 19 -#define PIPE_CAP_GUARD_BAND_LEFT 20 /*< float */ -#define PIPE_CAP_GUARD_BAND_TOP 21 /*< float */ -#define PIPE_CAP_GUARD_BAND_RIGHT 22 /*< float */ -#define PIPE_CAP_GUARD_BAND_BOTTOM 23 /*< float */ -#define PIPE_CAP_TEXTURE_MIRROR_CLAMP 24 -#define PIPE_CAP_TEXTURE_MIRROR_REPEAT 25 -#define PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS 26 -#define PIPE_CAP_TGSI_CONT_SUPPORTED 27 -#define PIPE_CAP_BLEND_EQUATION_SEPARATE 28 -#define PIPE_CAP_SM3 29 /*< Shader Model 3 supported */ -#define PIPE_CAP_MAX_PREDICATE_REGISTERS 30 -#define PIPE_CAP_MAX_COMBINED_SAMPLERS 31 /*< Maximum texture image units accessible from vertex - and fragment shaders combined */ -#define PIPE_CAP_MAX_CONST_BUFFERS 32 -#define PIPE_CAP_MAX_CONST_BUFFER_SIZE 33 /*< In bytes */ -#define PIPE_CAP_INDEP_BLEND_ENABLE 34 /*< blend enables and write masks per rendertarget */ -#define PIPE_CAP_INDEP_BLEND_FUNC 35 /*< different blend funcs per rendertarget */ -#define PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT 36 -#define PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT 37 -#define PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER 38 -#define PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER 39 +enum pipe_cap { + PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS, + PIPE_CAP_NPOT_TEXTURES, + PIPE_CAP_TWO_SIDED_STENCIL, + PIPE_CAP_GLSL, /* XXX need something better */ + PIPE_CAP_DUAL_SOURCE_BLEND, + PIPE_CAP_ANISOTROPIC_FILTER, + PIPE_CAP_POINT_SPRITE, + PIPE_CAP_MAX_RENDER_TARGETS, + PIPE_CAP_OCCLUSION_QUERY, + PIPE_CAP_TIMER_QUERY, + PIPE_CAP_TEXTURE_SHADOW_MAP, + PIPE_CAP_TEXTURE_SWIZZLE, + PIPE_CAP_MAX_TEXTURE_2D_LEVELS, + PIPE_CAP_MAX_TEXTURE_3D_LEVELS, + PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS, + PIPE_CAP_MAX_LINE_WIDTH, + PIPE_CAP_MAX_LINE_WIDTH_AA, + PIPE_CAP_MAX_POINT_WIDTH, + PIPE_CAP_MAX_POINT_WIDTH_AA, + PIPE_CAP_MAX_TEXTURE_ANISOTROPY, + PIPE_CAP_MAX_TEXTURE_LOD_BIAS, + PIPE_CAP_GUARD_BAND_LEFT, /*< float */ + PIPE_CAP_GUARD_BAND_TOP, /*< float */ + PIPE_CAP_GUARD_BAND_RIGHT, /*< float */ + PIPE_CAP_GUARD_BAND_BOTTOM, /*< float */ + PIPE_CAP_TEXTURE_MIRROR_CLAMP, + PIPE_CAP_TEXTURE_MIRROR_REPEAT, + PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS, + PIPE_CAP_BLEND_EQUATION_SEPARATE, + PIPE_CAP_SM3, /*< Shader Model, supported */ + PIPE_CAP_STREAM_OUTPUT, + PIPE_CAP_PRIMITIVE_RESTART, + /** Maximum texture image units accessible from vertex and fragment shaders + * combined */ + PIPE_CAP_MAX_COMBINED_SAMPLERS, + /** blend enables and write masks per rendertarget */ + PIPE_CAP_INDEP_BLEND_ENABLE, + /** different blend funcs per rendertarget */ + PIPE_CAP_INDEP_BLEND_FUNC, + PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE, + PIPE_CAP_ARRAY_TEXTURES, + PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT, + PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT, + PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER, + PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER, + PIPE_CAP_DEPTH_CLAMP, + PIPE_CAP_SHADER_STENCIL_EXPORT, +}; +/* Shader caps not specific to any single stage */ +enum pipe_shader_cap +{ + PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */ + PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS, + PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS, + PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS, + PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH, + PIPE_SHADER_CAP_MAX_INPUTS, + PIPE_SHADER_CAP_MAX_CONSTS, + PIPE_SHADER_CAP_MAX_CONST_BUFFERS, + PIPE_SHADER_CAP_MAX_TEMPS, + PIPE_SHADER_CAP_MAX_ADDRS, + PIPE_SHADER_CAP_MAX_PREDS, + /* boolean caps */ + PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED, + PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR, + PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR, + PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR, + PIPE_SHADER_CAP_INDIRECT_CONST_ADDR, + PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */ +}; /** * Referenced query flags. @@ -434,7 +495,6 @@ enum pipe_transfer_usage { #define PIPE_REFERENCED_FOR_READ (1 << 0) #define PIPE_REFERENCED_FOR_WRITE (1 << 1) - enum pipe_video_codec { PIPE_VIDEO_CODEC_UNKNOWN = 0, @@ -446,6 +506,7 @@ enum pipe_video_codec enum pipe_video_profile { + PIPE_VIDEO_PROFILE_UNKNOWN, PIPE_VIDEO_PROFILE_MPEG1, PIPE_VIDEO_PROFILE_MPEG2_SIMPLE, PIPE_VIDEO_PROFILE_MPEG2_MAIN, @@ -459,6 +520,22 @@ enum pipe_video_profile PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH }; + +/** + * Composite query types + */ +struct pipe_query_data_so_statistics +{ + uint64_t num_primitives_written; + uint64_t primitives_storage_needed; +}; +struct pipe_query_data_timestamp_disjoint +{ + uint64_t frequency; + boolean disjoint; +}; + + #ifdef __cplusplus } #endif