X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fieee754%2Fadd%2Fnmigen_add_experiment.py;h=773e3aee155d6f0d90ed42e99a97f13ae8a14e36;hb=e71ebd7c7df6fed881f1a5cea15ae1d7b022cd28;hp=ecb1d35b14350f67e95f51522dc7407b2f056bc8;hpb=58e455d3bd9b43d076468bf2b7b1f0784e5c4fd2;p=ieee754fpu.git

diff --git a/src/ieee754/add/nmigen_add_experiment.py b/src/ieee754/add/nmigen_add_experiment.py
index ecb1d35b..773e3aee 100644
--- a/src/ieee754/add/nmigen_add_experiment.py
+++ b/src/ieee754/add/nmigen_add_experiment.py
@@ -3,8 +3,8 @@
 # 2013-12-12
 
 from nmigen.cli import main, verilog
-from fpadd.statemachine import FPADDBase, FPADD
-from fpadd.pipeline import FPADDMuxInOut
+from ieee754.fpadd.statemachine import FPADDBase, FPADD
+from ieee754.fpadd.pipeline import FPADDMuxInOut
 
 if __name__ == "__main__":
     if True: