X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fieee754%2Fdiv_rem_sqrt_rsqrt%2Fcore.py;h=9fd5eb856cb0b4e85a4800c321623ce956028fe8;hb=f6620d6dea70c07e0ddba7d0b107473f5b6ee741;hp=547af3ceed09834d5665964a6ee1e17897066faf;hpb=838418d03759a8a457e1f15c819b95ddea8aac1d;p=ieee754fpu.git

diff --git a/src/ieee754/div_rem_sqrt_rsqrt/core.py b/src/ieee754/div_rem_sqrt_rsqrt/core.py
index 547af3ce..9fd5eb85 100644
--- a/src/ieee754/div_rem_sqrt_rsqrt/core.py
+++ b/src/ieee754/div_rem_sqrt_rsqrt/core.py
@@ -44,7 +44,7 @@ class DivPipeCoreConfig:
             + f"{self.fract_width}, {self.log2_radix})"
 
     @property
-    def num_calculate_stages(self):
+    def n_stages(self):
         """ Get the number of ``DivPipeCoreCalculateStage`` needed. """
         return (self.bit_width + self.log2_radix - 1) // self.log2_radix
 
@@ -265,7 +265,7 @@ class DivPipeCoreCalculateStage(Elaboratable):
     def __init__(self, core_config, stage_index):
         """ Create a ``DivPipeCoreSetupStage`` instance. """
         self.core_config = core_config
-        assert stage_index in range(core_config.num_calculate_stages)
+        assert stage_index in range(core_config.n_stages)
         self.stage_index = stage_index
         self.i = self.ispec()
         self.o = self.ospec()