X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fieee754%2Ffclass%2Ftest%2Ftest_fclass_pipe.py;h=ce870082fd0409b7dff014629a264f88cd1b41ff;hb=4d31bab9e4e1bda62aa7965c4acb56aa0ebf39de;hp=8c4726b82378756ef5f488c0e7759a75d9a8690c;hpb=88affcb4c01a971a51735665f054947cce77fcfa;p=ieee754fpu.git

diff --git a/src/ieee754/fclass/test/test_fclass_pipe.py b/src/ieee754/fclass/test/test_fclass_pipe.py
index 8c4726b8..ce870082 100644
--- a/src/ieee754/fclass/test/test_fclass_pipe.py
+++ b/src/ieee754/fclass/test/test_fclass_pipe.py
@@ -3,38 +3,49 @@
 
 from ieee754.fclass.pipeline import (FPClassMuxInOut,)
 from ieee754.fpcommon.test.fpmux import runfp
+from ieee754.fpcommon.test.case_gen import run_pipe_fp
+from ieee754.fpcommon.test import unit_test_half
 from ieee754.fpcommon.fpbase import FPFormat
 
+import unittest
+
 import sfpy
 from sfpy import Float64, Float32, Float16
 
+
 def fclass(wid, x):
+    """ analyses the FP number and returns a RISC-V "FCLASS" unary bitfield
+
+        this is easy to understand however it has redundant checks (which
+        don't matter because performance of *testing* is not hardware-critical)
+        see FPClassMod for a hardware-optimal (hard-to-read) version
+    """
     x = x.bits
     fmt = FPFormat.standard(wid)
-    print (hex(x), "exp", fmt.get_exponent(x), fmt.emax,
-                    "m", hex(fmt.get_mantissa(x)),
-                    fmt.get_mantissa(x) & (1<<fmt.m_width-1))
+    print (hex(x), "exp", fmt.get_exponent(x), fmt.e_max,
+                    "m", hex(fmt.get_mantissa_field(x)),
+                    fmt.get_mantissa_field(x) & (1<<fmt.m_width-1))
     if fmt.is_inf(x):
-        if fmt.get_sign(x):
+        if fmt.get_sign_field(x):
             return 1<<0
         else:
             return 1<<7
     if fmt.is_zero(x):
-        if fmt.get_sign(x):
+        if fmt.get_sign_field(x):
             return 1<<3
         else:
             return 1<<4
-    if fmt.get_exponent(x) == fmt.emax and fmt.get_mantissa(x) != 0:
-        if fmt.is_nan_signalling(x):
+    if fmt.get_exponent(x) == fmt.e_max and fmt.get_mantissa_field(x) != 0:
+        if fmt.is_nan_signaling(x):
             return 1<<8
         else:
             return 1<<9
-    if fmt.is_subnormal(x) and fmt.get_mantissa(x) != 0:
-        if fmt.get_sign(x):
+    if fmt.is_subnormal(x) and fmt.get_mantissa_field(x) != 0:
+        if fmt.get_sign_field(x):
             return 1<<2
         else:
             return 1<<5
-    if fmt.get_sign(x):
+    if fmt.get_sign_field(x):
         return 1<<1
     else:
         return 1<<6
@@ -44,12 +55,47 @@ def fclass_16(x):
     return fclass(16, x)
 
 
-def test_class_pipe_f16():
-    dut = FPClassMuxInOut(16, 16, 4, op_wid=1)
-    runfp(dut, 16, "test_fcvt_class_pipe_f16", Float16, fclass_16,
-                True, n_vals=100)
+def fclass_32(x):
+    return fclass(32, x)
+
+
+def fclass_64(x):
+    return fclass(64, x)
+
+
+class TestFClassPipe(unittest.TestCase):
+    def test_class_pipe_f16(self):
+        dut = FPClassMuxInOut(16, 16, 4, op_wid=1)
+        runfp(dut, 16, "test_fclass_pipe_f16", Float16, fclass_16,
+                    True, n_vals=100)
+
+    def test_class_pipe_f32(self):
+        dut = FPClassMuxInOut(32, 32, 4, op_wid=1)
+        runfp(dut, 32, "test_fclass_pipe_f32", Float32, fclass_32,
+                    True, n_vals=100)
+
+    def test_class_pipe_f64(self):
+        dut = FPClassMuxInOut(64, 64, 4, op_wid=1)
+        runfp(dut, 64, "test_fclass_pipe_f64", Float64, fclass_64,
+                    True, n_vals=100)
+
+
+class TestFClassPipeCoverage(unittest.TestCase):
+    def test_pipe_class_f16(self):
+        dut = FPClassMuxInOut(16, 16, 4, op_wid=1)
+        run_pipe_fp(dut, 16, "fclass16", unit_test_half, Float16, None,
+                    fclass_16, 100, single_op=True)
+
+    def test_pipe_class_f32(self):
+        dut = FPClassMuxInOut(32, 32, 4, op_wid=1)
+        run_pipe_fp(dut, 32, "fclass32", unit_test_half, Float32, None,
+                    fclass_32, 100, single_op=True)
+
+    def test_pipe_class_f64(self):
+        dut = FPClassMuxInOut(64, 64, 4, op_wid=1)
+        run_pipe_fp(dut, 64, "fclass64", unit_test_half, Float64, None,
+                    fclass_64, 100, single_op=True)
 
 
 if __name__ == '__main__':
-    for i in range(200):
-        test_class_pipe_f16()
+    unittest.main()