X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fieee754%2Ffpmul%2Ftest%2Ftest_mul.py;h=f58a9f66b053d576d2a7da5a1944aa2cf8aa1ff1;hb=1a859e23c3a3526243be596f11188ce13e5dfa64;hp=4f879ee1cc33a3f511082883517255d1b690be43;hpb=d4bf60f2b005ff110c2cc096c4cf387f3a49c0d7;p=ieee754fpu.git

diff --git a/src/ieee754/fpmul/test/test_mul.py b/src/ieee754/fpmul/test/test_mul.py
index 4f879ee1..f58a9f66 100644
--- a/src/ieee754/fpmul/test/test_mul.py
+++ b/src/ieee754/fpmul/test/test_mul.py
@@ -8,7 +8,8 @@ from nmigen.compat.sim import run_simulation
 
 from ieee754.fpmul.fmul import FPMUL
 
-from ieee754.fpcommon.test.unit_test_single import (get_mantissa, get_exponent, get_sign, is_nan,
+from ieee754.fpcommon.test.unit_test_single import (get_mantissa, get_exponent,
+                                get_sign, is_nan,
                                 is_inf, is_pos_inf, is_neg_inf,
                                 match, get_case, check_case, run_fpunit,
                                 run_edge_cases, run_corner_cases)