X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fcompiler%2Fbrw_eu.c;h=3fb4e4050724cbd8f59b561b89f9bfe98fe8d388;hb=80e8dfe9dead5a034f8e5ae3f92cc60e99de88b6;hp=3646076a8e8a6a170c0cd7e8c041fbdcc9a0ec3f;hpb=d5bf093cf9da323ce3ebb69c07834870441e0e38;p=mesa.git diff --git a/src/intel/compiler/brw_eu.c b/src/intel/compiler/brw_eu.c index 3646076a8e8..3fb4e405072 100644 --- a/src/intel/compiler/brw_eu.c +++ b/src/intel/compiler/brw_eu.c @@ -126,65 +126,79 @@ brw_swizzle_immediate(enum brw_reg_type type, uint32_t x, unsigned swz) } } +unsigned +brw_get_default_exec_size(struct brw_codegen *p) +{ + return p->current->exec_size; +} + +unsigned +brw_get_default_group(struct brw_codegen *p) +{ + return p->current->group; +} + +unsigned +brw_get_default_access_mode(struct brw_codegen *p) +{ + return p->current->access_mode; +} + void brw_set_default_exec_size(struct brw_codegen *p, unsigned value) { - brw_inst_set_exec_size(p->devinfo, p->current, value); + p->current->exec_size = value; } void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc ) { - brw_inst_set_pred_control(p->devinfo, p->current, pc); + p->current->predicate = pc; } void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse) { - brw_inst_set_pred_inv(p->devinfo, p->current, predicate_inverse); + p->current->pred_inv = predicate_inverse; } void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg) { - if (p->devinfo->gen >= 7) - brw_inst_set_flag_reg_nr(p->devinfo, p->current, reg); - - brw_inst_set_flag_subreg_nr(p->devinfo, p->current, subreg); + assert(subreg < 2); + p->current->flag_subreg = reg * 2 + subreg; } void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ) { - brw_inst_set_access_mode(p->devinfo, p->current, access_mode); + p->current->access_mode = access_mode; } void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression compression_control) { - if (p->devinfo->gen >= 6) { - /* Since we don't use the SIMD32 support in gen6, we translate - * the pre-gen6 compression control here. + switch (compression_control) { + case BRW_COMPRESSION_NONE: + /* This is the "use the first set of bits of dmask/vmask/arf + * according to execsize" option. */ - switch (compression_control) { - case BRW_COMPRESSION_NONE: - /* This is the "use the first set of bits of dmask/vmask/arf - * according to execsize" option. - */ - brw_inst_set_qtr_control(p->devinfo, p->current, GEN6_COMPRESSION_1Q); - break; - case BRW_COMPRESSION_2NDHALF: - /* For SIMD8, this is "use the second set of 8 bits." */ - brw_inst_set_qtr_control(p->devinfo, p->current, GEN6_COMPRESSION_2Q); - break; - case BRW_COMPRESSION_COMPRESSED: - /* For SIMD16 instruction compression, use the first set of 16 bits - * since we don't do SIMD32 dispatch. - */ - brw_inst_set_qtr_control(p->devinfo, p->current, GEN6_COMPRESSION_1H); - break; - default: - unreachable("not reached"); - } - } else { - brw_inst_set_qtr_control(p->devinfo, p->current, compression_control); + p->current->group = 0; + break; + case BRW_COMPRESSION_2NDHALF: + /* For SIMD8, this is "use the second set of 8 bits." */ + p->current->group = 8; + break; + case BRW_COMPRESSION_COMPRESSED: + /* For SIMD16 instruction compression, use the first set of 16 bits + * since we don't do SIMD32 dispatch. + */ + p->current->group = 0; + break; + default: + unreachable("not reached"); + } + + if (p->devinfo->gen <= 6) { + p->current->compressed = + (compression_control == BRW_COMPRESSION_COMPRESSED); } } @@ -217,7 +231,7 @@ brw_inst_set_compression(const struct gen_device_info *devinfo, void brw_set_default_compression(struct brw_codegen *p, bool on) { - brw_inst_set_compression(p->devinfo, p->current, on); + p->current->compressed = on; } /** @@ -254,29 +268,28 @@ brw_inst_set_group(const struct gen_device_info *devinfo, void brw_set_default_group(struct brw_codegen *p, unsigned group) { - brw_inst_set_group(p->devinfo, p->current, group); + p->current->group = group; } void brw_set_default_mask_control( struct brw_codegen *p, unsigned value ) { - brw_inst_set_mask_control(p->devinfo, p->current, value); + p->current->mask_control = value; } void brw_set_default_saturate( struct brw_codegen *p, bool enable ) { - brw_inst_set_saturate(p->devinfo, p->current, enable); + p->current->saturate = enable; } void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value) { - if (p->devinfo->gen >= 6) - brw_inst_set_acc_wr_control(p->devinfo, p->current, value); + p->current->acc_wr_control = value; } void brw_push_insn_state( struct brw_codegen *p ) { assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]); - memcpy(p->current + 1, p->current, sizeof(brw_inst)); + *(p->current + 1) = *p->current; p->current++; } @@ -351,24 +364,37 @@ brw_disassemble(const struct gen_device_info *devinfo, if (compacted) { brw_compact_inst *compacted = (void *)insn; - if (dump_hex) { - fprintf(out, "0x%08x 0x%08x ", - ((uint32_t *)insn)[1], - ((uint32_t *)insn)[0]); - } - - brw_uncompact_instruction(devinfo, &uncompacted, compacted); - insn = &uncompacted; - offset += 8; + if (dump_hex) { + unsigned char * insn_ptr = ((unsigned char *)&insn[0]); + const unsigned int blank_spaces = 24; + for (int i = 0 ; i < 8; i = i + 4) { + fprintf(out, "%02x %02x %02x %02x ", + insn_ptr[i], + insn_ptr[i + 1], + insn_ptr[i + 2], + insn_ptr[i + 3]); + } + /* Make compacted instructions hex value output vertically aligned + * with uncompacted instructions hex value + */ + fprintf(out, "%*c", blank_spaces, ' '); + } + + brw_uncompact_instruction(devinfo, &uncompacted, compacted); + insn = &uncompacted; + offset += 8; } else { - if (dump_hex) { - fprintf(out, "0x%08x 0x%08x 0x%08x 0x%08x ", - ((uint32_t *)insn)[3], - ((uint32_t *)insn)[2], - ((uint32_t *)insn)[1], - ((uint32_t *)insn)[0]); - } - offset += 16; + if (dump_hex) { + unsigned char * insn_ptr = ((unsigned char *)&insn[0]); + for (int i = 0 ; i < 16; i = i + 4) { + fprintf(out, "%02x %02x %02x %02x ", + insn_ptr[i], + insn_ptr[i + 1], + insn_ptr[i + 2], + insn_ptr[i + 3]); + } + } + offset += 16; } brw_disassemble_inst(out, devinfo, insn, compacted);