X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fcompiler%2Fbrw_vec4_generator.cpp;h=8e3dc34ddb3309f97b94d0d971ebb30c516a7770;hb=3a2e93147f7fa4a6fd17313353113a33291c5ce0;hp=013b9d48dc1e4111227179a545f679b3865d7846;hpb=2bac890bf5896a7ddc27a901b8014e28bc77d84c;p=mesa.git diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp index 013b9d48dc1..8e3dc34ddb3 100644 --- a/src/intel/compiler/brw_vec4_generator.cpp +++ b/src/intel/compiler/brw_vec4_generator.cpp @@ -291,8 +291,6 @@ generate_tex(struct brw_codegen *p, inst->header_size != 0, BRW_SAMPLER_SIMD_MODE_SIMD4X2, return_format); - - brw_mark_surface_used(&prog_data->base, sampler + base_binding_table_index); } else { /* Non-constant sampler index. */ @@ -332,7 +330,8 @@ generate_tex(struct brw_codegen *p, 0 /* sampler */, msg_type, BRW_SAMPLER_SIMD_MODE_SIMD4X2, - return_format)); + return_format), + false /* EOT */); /* visitor knows more than we do about the surface limit required, * so has already done marking. @@ -929,8 +928,21 @@ generate_tes_add_indirect_urb_offset(struct brw_codegen *p, brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, dst, header); + + /* Uniforms will have a stride <0;4,1>, and we need to convert to <0;1,0>. + * Other values get <4;1,0>. + */ + struct brw_reg restrided_offset; + if (offset.vstride == BRW_VERTICAL_STRIDE_0 && + offset.width == BRW_WIDTH_4 && + offset.hstride == BRW_HORIZONTAL_STRIDE_1) { + restrided_offset = stride(offset, 0, 1, 0); + } else { + restrided_offset = stride(offset, 4, 1, 0); + } + /* m0.3-0.4: 128-bit-granular offsets into the URB from the handles */ - brw_MOV(p, vec2(get_element_ud(dst, 3)), stride(offset, 4, 1, 0)); + brw_MOV(p, vec2(get_element_ud(dst, 3)), restrided_offset); brw_pop_insn_state(p); } @@ -1185,7 +1197,7 @@ generate_scratch_write(struct brw_codegen *p, const unsigned target_cache = (devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE : devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : - BRW_DATAPORT_READ_TARGET_RENDER_CACHE); + BRW_SFID_DATAPORT_WRITE); struct brw_reg header = brw_vec8_grf(0, 0); bool write_commit; @@ -1237,21 +1249,19 @@ generate_scratch_write(struct brw_codegen *p, * dword is written. */ brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); + brw_inst_set_sfid(p->devinfo, send, target_cache); brw_set_dest(p, send, dst); brw_set_src0(p, send, header); if (devinfo->gen < 6) brw_inst_set_cond_modifier(p->devinfo, send, inst->base_mrf); - brw_set_dp_write_message(p, send, - brw_scratch_surface_idx(p), - BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD, - msg_type, - target_cache, - 3, /* mlen */ - true, /* header present */ - false, /* not a render target write */ - write_commit, /* rlen */ - false, /* eot */ - write_commit); + brw_set_desc(p, send, + brw_message_desc(devinfo, 3, write_commit, true) | + brw_dp_write_desc(devinfo, + brw_scratch_surface_idx(p), + BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD, + msg_type, + false, /* not a render target write */ + write_commit)); } static void @@ -1340,8 +1350,6 @@ generate_get_buffer_size(struct brw_codegen *p, inst->header_size > 0, BRW_SAMPLER_SIMD_MODE_SIMD4X2, BRW_SAMPLER_RETURN_FORMAT_SINT32); - - brw_mark_surface_used(&prog_data->base, surf_index.ud); } static void @@ -1367,9 +1375,6 @@ generate_pull_constant_load_gen7(struct brw_codegen *p, 0, /* LD message ignores sampler unit */ GEN5_SAMPLER_MESSAGE_SAMPLE_LD, BRW_SAMPLER_SIMD_MODE_SIMD4X2, 0)); - - brw_mark_surface_used(&prog_data->base, surf_index.ud); - } else { struct brw_reg addr = vec1(retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD)); @@ -1396,7 +1401,8 @@ generate_pull_constant_load_gen7(struct brw_codegen *p, 0 /* sampler */, GEN5_SAMPLER_MESSAGE_SAMPLE_LD, BRW_SAMPLER_SIMD_MODE_SIMD4X2, - 0)); + 0), + false /* EOT */); } } @@ -1855,47 +1861,27 @@ generate_code(struct brw_codegen *p, case SHADER_OPCODE_SHADER_TIME_ADD: brw_shader_time_add(p, src[0], prog_data->base.binding_table.shader_time_start); - brw_mark_surface_used(&prog_data->base, - prog_data->base.binding_table.shader_time_start); break; - case SHADER_OPCODE_UNTYPED_ATOMIC: + case VEC4_OPCODE_UNTYPED_ATOMIC: assert(src[2].file == BRW_IMMEDIATE_VALUE); brw_untyped_atomic(p, dst, src[0], src[1], src[2].ud, inst->mlen, !inst->dst.is_null(), inst->header_size); break; - case SHADER_OPCODE_UNTYPED_SURFACE_READ: + case VEC4_OPCODE_UNTYPED_SURFACE_READ: assert(!inst->header_size); assert(src[2].file == BRW_IMMEDIATE_VALUE); brw_untyped_surface_read(p, dst, src[0], src[1], inst->mlen, src[2].ud); break; - case SHADER_OPCODE_UNTYPED_SURFACE_WRITE: + case VEC4_OPCODE_UNTYPED_SURFACE_WRITE: assert(src[2].file == BRW_IMMEDIATE_VALUE); brw_untyped_surface_write(p, src[0], src[1], inst->mlen, src[2].ud, inst->header_size); break; - case SHADER_OPCODE_TYPED_ATOMIC: - assert(src[2].file == BRW_IMMEDIATE_VALUE); - brw_typed_atomic(p, dst, src[0], src[1], src[2].ud, inst->mlen, - !inst->dst.is_null(), inst->header_size); - break; - - case SHADER_OPCODE_TYPED_SURFACE_READ: - assert(src[2].file == BRW_IMMEDIATE_VALUE); - brw_typed_surface_read(p, dst, src[0], src[1], inst->mlen, - src[2].ud, inst->header_size); - break; - - case SHADER_OPCODE_TYPED_SURFACE_WRITE: - assert(src[2].file == BRW_IMMEDIATE_VALUE); - brw_typed_surface_write(p, src[0], src[1], inst->mlen, - src[2].ud, inst->header_size); - break; - case SHADER_OPCODE_MEMORY_FENCE: brw_memory_fence(p, dst, BRW_OPCODE_SEND); break;