X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fisl%2Fisl.h;h=9b96f7a5281631fe390d2283ad6a25248218c818;hb=3547e19bbd0d70fc391f5982ea38a026a5994b1c;hp=3c175d2d051cd9310ff9855a44ddefc58b12fb14;hpb=242f6f7492a0e5b0cafa003c61f1d9e8ccce8889;p=mesa.git diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 3c175d2d051..9b96f7a5281 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -44,6 +44,7 @@ #include "c99_compat.h" #include "util/macros.h" +#include "util/format/u_format.h" #ifdef __cplusplus extern "C" { @@ -167,6 +168,7 @@ enum isl_format { ISL_FORMAT_B10G10R10A2_UNORM = 209, ISL_FORMAT_B10G10R10A2_UNORM_SRGB = 210, ISL_FORMAT_R11G11B10_FLOAT = 211, + ISL_FORMAT_R10G10B10_FLOAT_A2_UNORM = 213, ISL_FORMAT_R32_SINT = 214, ISL_FORMAT_R32_UINT = 215, ISL_FORMAT_R32_FLOAT = 216, @@ -388,6 +390,14 @@ enum isl_format { ISL_FORMAT_GEN9_CCS_32BPP, ISL_FORMAT_GEN9_CCS_64BPP, ISL_FORMAT_GEN9_CCS_128BPP, + ISL_FORMAT_GEN12_CCS_8BPP_Y0, + ISL_FORMAT_GEN12_CCS_16BPP_Y0, + ISL_FORMAT_GEN12_CCS_32BPP_Y0, + ISL_FORMAT_GEN12_CCS_64BPP_Y0, + ISL_FORMAT_GEN12_CCS_128BPP_Y0, + + /* An upper bound on the supported format enumerations */ + ISL_NUM_FORMATS, /* Hardware doesn't understand this out-of-band value */ ISL_FORMAT_UNSUPPORTED = UINT16_MAX, @@ -461,6 +471,7 @@ enum isl_tiling { ISL_TILING_Ys, /**< Standard 64K tiling. The 's' means "sixty-four". */ ISL_TILING_HIZ, /**< Tiling format for HiZ surfaces */ ISL_TILING_CCS, /**< Tiling format for CCS surfaces */ + ISL_TILING_GEN12_CCS, /**< Tiling format for Gen12 CCS surfaces */ }; /** @@ -476,6 +487,7 @@ typedef uint32_t isl_tiling_flags_t; #define ISL_TILING_Ys_BIT (1u << ISL_TILING_Ys) #define ISL_TILING_HIZ_BIT (1u << ISL_TILING_HIZ) #define ISL_TILING_CCS_BIT (1u << ISL_TILING_CCS) +#define ISL_TILING_GEN12_CCS_BIT (1u << ISL_TILING_GEN12_CCS) #define ISL_TILING_ANY_MASK (~0u) #define ISL_TILING_NON_LINEAR_MASK (~ISL_TILING_LINEAR_BIT) @@ -598,6 +610,21 @@ enum isl_aux_usage { * @invariant isl_surf::samples == 1 */ ISL_AUX_USAGE_CCS_E, + + /** The auxiliary surface provides full lossless media color compression + * + * @invariant isl_surf::samples == 1 + */ + ISL_AUX_USAGE_MC, + + /** The auxiliary surface is a HiZ surface and CCS is also enabled */ + ISL_AUX_USAGE_HIZ_CCS, + + /** The auxiliary surface is an MCS and CCS is also enabled + * + * @invariant isl_surf::samples > 1 + */ + ISL_AUX_USAGE_MCS_CCS, }; /** @@ -858,7 +885,7 @@ typedef uint8_t isl_channel_mask_t; /** * @brief A channel select (also known as texture swizzle) value */ -enum isl_channel_select { +enum PACKED isl_channel_select { ISL_CHANNEL_SELECT_ZERO = 0, ISL_CHANNEL_SELECT_ONE = 1, ISL_CHANNEL_SELECT_RED = 4, @@ -946,6 +973,12 @@ enum isl_msaa_layout { ISL_MSAA_LAYOUT_ARRAY, }; +typedef enum { + ISL_MEMCPY = 0, + ISL_MEMCPY_BGRA8, + ISL_MEMCPY_STREAMING_LOAD, + ISL_MEMCPY_INVALID, +} isl_memcpy_type; struct isl_device { const struct gen_device_info *info; @@ -983,6 +1016,11 @@ struct isl_device { uint8_t stencil_offset; uint8_t hiz_offset; } ds; + + struct { + uint32_t internal; + uint32_t external; + } mocs; }; struct isl_extent2d { @@ -1005,6 +1043,7 @@ struct isl_extent4d { struct isl_channel_layout { enum isl_base_type type; + uint8_t start_bit; /**< Bit at which this channel starts */ uint8_t bits; /**< Size in bits */ }; @@ -1081,7 +1120,7 @@ struct isl_tile_info { * always used with ISL_FORMAT_R8) has a logical size of 64el x 64el but * its physical size is 128B x 32rows, the same as a Y-tile. * - * @see isl_surf::row_pitch + * @see isl_surf::row_pitch_B */ struct isl_extent2d phys_extent_B; }; @@ -1131,13 +1170,13 @@ struct isl_surf_init_info { uint32_t samples; /** Lower bound for isl_surf::alignment, in bytes. */ - uint32_t min_alignment; + uint32_t min_alignment_B; /** * Exact value for isl_surf::row_pitch. Ignored if zero. isl_surf_init() * will fail if this is misaligned or out of bounds. */ - uint32_t row_pitch; + uint32_t row_pitch_B; isl_surf_usage_flags_t usage; @@ -1166,7 +1205,7 @@ struct isl_surf { /** * Physical extent of the surface's base level, in units of physical - * surface samples and aligned to the format's compression block. + * surface samples. * * Consider isl_dim_layout as an operator that transforms a logical surface * layout to a physical surface layout. Then @@ -1180,17 +1219,17 @@ struct isl_surf { uint32_t samples; /** Total size of the surface, in bytes. */ - uint64_t size; + uint64_t size_B; /** Required alignment for the surface's base address. */ - uint32_t alignment; + uint32_t alignment_B; /** * The interpretation of this field depends on the value of * isl_tile_info::physical_extent_B. In particular, the width of the - * surface in tiles is row_pitch / isl_tile_info::physical_extent_B.width + * surface in tiles is row_pitch_B / isl_tile_info::physical_extent_B.width * and the distance in bytes between vertically adjacent tiles in the image - * is given by row_pitch * isl_tile_info::physical_extent_B.height. + * is given by row_pitch_B * isl_tile_info::physical_extent_B.height. * * For linear images where isl_tile_info::physical_extent_B.height == 1, * this cleanly reduces to being the distance, in bytes, between vertically @@ -1198,7 +1237,7 @@ struct isl_surf { * * @see isl_tile_info::phys_extent_B; */ - uint32_t row_pitch; + uint32_t row_pitch_B; /** * Pitch between physical array slices, in rows of surface elements. @@ -1334,7 +1373,7 @@ struct isl_buffer_fill_state_info { /** * The size of the buffer */ - uint64_t size; + uint64_t size_B; /** * The Memory Object Control state for the filled surface state. @@ -1351,7 +1390,12 @@ struct isl_buffer_fill_state_info { */ enum isl_format format; - uint32_t stride; + /** + * The swizzle to use in the surface state + */ + struct isl_swizzle swizzle; + + uint32_t stride_B; }; struct isl_depth_stencil_hiz_emit_info { @@ -1407,6 +1451,11 @@ struct isl_depth_stencil_hiz_emit_info { * The depth clear value */ float depth_clear_value; + + /** + * Track stencil aux usage for Gen >= 12 + */ + enum isl_aux_usage stencil_aux_usage; }; extern const struct isl_format_layout isl_format_layouts[]; @@ -1422,6 +1471,8 @@ isl_device_get_sample_counts(struct isl_device *dev); static inline const struct isl_format_layout * ATTRIBUTE_CONST isl_format_get_layout(enum isl_format fmt) { + assert(fmt != ISL_FORMAT_UNSUPPORTED); + assert(fmt < ISL_NUM_FORMATS); return &isl_format_layouts[fmt]; } @@ -1430,9 +1481,11 @@ bool isl_format_is_valid(enum isl_format); static inline const char * ATTRIBUTE_CONST isl_format_get_name(enum isl_format fmt) { - return isl_format_layouts[fmt].name; + return isl_format_get_layout(fmt)->name; } +enum isl_format isl_format_for_pipe_format(enum pipe_format pf); + bool isl_format_supports_rendering(const struct gen_device_info *devinfo, enum isl_format format); bool isl_format_supports_alpha_blending(const struct gen_device_info *devinfo, @@ -1457,6 +1510,7 @@ bool isl_format_supports_multisampling(const struct gen_device_info *devinfo, bool isl_formats_are_ccs_e_compatible(const struct gen_device_info *devinfo, enum isl_format format1, enum isl_format format2); +uint8_t isl_format_get_aux_map_encoding(enum isl_format format); bool isl_format_has_unorm_channel(enum isl_format fmt) ATTRIBUTE_CONST; bool isl_format_has_snorm_channel(enum isl_format fmt) ATTRIBUTE_CONST; @@ -1486,6 +1540,9 @@ isl_format_has_int_channel(enum isl_format fmt) isl_format_has_sint_channel(fmt); } +bool isl_format_has_color_component(enum isl_format fmt, + int component) ATTRIBUTE_CONST; + unsigned isl_format_get_num_channels(enum isl_format fmt); uint32_t isl_format_get_depth_format(enum isl_format fmt, bool has_stencil); @@ -1545,7 +1602,7 @@ isl_format_block_is_1x1x1(enum isl_format fmt) static inline bool isl_format_is_srgb(enum isl_format fmt) { - return isl_format_layouts[fmt].colorspace == ISL_COLORSPACE_SRGB; + return isl_format_get_layout(fmt)->colorspace == ISL_COLORSPACE_SRGB; } enum isl_format isl_format_srgb_to_linear(enum isl_format fmt); @@ -1555,14 +1612,37 @@ isl_format_is_rgb(enum isl_format fmt) { if (isl_format_is_yuv(fmt)) return false; - return isl_format_layouts[fmt].channels.r.bits > 0 && - isl_format_layouts[fmt].channels.g.bits > 0 && - isl_format_layouts[fmt].channels.b.bits > 0 && - isl_format_layouts[fmt].channels.a.bits == 0; + + const struct isl_format_layout *fmtl = isl_format_get_layout(fmt); + + return fmtl->channels.r.bits > 0 && + fmtl->channels.g.bits > 0 && + fmtl->channels.b.bits > 0 && + fmtl->channels.a.bits == 0; +} + +static inline bool +isl_format_is_rgbx(enum isl_format fmt) +{ + const struct isl_format_layout *fmtl = isl_format_get_layout(fmt); + + return fmtl->channels.r.bits > 0 && + fmtl->channels.g.bits > 0 && + fmtl->channels.b.bits > 0 && + fmtl->channels.a.bits > 0 && + fmtl->channels.a.type == ISL_VOID; } enum isl_format isl_format_rgb_to_rgba(enum isl_format rgb) ATTRIBUTE_CONST; enum isl_format isl_format_rgb_to_rgbx(enum isl_format rgb) ATTRIBUTE_CONST; +enum isl_format isl_format_rgbx_to_rgba(enum isl_format rgb) ATTRIBUTE_CONST; + +void isl_color_value_pack(const union isl_color_value *value, + enum isl_format format, + uint32_t *data_out); +void isl_color_value_unpack(union isl_color_value *value, + enum isl_format format, + const uint32_t *data_in); bool isl_is_storage_image_format(enum isl_format fmt); @@ -1577,6 +1657,13 @@ bool isl_has_matching_typed_storage_image_format(const struct gen_device_info *devinfo, enum isl_format fmt); +static inline enum isl_tiling +isl_tiling_flag_to_enum(isl_tiling_flags_t flag) +{ + assert(__builtin_popcount(flag) == 1); + return (enum isl_tiling) (__builtin_ffs(flag) - 1); +} + static inline bool isl_tiling_is_any_y(enum isl_tiling tiling) { @@ -1595,6 +1682,44 @@ isl_tiling_to_i915_tiling(enum isl_tiling tiling); enum isl_tiling isl_tiling_from_i915_tiling(uint32_t tiling); +static inline bool +isl_aux_usage_has_hiz(enum isl_aux_usage usage) +{ + return usage == ISL_AUX_USAGE_HIZ || + usage == ISL_AUX_USAGE_HIZ_CCS; +} + +static inline bool +isl_aux_usage_has_mcs(enum isl_aux_usage usage) +{ + return usage == ISL_AUX_USAGE_MCS || + usage == ISL_AUX_USAGE_MCS_CCS; +} + +static inline bool +isl_aux_usage_has_ccs(enum isl_aux_usage usage) +{ + return usage == ISL_AUX_USAGE_CCS_D || + usage == ISL_AUX_USAGE_CCS_E || + usage == ISL_AUX_USAGE_MC || + usage == ISL_AUX_USAGE_HIZ_CCS || + usage == ISL_AUX_USAGE_MCS_CCS; +} + +static inline bool +isl_aux_state_has_valid_primary(enum isl_aux_state state) +{ + return state == ISL_AUX_STATE_RESOLVED || + state == ISL_AUX_STATE_PASS_THROUGH || + state == ISL_AUX_STATE_AUX_INVALID; +} + +static inline bool +isl_aux_state_has_valid_aux(enum isl_aux_state state) +{ + return state != ISL_AUX_STATE_AUX_INVALID; +} + const struct isl_drm_modifier_info * ATTRIBUTE_CONST isl_drm_modifier_get_info(uint64_t modifier); @@ -1746,6 +1871,8 @@ isl_swizzle_supports_rendering(const struct gen_device_info *devinfo, struct isl_swizzle isl_swizzle_compose(struct isl_swizzle first, struct isl_swizzle second); +struct isl_swizzle +isl_swizzle_invert(struct isl_swizzle swizzle); #define isl_surf_init(dev, surf, ...) \ isl_surf_init_s((dev), (surf), \ @@ -1773,8 +1900,9 @@ isl_surf_get_mcs_surf(const struct isl_device *dev, bool isl_surf_get_ccs_surf(const struct isl_device *dev, const struct isl_surf *surf, - struct isl_surf *ccs_surf, - uint32_t row_pitch /**< Ignored if 0 */); + struct isl_surf *aux_surf, + struct isl_surf *extra_aux_surf, + uint32_t row_pitch_B /**< Ignored if 0 */); #define isl_surf_fill_state(dev, state, ...) \ isl_surf_fill_state_s((dev), (state), \ @@ -1840,13 +1968,41 @@ isl_surf_get_image_alignment_sa(const struct isl_surf *surf) fmtl->bd * surf->image_alignment_el.d); } +/** + * Logical extent of level 0 in units of surface elements. + */ +static inline struct isl_extent4d +isl_surf_get_logical_level0_el(const struct isl_surf *surf) +{ + const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); + + return isl_extent4d(DIV_ROUND_UP(surf->logical_level0_px.w, fmtl->bw), + DIV_ROUND_UP(surf->logical_level0_px.h, fmtl->bh), + DIV_ROUND_UP(surf->logical_level0_px.d, fmtl->bd), + surf->logical_level0_px.a); +} + +/** + * Physical extent of level 0 in units of surface elements. + */ +static inline struct isl_extent4d +isl_surf_get_phys_level0_el(const struct isl_surf *surf) +{ + const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); + + return isl_extent4d(DIV_ROUND_UP(surf->phys_level0_sa.w, fmtl->bw), + DIV_ROUND_UP(surf->phys_level0_sa.h, fmtl->bh), + DIV_ROUND_UP(surf->phys_level0_sa.d, fmtl->bd), + surf->phys_level0_sa.a); +} + /** * Pitch between vertically adjacent surface elements, in bytes. */ static inline uint32_t -isl_surf_get_row_pitch(const struct isl_surf *surf) +isl_surf_get_row_pitch_B(const struct isl_surf *surf) { - return surf->row_pitch; + return surf->row_pitch_B; } /** @@ -1857,8 +2013,8 @@ isl_surf_get_row_pitch_el(const struct isl_surf *surf) { const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); - assert(surf->row_pitch % (fmtl->bpb / 8) == 0); - return surf->row_pitch / (fmtl->bpb / 8); + assert(surf->row_pitch_B % (fmtl->bpb / 8) == 0); + return surf->row_pitch_B / (fmtl->bpb / 8); } /** @@ -1896,7 +2052,7 @@ isl_surf_get_array_pitch_sa_rows(const struct isl_surf *surf) static inline uint32_t isl_surf_get_array_pitch(const struct isl_surf *surf) { - return isl_surf_get_array_pitch_sa_rows(surf) * surf->row_pitch; + return isl_surf_get_array_pitch_sa_rows(surf) * surf->row_pitch_B; } /** @@ -1952,6 +2108,27 @@ isl_surf_get_image_offset_B_tile_sa(const struct isl_surf *surf, uint32_t *x_offset_sa, uint32_t *y_offset_sa); +/** + * Calculate the range in bytes occupied by a subimage, to the nearest tile. + * + * The range returned will be the smallest memory range in which the give + * subimage fits, rounded to even tiles. Intel images do not usually have a + * direct subimage -> range mapping so the range returned may contain data + * from other sub-images. The returned range is a half-open interval where + * all of the addresses within the subimage are < end_tile_B. + * + * @invariant level < surface levels + * @invariant logical_array_layer < logical array length of surface + * @invariant logical_z_offset_px < logical depth of surface at level + */ +void +isl_surf_get_image_range_B_tile(const struct isl_surf *surf, + uint32_t level, + uint32_t logical_array_layer, + uint32_t logical_z_offset_px, + uint32_t *start_tile_B, + uint32_t *end_tile_B); + /** * Create an isl_surf that represents a particular subimage in the surface. * @@ -1988,7 +2165,7 @@ isl_surf_get_image_surf(const struct isl_device *dev, void isl_tiling_get_intratile_offset_el(enum isl_tiling tiling, uint32_t bpb, - uint32_t row_pitch, + uint32_t row_pitch_B, uint32_t total_x_offset_el, uint32_t total_y_offset_el, uint32_t *base_address_offset, @@ -1998,7 +2175,7 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling, static inline void isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling, enum isl_format format, - uint32_t row_pitch, + uint32_t row_pitch_B, uint32_t total_x_offset_sa, uint32_t total_y_offset_sa, uint32_t *base_address_offset, @@ -2016,7 +2193,7 @@ isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling, const uint32_t total_x_offset = total_x_offset_sa / fmtl->bw; const uint32_t total_y_offset = total_y_offset_sa / fmtl->bh; - isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch, + isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch_B, total_x_offset, total_y_offset, base_address_offset, x_offset_sa, y_offset_sa); @@ -2034,6 +2211,40 @@ uint32_t isl_surf_get_depth_format(const struct isl_device *dev, const struct isl_surf *surf); +/** + * @brief determines if a surface supports writing through HIZ to the CCS. + */ +bool +isl_surf_supports_hiz_ccs_wt(const struct gen_device_info *dev, + const struct isl_surf *surf, + enum isl_aux_usage aux_usage); + +/** + * @brief performs a copy from linear to tiled surface + * + */ +void +isl_memcpy_linear_to_tiled(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + +/** + * @brief performs a copy from tiled to linear surface + * + */ +void +isl_memcpy_tiled_to_linear(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + #ifdef __cplusplus } #endif