X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fvulkan%2Fanv_blorp.c;h=45cbbb8690083405ddc8748bafaf2019cf8aae1c;hb=59c1797d560bfd3172427128ef8455d416b1cdb0;hp=67cb145a2c6990ec9dbae4970fadff718dcfa288;hpb=d71efbe5f2a0ff934b8e9eeb96cd680a83bc0259;p=mesa.git

diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 67cb145a2c6..45cbbb86900 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -686,7 +686,7 @@ void anv_CmdUpdateBuffer(
     * little data at the top to build its linked list.
     */
    const uint32_t max_update_size =
-      cmd_buffer->device->dynamic_state_block_pool.block_size - 64;
+      cmd_buffer->device->dynamic_state_pool.block_size - 64;
 
    assert(max_update_size < MAX_SURFACE_DIM * 4);
 
@@ -710,7 +710,7 @@ void anv_CmdUpdateBuffer(
       bs = gcd_pow2_u64(bs, copy_size);
 
       do_buffer_copy(&batch,
-                     &cmd_buffer->device->dynamic_state_block_pool.bo,
+                     &cmd_buffer->device->dynamic_state_pool.block_pool.bo,
                      tmp_data.offset,
                      dst_buffer->bo, dst_buffer->offset + dstOffset,
                      copy_size / bs, 1, bs);
@@ -999,6 +999,25 @@ clear_color_attachment(struct anv_cmd_buffer *cmd_buffer,
    union isl_color_value clear_color =
       vk_to_isl_color(attachment->clearValue.color);
 
+   /* If multiview is enabled we ignore baseArrayLayer and layerCount */
+   if (subpass->view_mask) {
+      uint32_t view_idx;
+      for_each_bit(view_idx, subpass->view_mask) {
+         for (uint32_t r = 0; r < rectCount; ++r) {
+            const VkOffset2D offset = pRects[r].rect.offset;
+            const VkExtent2D extent = pRects[r].rect.extent;
+            blorp_clear_attachments(batch, binding_table,
+                                    ISL_FORMAT_UNSUPPORTED, pass_att->samples,
+                                    view_idx, 1,
+                                    offset.x, offset.y,
+                                    offset.x + extent.width,
+                                    offset.y + extent.height,
+                                    true, clear_color, false, 0.0f, 0, 0);
+         }
+      }
+      return;
+   }
+
    for (uint32_t r = 0; r < rectCount; ++r) {
       const VkOffset2D offset = pRects[r].rect.offset;
       const VkExtent2D extent = pRects[r].rect.extent;
@@ -1047,6 +1066,28 @@ clear_depth_stencil_attachment(struct anv_cmd_buffer *cmd_buffer,
    if (result != VK_SUCCESS)
       return;
 
+   /* If multiview is enabled we ignore baseArrayLayer and layerCount */
+   if (subpass->view_mask) {
+      uint32_t view_idx;
+      for_each_bit(view_idx, subpass->view_mask) {
+         for (uint32_t r = 0; r < rectCount; ++r) {
+            const VkOffset2D offset = pRects[r].rect.offset;
+            const VkExtent2D extent = pRects[r].rect.extent;
+            VkClearDepthStencilValue value = attachment->clearValue.depthStencil;
+            blorp_clear_attachments(batch, binding_table,
+                                    depth_format, pass_att->samples,
+                                    view_idx, 1,
+                                    offset.x, offset.y,
+                                    offset.x + extent.width,
+                                    offset.y + extent.height,
+                                    false, color_value,
+                                    clear_depth, value.depth,
+                                    clear_stencil ? 0xff : 0, value.stencil);
+         }
+      }
+      return;
+   }
+
    for (uint32_t r = 0; r < rectCount; ++r) {
       const VkOffset2D offset = pRects[r].rect.offset;
       const VkExtent2D extent = pRects[r].rect.extent;
@@ -1373,6 +1414,73 @@ void anv_CmdResolveImage(
    blorp_batch_finish(&batch);
 }
 
+void
+anv_image_ccs_clear(struct anv_cmd_buffer *cmd_buffer,
+                    const struct anv_image *image,
+                    const struct isl_view *view,
+                    const VkImageSubresourceRange *subresourceRange)
+{
+   assert(image->type == VK_IMAGE_TYPE_3D || image->extent.depth == 1);
+
+   struct blorp_batch batch;
+   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
+
+   struct blorp_surf surf;
+   get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
+                                image->aux_usage, &surf);
+
+   /* From the Sky Lake PRM Vol. 7, "Render Target Fast Clear":
+    *
+    *    "After Render target fast clear, pipe-control with color cache
+    *    write-flush must be issued before sending any DRAW commands on
+    *    that render target."
+    *
+    * This comment is a bit cryptic and doesn't really tell you what's going
+    * or what's really needed.  It appears that fast clear ops are not
+    * properly synchronized with other drawing.  This means that we cannot
+    * have a fast clear operation in the pipe at the same time as other
+    * regular drawing operations.  We need to use a PIPE_CONTROL to ensure
+    * that the contents of the previous draw hit the render target before we
+    * resolve and then use a second PIPE_CONTROL after the resolve to ensure
+    * that it is completed before any additional drawing occurs.
+    */
+   cmd_buffer->state.pending_pipe_bits |=
+      ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+
+   const uint32_t level_count =
+      view ? view->levels : anv_get_levelCount(image, subresourceRange);
+   for (uint32_t l = 0; l < level_count; l++) {
+      const uint32_t level =
+         (view ? view->base_level : subresourceRange->baseMipLevel) + l;
+
+      const VkExtent3D extent = {
+         .width = anv_minify(image->extent.width, level),
+         .height = anv_minify(image->extent.height, level),
+         .depth = anv_minify(image->extent.depth, level),
+      };
+
+      /* Blorp likes to treat 2D_ARRAY and 3D the same. */
+      uint32_t blorp_base_layer, blorp_layer_count;
+      if (view) {
+         blorp_base_layer = view->base_array_layer;
+         blorp_layer_count = view->array_len;
+      } else if (image->type == VK_IMAGE_TYPE_3D) {
+         blorp_base_layer = 0;
+         blorp_layer_count = extent.depth;
+      } else {
+         blorp_base_layer = subresourceRange->baseArrayLayer;
+         blorp_layer_count = anv_get_layerCount(image, subresourceRange);
+      }
+
+      blorp_fast_clear(&batch, &surf, surf.surf->format,
+                       level, blorp_base_layer, blorp_layer_count,
+                       0, 0, extent.width, extent.height);
+   }
+
+   cmd_buffer->state.pending_pipe_bits |=
+      ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+}
+
 static void
 ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
                        struct blorp_batch *batch,
@@ -1398,7 +1506,6 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
     * still hot in the cache.
     */
    bool found_draw = false;
-   bool self_dep = false;
    enum anv_subpass_usage usage = 0;
    for (uint32_t s = subpass_idx + 1; s < pass->subpass_count; s++) {
       usage |= pass->attachments[att].subpass_usage[s];
@@ -1408,8 +1515,6 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
           * wait to resolve until then.
           */
          found_draw = true;
-         if (pass->attachments[att].subpass_usage[s] & ANV_SUBPASS_USAGE_INPUT)
-            self_dep = true;
          break;
       }
    }
@@ -1468,14 +1573,6 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
           *    binding this surface to Sampler."
           */
          resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
-      } else if (cmd_buffer->device->info.gen == 8 && self_dep &&
-                 att_state->input_aux_usage == ISL_AUX_USAGE_CCS_D) {
-         /* On Broadwell we still need to do resolves when there is a
-          * self-dependency because HW could not see fast-clears and works
-          * on the render cache as if there was regular non-fast-clear surface.
-          * To avoid any inconsistency, we force the resolve.
-          */
-         resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
       }
    }