X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fvulkan%2Fanv_blorp.c;h=8570879f37abe221ee3e0edf0fd8978d9c6954e9;hb=40a6de176d0f4ffa9fcad8f2c8ab30a7e8cfe807;hp=8cbe6aaaa8996a7e88d9db71b3afc017c9cfdafb;hpb=3dd0d12aa5fefa94123269a541c94cdf57599e34;p=mesa.git diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 8cbe6aaaa89..8570879f37a 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -1628,8 +1628,8 @@ anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer, { assert(aspect == VK_IMAGE_ASPECT_DEPTH_BIT); assert(base_layer + layer_count <= anv_image_aux_layers(image, aspect, level)); - assert(anv_image_aspect_to_plane(image->aspects, - VK_IMAGE_ASPECT_DEPTH_BIT) == 0); + uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect); + assert(plane == 0); struct blorp_batch batch; blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); @@ -1638,7 +1638,7 @@ anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer, get_blorp_surf_for_anv_image(cmd_buffer->device, image, VK_IMAGE_ASPECT_DEPTH_BIT, 0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX, - ISL_AUX_USAGE_HIZ, &surf); + image->planes[plane].aux_usage, &surf); surf.clear_color.f32[0] = ANV_HZ_FC_VAL; blorp_hiz_op(&batch, &surf, level, base_layer, layer_count, hiz_op); @@ -1662,21 +1662,25 @@ anv_image_hiz_clear(struct anv_cmd_buffer *cmd_buffer, struct blorp_surf depth = {}; if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) { + uint32_t plane = anv_image_aspect_to_plane(image->aspects, + VK_IMAGE_ASPECT_DEPTH_BIT); assert(base_layer + layer_count <= anv_image_aux_layers(image, VK_IMAGE_ASPECT_DEPTH_BIT, level)); get_blorp_surf_for_anv_image(cmd_buffer->device, image, VK_IMAGE_ASPECT_DEPTH_BIT, 0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX, - ISL_AUX_USAGE_HIZ, &depth); + image->planes[plane].aux_usage, &depth); depth.clear_color.f32[0] = ANV_HZ_FC_VAL; } struct blorp_surf stencil = {}; if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { + uint32_t plane = anv_image_aspect_to_plane(image->aspects, + VK_IMAGE_ASPECT_STENCIL_BIT); get_blorp_surf_for_anv_image(cmd_buffer->device, image, VK_IMAGE_ASPECT_STENCIL_BIT, 0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX, - ISL_AUX_USAGE_NONE, &stencil); + image->planes[plane].aux_usage, &stencil); } /* From the Sky Lake PRM Volume 7, "Depth Buffer Clear": @@ -1732,7 +1736,7 @@ anv_image_hiz_clear(struct anv_cmd_buffer *cmd_buffer, void anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, const struct anv_image *image, - enum isl_format format, + enum isl_format format, struct isl_swizzle swizzle, VkImageAspectFlagBits aspect, uint32_t base_layer, uint32_t layer_count, enum isl_aux_op mcs_op, union isl_color_value *clear_value, @@ -1782,7 +1786,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, switch (mcs_op) { case ISL_AUX_OP_FAST_CLEAR: - blorp_fast_clear(&batch, &surf, format, + blorp_fast_clear(&batch, &surf, format, swizzle, 0, base_layer, layer_count, 0, 0, image->extent.width, image->extent.height); break; @@ -1805,7 +1809,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, void anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, const struct anv_image *image, - enum isl_format format, + enum isl_format format, struct isl_swizzle swizzle, VkImageAspectFlagBits aspect, uint32_t level, uint32_t base_layer, uint32_t layer_count, enum isl_aux_op ccs_op, union isl_color_value *clear_value, @@ -1863,7 +1867,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, switch (ccs_op) { case ISL_AUX_OP_FAST_CLEAR: - blorp_fast_clear(&batch, &surf, format, + blorp_fast_clear(&batch, &surf, format, swizzle, level, base_layer, layer_count, 0, 0, level_width, level_height); break;