X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fvulkan%2Fanv_nir_apply_pipeline_layout.c;h=1d13aa604924e68f888e066a3ecd9bf0608519cd;hb=f118ca20758c85da1aaf1792e61aadb298b32a47;hp=6be725a5cabeb9dd078e7a75274259f2cd249b7d;hpb=d2aa65eb1892f7b300ac24560f9dbda6b600b5a7;p=mesa.git diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index 6be725a5cab..1d13aa60492 100644 --- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -114,8 +114,10 @@ get_used_bindings_block(nir_block *block, case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_min: - case nir_intrinsic_image_deref_atomic_max: + case nir_intrinsic_image_deref_atomic_imin: + case nir_intrinsic_image_deref_atomic_umin: + case nir_intrinsic_image_deref_atomic_imax: + case nir_intrinsic_image_deref_atomic_umax: case nir_intrinsic_image_deref_atomic_and: case nir_intrinsic_image_deref_atomic_or: case nir_intrinsic_image_deref_atomic_xor: @@ -725,10 +727,14 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin, nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]); nir_variable *var = nir_deref_instr_get_variable(deref); + unsigned set = var->data.descriptor_set; + unsigned binding = var->data.binding; + unsigned binding_offset = state->set[set].surface_offsets[binding]; + nir_builder *b = &state->builder; b->cursor = nir_before_instr(&intrin->instr); - const bool use_bindless = state->pdevice->has_bindless_images; + ASSERTED const bool use_bindless = state->pdevice->has_bindless_images; if (intrin->intrinsic == nir_intrinsic_image_deref_load_param_intel) { b->cursor = nir_instr_remove(&intrin->instr); @@ -742,7 +748,7 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin, intrin->dest.ssa.bit_size, state); nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(desc)); - } else if (use_bindless) { + } else if (binding_offset > MAX_BINDING_TABLE_SIZE) { const bool write_only = (var->data.image.access & ACCESS_NON_READABLE) != 0; nir_ssa_def *desc = @@ -750,9 +756,6 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *handle = nir_channel(b, desc, write_only ? 1 : 0); nir_rewrite_image_intrinsic(intrin, handle, true); } else { - unsigned set = var->data.descriptor_set; - unsigned binding = var->data.binding; - unsigned binding_offset = state->set[set].surface_offsets[binding]; unsigned array_size = state->layout->set[set].layout->binding[binding].array_size; @@ -856,8 +859,21 @@ lower_tex_deref(nir_tex_instr *tex, nir_tex_src_type deref_src_type, assert(deref->deref_type == nir_deref_type_array); if (nir_src_is_const(deref->arr.index)) { - unsigned arr_index = nir_src_as_uint(deref->arr.index); - *base_index += MIN2(arr_index, array_size - 1); + unsigned arr_index = MIN2(nir_src_as_uint(deref->arr.index), array_size - 1); + struct anv_sampler **immutable_samplers = + state->layout->set[set].layout->binding[binding].immutable_samplers; + if (immutable_samplers) { + /* Array of YCbCr samplers are tightly packed in the binding + * tables, compute the offset of an element in the array by + * adding the number of planes of all preceding elements. + */ + unsigned desc_arr_index = 0; + for (int i = 0; i < arr_index; i++) + desc_arr_index += immutable_samplers[i]->n_planes; + *base_index += desc_arr_index; + } else { + *base_index += arr_index; + } } else { /* From VK_KHR_sampler_ycbcr_conversion: * @@ -928,13 +944,15 @@ lower_gen7_tex_swizzle(nir_tex_instr *tex, unsigned plane, assert(deref_src_idx >= 0); nir_deref_instr *deref = nir_src_as_deref(tex->src[deref_src_idx].src); - UNUSED nir_variable *var = nir_deref_instr_get_variable(deref); + nir_variable *var = nir_deref_instr_get_variable(deref); - UNUSED unsigned set = var->data.descriptor_set; - UNUSED unsigned binding = var->data.binding; - UNUSED const struct anv_descriptor_set_binding_layout *bind_layout = + unsigned set = var->data.descriptor_set; + unsigned binding = var->data.binding; + const struct anv_descriptor_set_binding_layout *bind_layout = &state->layout->set[set].layout->binding[binding]; - assert(bind_layout->data & ANV_DESCRIPTOR_TEXTURE_SWIZZLE); + + if ((bind_layout->data & ANV_DESCRIPTOR_TEXTURE_SWIZZLE) == 0) + return; nir_builder *b = &state->builder; b->cursor = nir_before_instr(&tex->instr); @@ -1027,8 +1045,10 @@ apply_pipeline_layout_block(nir_block *block, case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_min: - case nir_intrinsic_image_deref_atomic_max: + case nir_intrinsic_image_deref_atomic_imin: + case nir_intrinsic_image_deref_atomic_umin: + case nir_intrinsic_image_deref_atomic_imax: + case nir_intrinsic_image_deref_atomic_umax: case nir_intrinsic_image_deref_atomic_and: case nir_intrinsic_image_deref_atomic_or: case nir_intrinsic_image_deref_atomic_xor: