X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fvulkan%2Fanv_private.h;h=2fc543daacc8c2c9409bad6ce535b4195c6477b7;hb=5cc07d854c85e30c5aa1ced626b4b6500f8cd74c;hp=b138dea6ed00b7cea6e0b17e195987d2b6ad112b;hpb=6283b6d56a2bb731cfcb4c876566901075f9bd34;p=mesa.git diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index b138dea6ed0..2fc543daacc 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -153,13 +153,26 @@ anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask) } } +static inline union isl_color_value +vk_to_isl_color(VkClearColorValue color) +{ + return (union isl_color_value) { + .u32 = { + color.uint32[0], + color.uint32[1], + color.uint32[2], + color.uint32[3], + }, + }; +} + #define for_each_bit(b, dword) \ for (uint32_t __dword = (dword); \ (b) = __builtin_ffs(__dword) - 1, __dword; \ __dword &= ~(1 << (b))) #define typed_memcpy(dest, src, count) ({ \ - static_assert(sizeof(*src) == sizeof(*dest), ""); \ + STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ memcpy((dest), (src), (count) * sizeof(*(src))); \ }) @@ -275,7 +288,7 @@ anv_bo_init(struct anv_bo *bo, uint32_t gem_handle, uint64_t size) { bo->gem_handle = gem_handle; bo->index = 0; - bo->offset = 0; + bo->offset = -1; bo->size = size; bo->map = NULL; bo->is_winsys_bo = false; @@ -453,9 +466,14 @@ VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo, uint32_t size); void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo); +struct anv_scratch_bo { + bool exists; + struct anv_bo bo; +}; + struct anv_scratch_pool { /* Indexed by Per-Thread Scratch Space number (the hardware value) and stage */ - struct anv_bo bos[16][MESA_SHADER_STAGES]; + struct anv_scratch_bo bos[16][MESA_SHADER_STAGES]; }; void anv_scratch_pool_init(struct anv_device *device, @@ -575,6 +593,7 @@ struct anv_device { uint32_t default_mocs; pthread_mutex_t mutex; + pthread_cond_t queue_submit; }; void anv_device_get_cache_uuid(void *uuid); @@ -636,9 +655,6 @@ struct anv_batch_bo { /* Bytes actually consumed in this batch BO */ size_t length; - /* Last seen surface state block pool bo offset */ - uint32_t last_ss_pool_bo_offset; - struct anv_reloc_list relocs; }; @@ -722,7 +738,7 @@ _anv_combine_address(struct anv_batch *batch, void *location, do { \ uint32_t *dw; \ \ - static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \ + STATIC_ASSERT(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \ dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \ for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \ dw[i] = (dwords0)[i] | (dwords1)[i]; \ @@ -910,6 +926,9 @@ struct anv_pipeline_binding { /* Index in the binding */ uint8_t index; + + /* Input attachment index (relative to the subpass) */ + uint8_t input_attachment_index; }; struct anv_pipeline_layout { @@ -1080,8 +1099,15 @@ void anv_dynamic_state_copy(struct anv_dynamic_state *dest, * The clear value is valid only if there exists a pending clear. */ struct anv_attachment_state { + enum isl_aux_usage aux_usage; + enum isl_aux_usage input_aux_usage; + struct anv_state color_rt_state; + struct anv_state input_att_state; + VkImageAspectFlags pending_clear_aspects; + bool fast_clear; VkClearValue clear_value; + bool clear_color_is_zero_one; }; /** State required while building cmd buffer */ @@ -1120,6 +1146,19 @@ struct anv_cmd_state { */ struct anv_attachment_state * attachments; + /** + * Surface states for color render targets. These are stored in a single + * flat array. For depth-stencil attachments, the surface state is simply + * left blank. + */ + struct anv_state render_pass_states; + + /** + * A null surface state of the right size to match the framebuffer. This + * is one of the states in render_pass_states. + */ + struct anv_state null_surface_state; + struct { struct anv_buffer * index_buffer; uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */ @@ -1172,22 +1211,10 @@ struct anv_cmd_buffer { */ struct u_vector bt_blocks; uint32_t bt_next; - struct anv_reloc_list surface_relocs; - /* Information needed for execbuf - * - * These fields are generated by anv_cmd_buffer_prepare_execbuf(). - */ - struct { - struct drm_i915_gem_execbuffer2 execbuf; - - struct drm_i915_gem_exec_object2 * objects; - uint32_t bo_count; - struct anv_bo ** bos; - - /* Allocated length of the 'objects' and 'bos' arrays */ - uint32_t array_length; - } execbuf2; + struct anv_reloc_list surface_relocs; + /** Last seen surface state block pool center bo offset */ + uint32_t last_ss_pool_center; /* Serial for tracking buffer completion */ uint32_t serial; @@ -1247,8 +1274,12 @@ void gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer *cmd_buffer, bool depth_clamp_enable); void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer); -void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer, - const VkRenderPassBeginInfo *info); +void anv_cmd_buffer_setup_attachments(struct anv_cmd_buffer *cmd_buffer, + struct anv_render_pass *pass, + struct anv_framebuffer *framebuffer, + const VkClearValue *clear_values); + +void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer); struct anv_state anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer, @@ -1262,13 +1293,30 @@ void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer); const struct anv_image_view * anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer); +struct anv_state +anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer *cmd_buffer, + uint32_t num_entries, + uint32_t *state_offset); + void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer); +enum anv_fence_state { + /** Indicates that this is a new (or newly reset fence) */ + ANV_FENCE_STATE_RESET, + + /** Indicates that this fence has been submitted to the GPU but is still + * (as far as we know) in use by the GPU. + */ + ANV_FENCE_STATE_SUBMITTED, + + ANV_FENCE_STATE_SIGNALED, +}; + struct anv_fence { struct anv_bo bo; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec2_objects[1]; - bool ready; + enum anv_fence_state state; }; struct anv_event { @@ -1386,11 +1434,6 @@ struct anv_pipeline { VkShaderStageFlags active_stages; struct anv_state blend_state; - uint32_t vs_simd8; - uint32_t vs_vec4; - uint32_t ps_ksp0; - uint32_t gs_kernel; - uint32_t cs_simd; uint32_t vb_used; uint32_t binding_stride[MAX_VBS]; @@ -1416,6 +1459,8 @@ struct anv_pipeline { struct { uint32_t wm_depth_stencil[4]; } gen9; + + uint32_t interface_descriptor_data[8]; }; static inline bool @@ -1526,10 +1571,14 @@ struct anv_image { struct { struct anv_surface depth_surface; - struct anv_surface hiz_surface; struct anv_surface stencil_surface; }; }; + + /** The aux usage for this surface when outside a render pass */ + enum isl_aux_usage aux_usage; + + struct anv_surface aux_surface; }; static inline uint32_t @@ -1560,9 +1609,6 @@ struct anv_image_view { VkFormat vk_format; VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */ - /** RENDER_SURFACE_STATE when using image as a color render target. */ - struct anv_state color_rt_surface_state; - /** RENDER_SURFACE_STATE when using image as a sampler surface. */ struct anv_state sampler_surface_state; @@ -1593,11 +1639,11 @@ anv_image_get_surface_for_aspect_mask(const struct anv_image *image, static inline bool anv_image_has_hiz(const struct anv_image *image) { - /* We must check the aspect because anv_image::hiz_surface belongs to - * a union. + /* We must check the aspect because anv_image::aux_surface may be used for + * any type of auxiliary surface, not just HiZ. */ return (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) && - image->hiz_surface.isl.size > 0; + image->aux_surface.isl.size > 0; } struct anv_buffer_view { @@ -1682,22 +1728,37 @@ struct anv_subpass { uint32_t * resolve_attachments; uint32_t depth_stencil_attachment; + /** Subpass has a depth/stencil self-dependency */ + bool has_ds_self_dep; + /** Subpass has at least one resolve attachment */ bool has_resolve; }; +enum anv_subpass_usage { + ANV_SUBPASS_USAGE_DRAW = (1 << 0), + ANV_SUBPASS_USAGE_INPUT = (1 << 1), + ANV_SUBPASS_USAGE_RESOLVE_SRC = (1 << 2), + ANV_SUBPASS_USAGE_RESOLVE_DST = (1 << 3), +}; + struct anv_render_pass_attachment { VkFormat format; uint32_t samples; + VkImageUsageFlags usage; VkAttachmentLoadOp load_op; VkAttachmentStoreOp store_op; VkAttachmentLoadOp stencil_load_op; + + /* An array, indexed by subpass id, of how the attachment will be used. */ + enum anv_subpass_usage * subpass_usage; }; struct anv_render_pass { uint32_t attachment_count; uint32_t subpass_count; uint32_t * subpass_attachments; + enum anv_subpass_usage * subpass_usages; struct anv_render_pass_attachment * attachments; struct anv_subpass subpasses[0]; };