X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fintel%2Fvulkan%2FgenX_gpu_memcpy.c;h=57dc55ec39415902037d389e710b60c3616934a5;hb=40a6de176d0f4ffa9fcad8f2c8ab30a7e8cfe807;hp=6ed9ac7366a74ae3d708150f2d4cc64676b76a07;hpb=6cfc49287d6dd10cfc8b58906a01fbd3d5a100aa;p=mesa.git

diff --git a/src/intel/vulkan/genX_gpu_memcpy.c b/src/intel/vulkan/genX_gpu_memcpy.c
index 6ed9ac7366a..57dc55ec394 100644
--- a/src/intel/vulkan/genX_gpu_memcpy.c
+++ b/src/intel/vulkan/genX_gpu_memcpy.c
@@ -51,63 +51,17 @@ gcd_pow2_u64(uint64_t a, uint64_t b)
    return 1 << MIN2(a_log2, b_log2);
 }
 
-void
-genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer,
-                           struct anv_bo *dst, uint32_t dst_offset,
-                           struct anv_bo *src, uint32_t src_offset,
-                           uint32_t size)
-{
-   /* This memcpy operates in units of dwords. */
-   assert(size % 4 == 0);
-   assert(dst_offset % 4 == 0);
-   assert(src_offset % 4 == 0);
-
-   for (uint32_t i = 0; i < size; i += 4) {
-      const struct anv_address src_addr =
-         (struct anv_address) { src, src_offset + i};
-      const struct anv_address dst_addr =
-         (struct anv_address) { dst, dst_offset + i};
-#if GEN_GEN >= 8
-      anv_batch_emit(&cmd_buffer->batch, GENX(MI_COPY_MEM_MEM), cp) {
-         cp.DestinationMemoryAddress = dst_addr;
-         cp.SourceMemoryAddress = src_addr;
-      }
-#else
-      /* IVB does not have a general purpose register for command streamer
-       * commands. Therefore, we use an alternate temporary register.
-       */
-#define TEMP_REG 0x2440 /* GEN7_3DPRIM_BASE_VERTEX */
-      anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_MEM), load) {
-         load.RegisterAddress = TEMP_REG;
-         load.MemoryAddress = src_addr;
-      }
-      anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), store) {
-         store.RegisterAddress = TEMP_REG;
-         store.MemoryAddress = dst_addr;
-      }
-#undef TEMP_REG
-#endif
-   }
-   return;
-}
-
 void
 genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
-                           struct anv_bo *dst, uint32_t dst_offset,
-                           struct anv_bo *src, uint32_t src_offset,
+                           struct anv_address dst, struct anv_address src,
                            uint32_t size)
 {
    if (size == 0)
       return;
 
-   assert(dst_offset + size <= dst->size);
-   assert(src_offset + size <= src->size);
-
    /* The maximum copy block size is 4 32-bit components at a time. */
-   unsigned bs = 16;
-   bs = gcd_pow2_u64(bs, src_offset);
-   bs = gcd_pow2_u64(bs, dst_offset);
-   bs = gcd_pow2_u64(bs, size);
+   assert(size % 4 == 0);
+   unsigned bs = gcd_pow2_u64(16, size);
 
    enum isl_format format;
    switch (bs) {
@@ -124,6 +78,7 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
       genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
    }
 
+   genX(cmd_buffer_set_binding_for_gen8_vb_flush)(cmd_buffer, 32, src, size);
    genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
 
    genX(flush_pipeline_select_3d)(cmd_buffer);
@@ -134,14 +89,13 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
       &(struct GENX(VERTEX_BUFFER_STATE)) {
          .VertexBufferIndex = 32, /* Reserved for this */
          .AddressModifyEnable = true,
-         .BufferStartingAddress = { src, src_offset },
+         .BufferStartingAddress = src,
          .BufferPitch = bs,
+         .MOCS = anv_mocs_for_bo(cmd_buffer->device, src.bo),
 #if (GEN_GEN >= 8)
-         .MemoryObjectControlState = GENX(MOCS),
          .BufferSize = size,
 #else
-         .VertexBufferMemoryObjectControlState = GENX(MOCS),
-         .EndAddress = { src, src_offset + size - 1 },
+         .EndAddress = anv_address_add(src, size - 1),
 #endif
       });
 
@@ -158,6 +112,13 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
          .Component3Control = (bs >= 16) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
       });
 
+#if GEN_GEN >= 8
+   anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_INSTANCING), vfi) {
+      vfi.InstancingEnable = false;
+      vfi.VertexElementIndex = 0;
+   }
+#endif
+
 #if GEN_GEN >= 8
    anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_SGVS), sgvs);
 #endif
@@ -193,20 +154,24 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
 
    genX(emit_urb_setup)(cmd_buffer->device, &cmd_buffer->batch,
                         cmd_buffer->state.current_l3_config,
-                        VK_SHADER_STAGE_VERTEX_BIT, entry_size);
+                        VK_SHADER_STAGE_VERTEX_BIT, entry_size, NULL);
 
    anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) {
+#if GEN_GEN < 12
       sob.SOBufferIndex = 0;
-      sob.SOBufferObjectControlState = GENX(MOCS);
-      sob.SurfaceBaseAddress = (struct anv_address) { dst, dst_offset };
+#else
+      sob._3DCommandOpcode = 0;
+      sob._3DCommandSubOpcode = SO_BUFFER_INDEX_0_CMD;
+#endif
+      sob.MOCS = anv_mocs_for_bo(cmd_buffer->device, dst.bo),
+      sob.SurfaceBaseAddress = dst;
 
 #if GEN_GEN >= 8
       sob.SOBufferEnable = true;
-      sob.SurfaceSize = size - 1;
+      sob.SurfaceSize = size / 4 - 1;
 #else
       sob.SurfacePitch = bs;
-      sob.SurfaceEndAddress = sob.SurfaceBaseAddress;
-      sob.SurfaceEndAddress.offset += size;
+      sob.SurfaceEndAddress = anv_address_add(dst, size);
 #endif
 
 #if GEN_GEN >= 8
@@ -262,6 +227,11 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
       vf.StatisticsEnable = false;
    }
 
+#if GEN_GEN >= 12
+   /* Disable Primitive Replication. */
+   anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_PRIMITIVE_REPLICATION), pr);
+#endif
+
    anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) {
       prim.VertexAccessType         = SEQUENTIAL;
       prim.PrimitiveTopologyType    = _3DPRIM_POINTLIST;
@@ -272,5 +242,8 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
       prim.BaseVertexLocation       = 0;
    }
 
-   cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
+   genX(cmd_buffer_update_dirty_vbs_for_gen8_vb_flush)(cmd_buffer, SEQUENTIAL,
+                                                       1ull << 32);
+
+   cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_PIPELINE;
 }