X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmain%2Fscala%2Fdevices%2Fgpio%2FJTAG.scala;fp=src%2Fmain%2Fscala%2Fdevices%2Fgpio%2FJTAG.scala;h=63d9cc23d22ee8040f1ff117ce1b4332a6c6c439;hb=4ab5cb022bea37b81b20ff92280bf97658a98467;hp=ba40bc663709e102d79d0a638185eedae2d4e8f7;hpb=66b2fd11bd1ec6a8a05c4929893c51c7570284fd;p=sifive-blocks.git

diff --git a/src/main/scala/devices/gpio/JTAG.scala b/src/main/scala/devices/gpio/JTAG.scala
index ba40bc6..63d9cc2 100644
--- a/src/main/scala/devices/gpio/JTAG.scala
+++ b/src/main/scala/devices/gpio/JTAG.scala
@@ -10,8 +10,8 @@ import Chisel._
 // to put them otherwise.
 // ------------------------------------------------------------
 
-import config._
-import jtag.{JTAGIO}
+import freechips.rocketchip.config._
+import freechips.rocketchip.jtag.{JTAGIO}
 
 class JTAGPinsIO(hasTRSTn: Boolean = true) extends Bundle {