X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Fbus.hh;h=ff1d2545d7be9aa5ebbade4c573872d34ba9dff9;hb=f720029e97358b2f69ea0ecaace89d5c2ccc6bfe;hp=1d1cfde89d036a55605cf931624b3aff121bc6d0;hpb=de90ae482507207566139c58911bc8e2894ad856;p=gem5.git

diff --git a/src/mem/bus.hh b/src/mem/bus.hh
index 1d1cfde89..ff1d2545d 100644
--- a/src/mem/bus.hh
+++ b/src/mem/bus.hh
@@ -257,8 +257,8 @@ class Bus : public MemObject
     Bus(const std::string &n, int bus_id, int _clock, int _width,
         bool responder_set)
         : MemObject(n), busId(bus_id), clock(_clock), width(_width),
-          tickNextIdle(0), busIdle(this), inRetry(false), defaultPort(NULL),
-          responderSet(responder_set)
+          tickNextIdle(0), drainEvent(NULL), busIdle(this), inRetry(false),
+          defaultPort(NULL), responderSet(responder_set)
     {
         //Both the width and clock period must be positive
         if (width <= 0)